Adrian Chadd 8454b1bf68 Ensure that BAR(0) is set for the PCI slot before the ath(4) PCI registers
are written out.

This allows EEPROM-less NICs on the AR7241 PCIe bus to be correctly
initialised.

Tested:

* AP91 (AR7240+AR9285) - the existing board support didn't break;
* AP99 (AR7241+AR9287) - this fixed the configuration of the AR9287 PCI.
2012-08-26 04:39:20 +00:00
..
2012-05-02 06:17:16 +00:00
2012-05-04 02:26:15 +00:00