f635c047c5
in particular, do not handle deferred DMA map load operations at all. Any error, and especially EINPROGRESS, is treated as a hard error and typically abort the current operation. The fact that the busdma code queues the load operation for when resources (i.e. bounce buffers in this particular case) are available makes this especially problematic. Bounce buffering, unlike what the PR synopsis would suggest, works fine. While on the subject, properly implement swi_vm(). PR: 147502 MFC after: 1 week
111 lines
3.5 KiB
C
111 lines
3.5 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_MD_VAR_H_
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#define _MACHINE_MD_VAR_H_
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/*
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* Miscellaneous machine-dependent declarations.
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*/
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struct ia64_fdesc {
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uint64_t func;
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uint64_t gp;
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};
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#define FDESC_FUNC(fn) (((struct ia64_fdesc *) fn)->func)
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#define FDESC_GP(fn) (((struct ia64_fdesc *) fn)->gp)
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/* Convenience macros to decompose CFM & ar.pfs. */
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#define IA64_CFM_SOF(x) ((x) & 0x7f)
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#define IA64_CFM_SOL(x) (((x) >> 7) & 0x7f)
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#define IA64_CFM_SOR(x) (((x) >> 14) & 0x0f)
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#define IA64_CFM_RRB_GR(x) (((x) >> 18) & 0x7f)
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#define IA64_CFM_RRB_FR(x) (((x) >> 25) & 0x7f)
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#define IA64_CFM_RRB_PR(x) (((x) >> 32) & 0x3f)
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/* Convenience function (inline) to adjust backingstore pointers. */
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static __inline uint64_t
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ia64_bsp_adjust(uint64_t bsp, int nslots)
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{
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int bias = ((unsigned int)bsp & 0x1f8) >> 3;
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nslots += (nslots + bias + 63*8) / 63 - 8;
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return bsp + (nslots << 3);
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}
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#ifdef _KERNEL
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struct _special;
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struct thread;
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struct trapframe;
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/*
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* Return value from ia64_init. Describes stack to switch to.
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*/
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struct ia64_init_return {
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uint64_t bspstore;
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uint64_t sp;
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};
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extern uint64_t ia64_lapic_addr;
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extern long Maxmem;
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extern u_int busdma_swi_pending;
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void busdma_swi(void);
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int copyout_regstack(struct thread *, uint64_t *, uint64_t *);
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void cpu_mp_add(u_int, u_int, u_int);
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int do_ast(struct trapframe *);
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void ia32_trap(int, struct trapframe *);
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int ia64_count_cpus(void);
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int ia64_emulate(struct trapframe *, struct thread *);
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int ia64_flush_dirty(struct thread *, struct _special *);
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uint64_t ia64_get_hcdp(void);
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int ia64_highfp_drop(struct thread *);
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int ia64_highfp_enable(struct thread *, struct trapframe *);
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int ia64_highfp_save(struct thread *);
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int ia64_highfp_save_ipi(void);
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struct ia64_init_return ia64_init(void);
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u_int ia64_itc_freq(void);
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void ia64_probe_sapics(void);
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void ia64_sync_icache(vm_offset_t, vm_size_t);
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void interrupt(struct trapframe *);
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void map_gateway_page(void);
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void map_pal_code(void);
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void map_vhpt(uintptr_t);
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void os_boot_rendez(void);
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void os_mca(void);
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int syscall(struct trapframe *);
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void trap(int, struct trapframe *);
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void trap_panic(int, struct trapframe *);
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int unaligned_fixup(struct trapframe *, struct thread *);
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#endif /* _KERNEL */
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#endif /* !_MACHINE_MD_VAR_H_ */
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