f785676f2a
all of the features in the current working draft of the upcoming C++ standard, provisionally named C++1y. The code generator's performance is greatly increased, and the loop auto-vectorizer is now enabled at -Os and -O2 in addition to -O3. The PowerPC backend has made several major improvements to code generation quality and compile time, and the X86, SPARC, ARM32, Aarch64 and SystemZ backends have all seen major feature work. Release notes for llvm and clang can be found here: <http://llvm.org/releases/3.4/docs/ReleaseNotes.html> <http://llvm.org/releases/3.4/tools/clang/docs/ReleaseNotes.html> MFC after: 1 month
122 lines
4.1 KiB
C++
122 lines
4.1 KiB
C++
//===-- MCSubtargetInfo.cpp - Subtarget Information -----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/MC/SubtargetFeature.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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using namespace llvm;
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MCSchedModel MCSchedModel::DefaultSchedModel; // For unknown processors.
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/// InitMCProcessorInfo - Set or change the CPU (optionally supplemented
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/// with feature string). Recompute feature bits and scheduling model.
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void
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MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
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SubtargetFeatures Features(FS);
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FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
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ProcFeatures, NumFeatures);
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InitCPUSchedModel(CPU);
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}
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void
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MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) {
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if (!CPU.empty())
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CPUSchedModel = getSchedModelForCPU(CPU);
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else
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CPUSchedModel = &MCSchedModel::DefaultSchedModel;
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}
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void
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MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
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const SubtargetFeatureKV *PF,
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const SubtargetFeatureKV *PD,
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const SubtargetInfoKV *ProcSched,
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const MCWriteProcResEntry *WPR,
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const MCWriteLatencyEntry *WL,
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const MCReadAdvanceEntry *RA,
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const InstrStage *IS,
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const unsigned *OC,
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const unsigned *FP,
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unsigned NF, unsigned NP) {
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TargetTriple = TT;
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ProcFeatures = PF;
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ProcDesc = PD;
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ProcSchedModels = ProcSched;
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WriteProcResTable = WPR;
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WriteLatencyTable = WL;
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ReadAdvanceTable = RA;
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Stages = IS;
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OperandCycles = OC;
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ForwardingPaths = FP;
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NumFeatures = NF;
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NumProcs = NP;
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InitMCProcessorInfo(CPU, FS);
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}
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/// ToggleFeature - Toggle a feature and returns the re-computed feature
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/// bits. This version does not change the implied bits.
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uint64_t MCSubtargetInfo::ToggleFeature(uint64_t FB) {
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FeatureBits ^= FB;
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return FeatureBits;
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}
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/// ToggleFeature - Toggle a feature and returns the re-computed feature
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/// bits. This version will also change all implied bits.
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uint64_t MCSubtargetInfo::ToggleFeature(StringRef FS) {
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SubtargetFeatures Features;
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FeatureBits = Features.ToggleFeature(FeatureBits, FS,
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ProcFeatures, NumFeatures);
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return FeatureBits;
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}
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const MCSchedModel *
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MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
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assert(ProcSchedModels && "Processor machine model not available!");
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#ifndef NDEBUG
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for (size_t i = 1; i < NumProcs; i++) {
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assert(strcmp(ProcSchedModels[i - 1].Key, ProcSchedModels[i].Key) < 0 &&
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"Processor machine model table is not sorted");
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}
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#endif
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// Find entry
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const SubtargetInfoKV *Found =
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std::lower_bound(ProcSchedModels, ProcSchedModels+NumProcs, CPU);
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if (Found == ProcSchedModels+NumProcs || StringRef(Found->Key) != CPU) {
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errs() << "'" << CPU
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<< "' is not a recognized processor for this target"
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<< " (ignoring processor)\n";
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return &MCSchedModel::DefaultSchedModel;
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}
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assert(Found->Value && "Missing processor SchedModel value");
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return (const MCSchedModel *)Found->Value;
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}
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InstrItineraryData
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MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
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const MCSchedModel *SchedModel = getSchedModelForCPU(CPU);
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return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
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}
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/// Initialize an InstrItineraryData instance.
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void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
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InstrItins =
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InstrItineraryData(CPUSchedModel, Stages, OperandCycles, ForwardingPaths);
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}
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