83c9dea1ba
in place. To do per-cpu stats, convert all fields that previously were
maintained in the vmmeters that sit in pcpus to counter(9).
- Since some vmmeter stats may be touched at very early stages of boot,
before we have set up UMA and we can do counter_u64_alloc(), provide an
early counter mechanism:
o Leave one spare uint64_t in struct pcpu, named pc_early_dummy_counter.
o Point counter(9) fields of vmmeter to pcpu[0].pc_early_dummy_counter,
so that at early stages of boot, before counters are allocated we already
point to a counter that can be safely written to.
o For sparc64 that required a whole dummy pcpu[MAXCPU] array.
Further related changes:
- Don't include vmmeter.h into pcpu.h.
- vm.stats.vm.v_swappgsout and vm.stats.vm.v_swappgsin changed to 64-bit,
to match kernel representation.
- struct vmmeter hidden under _KERNEL, and only vmstat(1) is an exclusion.
This is based on benno@'s 4-year old patch:
https://lists.freebsd.org/pipermail/freebsd-arch/2013-July/014471.html
Reviewed by: kib, gallatin, marius, lidl
Differential Revision: https://reviews.freebsd.org/D10156
181 lines
4.4 KiB
C
181 lines
4.4 KiB
C
/*-
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* Copyright (c) 2012 Konstantin Belousov <kib@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __MACHINE_COUNTER_H__
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#define __MACHINE_COUNTER_H__
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#include <sys/pcpu.h>
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#ifdef INVARIANTS
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#include <sys/proc.h>
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#endif
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#include <machine/md_var.h>
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#include <machine/specialreg.h>
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extern struct pcpu __pcpu[];
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#define EARLY_COUNTER &__pcpu[0].pc_early_dummy_counter
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#define counter_enter() do { \
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if ((cpu_feature & CPUID_CX8) == 0) \
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critical_enter(); \
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} while (0)
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#define counter_exit() do { \
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if ((cpu_feature & CPUID_CX8) == 0) \
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critical_exit(); \
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} while (0)
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static inline void
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counter_64_inc_8b(uint64_t *p, int64_t inc)
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{
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__asm __volatile(
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"movl %%fs:(%%esi),%%eax\n\t"
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"movl %%fs:4(%%esi),%%edx\n"
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"1:\n\t"
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"movl %%eax,%%ebx\n\t"
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"movl %%edx,%%ecx\n\t"
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"addl (%%edi),%%ebx\n\t"
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"adcl 4(%%edi),%%ecx\n\t"
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"cmpxchg8b %%fs:(%%esi)\n\t"
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"jnz 1b"
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:
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: "S" ((char *)p - (char *)&__pcpu[0]), "D" (&inc)
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: "memory", "cc", "eax", "edx", "ebx", "ecx");
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}
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#ifdef IN_SUBR_COUNTER_C
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static inline uint64_t
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counter_u64_read_one_8b(uint64_t *p)
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{
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uint32_t res_lo, res_high;
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__asm __volatile(
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"movl %%eax,%%ebx\n\t"
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"movl %%edx,%%ecx\n\t"
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"cmpxchg8b (%2)"
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: "=a" (res_lo), "=d"(res_high)
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: "SD" (p)
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: "cc", "ebx", "ecx");
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return (res_lo + ((uint64_t)res_high << 32));
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}
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static inline uint64_t
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counter_u64_fetch_inline(uint64_t *p)
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{
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uint64_t res;
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int i;
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res = 0;
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if ((cpu_feature & CPUID_CX8) == 0) {
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/*
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* The machines without cmpxchg8b are not SMP.
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* Disabling the preemption provides atomicity of the
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* counter reading, since update is done in the
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* critical section as well.
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*/
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critical_enter();
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CPU_FOREACH(i) {
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res += *(uint64_t *)((char *)p +
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sizeof(struct pcpu) * i);
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}
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critical_exit();
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} else {
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CPU_FOREACH(i)
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res += counter_u64_read_one_8b((uint64_t *)((char *)p +
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sizeof(struct pcpu) * i));
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}
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return (res);
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}
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static inline void
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counter_u64_zero_one_8b(uint64_t *p)
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{
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__asm __volatile(
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"movl (%0),%%eax\n\t"
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"movl 4(%0),%%edx\n"
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"xorl %%ebx,%%ebx\n\t"
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"xorl %%ecx,%%ecx\n\t"
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"1:\n\t"
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"cmpxchg8b (%0)\n\t"
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"jnz 1b"
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:
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: "SD" (p)
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: "memory", "cc", "eax", "edx", "ebx", "ecx");
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}
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static void
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counter_u64_zero_one_cpu(void *arg)
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{
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uint64_t *p;
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p = (uint64_t *)((char *)arg + sizeof(struct pcpu) * PCPU_GET(cpuid));
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counter_u64_zero_one_8b(p);
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}
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static inline void
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counter_u64_zero_inline(counter_u64_t c)
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{
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int i;
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if ((cpu_feature & CPUID_CX8) == 0) {
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critical_enter();
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CPU_FOREACH(i)
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*(uint64_t *)((char *)c + sizeof(struct pcpu) * i) = 0;
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critical_exit();
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} else {
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smp_rendezvous(smp_no_rendezvous_barrier,
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counter_u64_zero_one_cpu, smp_no_rendezvous_barrier, c);
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}
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}
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#endif
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#define counter_u64_add_protected(c, inc) do { \
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if ((cpu_feature & CPUID_CX8) == 0) { \
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CRITICAL_ASSERT(curthread); \
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*(uint64_t *)zpcpu_get(c) += (inc); \
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} else \
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counter_64_inc_8b((c), (inc)); \
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} while (0)
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static inline void
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counter_u64_add(counter_u64_t c, int64_t inc)
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{
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if ((cpu_feature & CPUID_CX8) == 0) {
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critical_enter();
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*(uint64_t *)zpcpu_get(c) += inc;
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critical_exit();
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} else {
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counter_64_inc_8b(c, inc);
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}
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}
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#endif /* ! __MACHINE_COUNTER_H__ */
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