f808f2ce3e
(an Intel Stratix 10 GX/SX FPGA Development Kit). Set the bus speed manually due to lack of clock management support. Sponsored by: DARPA, AFRL |
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.. | ||
host | ||
bridge.h | ||
mmc_ioctl.h | ||
mmc_private.h | ||
mmc_subr.c | ||
mmc_subr.h | ||
mmc.c | ||
mmcbr_if.m | ||
mmcbrvar.h | ||
mmcbus_if.m | ||
mmcreg.h | ||
mmcsd.c | ||
mmcvar.h |