321 lines
9.0 KiB
C
321 lines
9.0 KiB
C
/* $NetBSD: nsphy.c,v 1.18 1999/07/14 23:57:36 thorpej Exp $ */
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-NetBSD AND BSD-2-Clause
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*
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1997 Manuel Bouyer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* driver for National Semiconductor's DP83840A ethernet 10/100 PHY
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* Data Sheet available from www.national.com
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include "miidevs.h"
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#include <dev/mii/nsphyreg.h>
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#include "miibus_if.h"
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static int nsphy_probe(device_t);
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static int nsphy_attach(device_t);
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static device_method_t nsphy_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, nsphy_probe),
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DEVMETHOD(device_attach, nsphy_attach),
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DEVMETHOD(device_detach, mii_phy_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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static devclass_t nsphy_devclass;
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static driver_t nsphy_driver = {
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"nsphy",
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nsphy_methods,
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sizeof(struct mii_softc)
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};
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DRIVER_MODULE(nsphy, miibus, nsphy_driver, nsphy_devclass, 0, 0);
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static int nsphy_service(struct mii_softc *, struct mii_data *, int);
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static void nsphy_status(struct mii_softc *);
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static void nsphy_reset(struct mii_softc *);
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static const struct mii_phydesc nsphys[] = {
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MII_PHY_DESC(xxNATSEMI, DP83840),
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MII_PHY_END
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};
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static const struct mii_phy_funcs nsphy_funcs = {
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nsphy_service,
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nsphy_status,
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nsphy_reset
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};
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static int
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nsphy_probe(device_t dev)
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{
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return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT));
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}
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static int
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nsphy_attach(device_t dev)
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{
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mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &nsphy_funcs, 1);
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return (0);
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}
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static int
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nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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int reg;
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switch (cmd) {
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case MII_POLLSTAT:
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break;
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case MII_MEDIACHG:
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reg = PHY_READ(sc, MII_NSPHY_PCR);
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/*
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* Set up the PCR to use LED4 to indicate full-duplex
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* in both 10baseT and 100baseTX modes.
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*/
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reg |= PCR_LED4MODE;
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/*
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* Make sure Carrier Integrity Monitor function is
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* disabled (normal for Node operation, but sometimes
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* it's not set?!)
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*/
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reg |= PCR_CIMDIS;
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/*
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* Make sure "force link good" is set to normal mode.
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* It's only intended for debugging.
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*/
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reg |= PCR_FLINK100;
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/*
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* Mystery bits which are supposedly `reserved',
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* but we seem to need to set them when the PHY
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* is connected to some interfaces:
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*
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* 0x0400 is needed for fxp
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* (Intel EtherExpress Pro 10+/100B, 82557 chip)
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* (nsphy with a DP83840 chip)
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* 0x0100 may be needed for some other card
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*/
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reg |= 0x0100 | 0x0400;
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if (mii_phy_mac_match(sc, "fxp"))
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PHY_WRITE(sc, MII_NSPHY_PCR, reg);
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mii_phy_setmedia(sc);
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break;
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case MII_TICK:
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if (mii_phy_tick(sc) == EJUSTRETURN)
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return (0);
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break;
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}
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/* Update the media status. */
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PHY_STATUS(sc);
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return (0);
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}
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static void
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nsphy_status(struct mii_softc *sc)
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{
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struct mii_data *mii = sc->mii_pdata;
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int bmsr, bmcr, par, anlpar;
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mii->mii_media_status = IFM_AVALID;
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mii->mii_media_active = IFM_ETHER;
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bmsr = PHY_READ(sc, MII_BMSR) |
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PHY_READ(sc, MII_BMSR);
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if (bmsr & BMSR_LINK)
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mii->mii_media_status |= IFM_ACTIVE;
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bmcr = PHY_READ(sc, MII_BMCR);
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if (bmcr & BMCR_ISO) {
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mii->mii_media_active |= IFM_NONE;
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mii->mii_media_status = 0;
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return;
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}
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if (bmcr & BMCR_LOOP)
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mii->mii_media_active |= IFM_LOOP;
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if (bmcr & BMCR_AUTOEN) {
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/*
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* The PAR status bits are only valid if autonegotiation
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* has completed (or it's disabled).
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*/
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if ((bmsr & BMSR_ACOMP) == 0) {
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/* Erg, still trying, I guess... */
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mii->mii_media_active |= IFM_NONE;
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return;
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}
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/*
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* Argh. The PAR doesn't seem to indicate duplex mode
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* properly! Determine media based on link partner's
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* advertised capabilities.
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*/
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if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
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anlpar = PHY_READ(sc, MII_ANAR) &
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PHY_READ(sc, MII_ANLPAR);
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if (anlpar & ANLPAR_TX_FD)
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mii->mii_media_active |= IFM_100_TX|IFM_FDX;
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else if (anlpar & ANLPAR_T4)
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mii->mii_media_active |= IFM_100_T4|IFM_HDX;
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else if (anlpar & ANLPAR_TX)
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mii->mii_media_active |= IFM_100_TX|IFM_HDX;
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else if (anlpar & ANLPAR_10_FD)
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mii->mii_media_active |= IFM_10_T|IFM_FDX;
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else if (anlpar & ANLPAR_10)
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mii->mii_media_active |= IFM_10_T|IFM_HDX;
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else
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mii->mii_media_active |= IFM_NONE;
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if ((mii->mii_media_active & IFM_FDX) != 0)
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mii->mii_media_active |=
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mii_phy_flowstatus(sc);
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return;
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}
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/*
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* Link partner is not capable of autonegotiation.
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* We will never be in full-duplex mode if this is
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* the case, so reading the PAR is OK.
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*/
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par = PHY_READ(sc, MII_NSPHY_PAR);
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if (par & PAR_10)
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mii->mii_media_active |= IFM_10_T;
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else
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mii->mii_media_active |= IFM_100_TX;
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mii->mii_media_active |= IFM_HDX;
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} else
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mii->mii_media_active = ife->ifm_media;
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}
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static void
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nsphy_reset(struct mii_softc *sc)
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{
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struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
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int reg, i;
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if (sc->mii_flags & MIIF_NOISOLATE)
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reg = BMCR_RESET;
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else
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reg = BMCR_RESET | BMCR_ISO;
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PHY_WRITE(sc, MII_BMCR, reg);
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/*
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* It is best to allow a little time for the reset to settle
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* in before we start polling the BMCR again. Notably, the
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* DP83840A manuals state that there should be a 500us delay
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* between asserting software reset and attempting MII serial
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* operations. Be conservative.
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*/
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DELAY(1000);
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/*
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* Wait another 2s for it to complete.
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* This is only a little overkill as under normal circumstances
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* the PHY can take up to 1s to complete reset.
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* This is also a bit odd because after a reset, the BMCR will
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* clear the reset bit and simply reports 0 even though the reset
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* is not yet complete.
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*/
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for (i = 0; i < 1000; i++) {
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reg = PHY_READ(sc, MII_BMCR);
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if (reg != 0 && (reg & BMCR_RESET) == 0)
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break;
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DELAY(2000);
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}
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if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
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if ((ife == NULL && sc->mii_inst != 0) ||
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(ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))
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PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
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}
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}
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