161c415133
* Use the right incantation to get the next stack pointer. Since powerpc uses special frames for traps, dereferencing the stack pointer straight up won't get us the next stack pointer in every case. * Clear EE using the correct instruction sequence. The PowerISA states that 'andi.' ANDs the register with 0||<imm>, instead of sign extending or filling out the unavailable bits with 1. Even if it did sign extend, PSL_EE is 0x8000, so ~PSL_EE is 0x7fff, and the upper bits would be cleared. Use rlwinm in the 32-bit case, and a two-rotate sequence in the 64-bit case, the latter chosen to follow the output generated by gcc. MFC after: 1 week
177 lines
3.1 KiB
ArmAsm
177 lines
3.1 KiB
ArmAsm
/*
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* CDDL HEADER START
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*
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* The contents of this file are subject to the terms of the
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* Common Development and Distribution License, Version 1.0 only
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* (the "License"). You may not use this file except in compliance
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* with the License.
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*
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* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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* or http://www.opensolaris.org/os/licensing.
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* See the License for the specific language governing permissions
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* and limitations under the License.
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*
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* When distributing Covered Code, include this CDDL HEADER in each
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* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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* If applicable, add the following below this CDDL HEADER, with the
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* fields enclosed by brackets "[]" replaced with your own identifying
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* information: Portions Copyright [yyyy] [name of copyright owner]
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*
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* CDDL HEADER END
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*
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* Portions Copyright 2012,2013 Justin Hibbits <jhibbits@freebsd.org>
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*
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* $FreeBSD$
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*/
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/*
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* Copyright 2004 Sun Microsystems, Inc. All rights reserved.
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* Use is subject to license terms.
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*/
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#include "assym.s"
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#define _ASM
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#include <sys/cpuvar_defs.h>
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#include <sys/dtrace.h>
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#include <machine/asm.h>
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/*
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#include <machine/cpu.h>
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*/
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/*
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* Primitives
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*/
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.text
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/*
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void dtrace_membar_producer(void)
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*/
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ASENTRY_NOPROF(dtrace_membar_producer)
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sync
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blr
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END(dtrace_membar_producer)
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/*
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void dtrace_membar_consumer(void)
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*/
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ASENTRY_NOPROF(dtrace_membar_consumer)
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isync
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blr
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END(dtrace_membar_consumer)
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/*
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dtrace_icookie_t dtrace_interrupt_disable(void)
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*/
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ASENTRY_NOPROF(dtrace_interrupt_disable)
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mfmsr %r3
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#ifdef __powerpc64__
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/* Two-instruction sequence to clear EE flag */
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rldicl %r0,%r3,48,1
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rotldi %r0,%r0,16
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#else
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rlwinm %r0,%r3,0,~PSL_EE /* Clear EE flag */
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#endif
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mtmsr %r0
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blr
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END(dtrace_interrupt_disable)
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/*
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void dtrace_interrupt_enable(dtrace_icookie_t cookie)
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*/
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ASENTRY_NOPROF(dtrace_interrupt_enable)
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mtmsr %r3
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blr
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END(dtrace_interrupt_enable)
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/*
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uint32_t dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new)
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*/
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ASENTRY_NOPROF(dtrace_cas32)
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1:
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lwarx %r0,0,%r3
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cmpw %r4,%r0
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bne 2f
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stwcx. %r5,0,%r3
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bne 1b
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2: mr %r3,%r0
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blr
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END(dtrace_cas32)
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/*
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void *
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dtrace_casptr(void *target, void *cmp, void *new)
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*/
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ASENTRY_NOPROF(dtrace_casptr)
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#ifdef __powerpc64__
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1:
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ldarx %r0,0,%r3
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cmpd %r4,%r0
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bne 2f
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stdcx. %r5,0,%r3
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bne 1b
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#else
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1:
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lwarx %r0,0,%r3
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cmpw %r4,%r0
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bne 2f
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stwcx. %r5,0,%r3
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bne 1b
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#endif
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2: mr %r3,%r0
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blr
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END(dtrace_casptr)
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/*
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XXX: unoptimized
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void
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dtrace_copy(uintptr_t src, uintptr_t dest, size_t size)
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*/
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ASENTRY_NOPROF(dtrace_copy)
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subi %r7,%r3,1
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subi %r8,%r4,1
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mtctr %r5
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1:
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lbzu %r3,1(%r7)
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stbu %r3,1(%r8)
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bdnz 1b
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2:
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blr
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END(dtrace_copy)
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/*
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void
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dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size,
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volatile uint16_t *flags)
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*/
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ASENTRY_NOPROF(dtrace_copystr)
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addme %r7,%r3
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addme %r8,%r4
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1:
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lbzu %r3,1(%r7)
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stbu %r3,1(%r8)
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addme %r5,%r5
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beq 2f
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or %r3,%r3,%r3
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beq 2f
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andi. %r0,%r5,0x0fff
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beq 2f
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lwz %r0,0(%r6)
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andi. %r0,%r0,CPU_DTRACE_BADADDR
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beq 1b
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2:
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blr
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END(dtrace_copystr)
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/*
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uintptr_t
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dtrace_caller(int aframes)
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*/
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ASENTRY_NOPROF(dtrace_caller)
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li %r3, -1
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blr
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END(dtrace_caller)
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