Nathan Whitehorn f9edb09d70 Move the powerpc64 direct map base address from zero to high memory. This ... accomplishes a few things: - Makes NULL an invalid address in the kernel, which is useful for catching bugs. - Lays groundwork for radix-tree translation on POWER9, which requires the direct map be at high memory. - Similarly lays groundwork for a direct map on 64-bit Book-E. The new base address is chosen as the base of the fourth radix quadrant (the minimum kernel address in this translation mode) and because all supported CPUs ignore at least the first two bits of addresses in real mode, allowing direct-map addresses to be used in real-mode handlers. This is required by Linux and is part of the architecture standard starting in POWER ISA 3, so can be relied upon. Reviewed by: jhibbits, Breno Leitao Differential Revision: D14499		2018-03-07 17:08:07 +00:00
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aim_machdep.c	Move the powerpc64 direct map base address from zero to high memory. This	2018-03-07 17:08:07 +00:00
locore32.S	Use the cookie now set by loader to determine whether the value passed to	2017-11-26 03:53:20 +00:00
locore64.S	PowerNV: Put processor to power-save state in idle thread	2018-02-21 14:28:40 +00:00
locore.S
mmu_oea64.c	Move the powerpc64 direct map base address from zero to high memory. This	2018-03-07 17:08:07 +00:00
mmu_oea64.h	sys/powerpc: further adoption of SPDX licensing ID tags.	2017-11-27 15:09:59 +00:00
mmu_oea.c	vm_wait() rework.	2018-02-20 10:13:13 +00:00
moea64_if.m
moea64_native.c	Move the powerpc64 direct map base address from zero to high memory. This	2018-03-07 17:08:07 +00:00
mp_cpudep.c	PowerNV: Put processor to power-save state in idle thread	2018-02-21 14:28:40 +00:00
slb.c	Move the powerpc64 direct map base address from zero to high memory. This	2018-03-07 17:08:07 +00:00
trap_subr32.S	Use the explicit expanded form of cmp.	2017-01-18 03:42:21 +00:00
trap_subr64.S	Move the powerpc64 direct map base address from zero to high memory. This	2018-03-07 17:08:07 +00:00