7e14be0b07
This is useful for bhyve, which otherwise has to use /dev/io to handle accesses to I/O port BARs when PCI passthrough is in use. Reviewed by: imp, kib Discussed with: jhb MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D31307
710 lines
20 KiB
Groff
710 lines
20 KiB
Groff
.\"
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.\" Copyright (c) 1999 Kenneth D. Merry.
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. The name of the author may not be used to endorse or promote products
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.\" derived from this software without specific prior written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd August 13, 2021
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.Dt PCI 4
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.Os
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.Sh NAME
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.Nm pci
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.Nd generic PCI/PCIe bus driver
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.Sh SYNOPSIS
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To compile the PCI bus driver into the kernel,
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place the following line in your
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kernel configuration file:
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.Bd -ragged -offset indent
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.Cd device pci
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.Ed
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.Pp
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To compile in support for Single Root I/O Virtualization
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.Pq SR-IOV :
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.Bd -ragged -offset indent
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.Cd options PCI_IOV
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.Ed
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.Pp
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To compile in support for native PCI-express HotPlug:
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.Bd -ragged -offset indent
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.Cd options PCI_HP
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.Ed
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for
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.Tn PCI
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and
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.Tn PCIe
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devices in the kernel and limited access to
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.Tn PCI
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devices for userland.
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.Pp
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The
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.Nm
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driver provides a
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.Pa /dev/pci
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character device that can be used by userland programs to read and write
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.Tn PCI
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configuration registers.
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Programs can also use this device to get a list of all
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.Tn PCI
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devices, or all
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.Tn PCI
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devices that match various patterns.
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.Pp
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Since the
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.Nm
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driver provides a write interface for
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.Tn PCI
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configuration registers, system administrators should exercise caution when
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granting access to the
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.Nm
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device.
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If used improperly, this driver can allow userland applications to
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crash a machine or cause data loss.
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In particular, driver only allows operations on the opened
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.Pa /dev/pci
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to modify system state if the file descriptor was opened for writing.
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For instance, the
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.Dv PCIOCREAD
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and
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.Dv PCIOCBARMMAP
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operations require a writeable descriptor, because reading a config register
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or a BAR read access could have function-specific side-effects.
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.Pp
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The
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.Nm
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driver implements the
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.Tn PCI
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bus in the kernel.
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It enumerates any devices on the
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.Tn PCI
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bus and gives
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.Tn PCI
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client drivers the chance to attach to them.
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It assigns resources to children, when the BIOS does not.
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It takes care of routing interrupts when necessary.
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It reprobes the unattached
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.Tn PCI
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children when
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.Tn PCI
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client drivers are dynamically
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loaded at runtime.
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The
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.Nm
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driver also includes support for PCI-PCI bridges,
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various platform-specific Host-PCI bridges,
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and basic support for
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.Tn PCI
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VGA adapters.
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.Sh IOCTLS
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The following
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.Xr ioctl 2
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calls are supported by the
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.Nm
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driver.
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They are defined in the header file
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.In sys/pciio.h .
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.Bl -tag -width 012345678901234
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.It PCIOCGETCONF
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This
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.Xr ioctl 2
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takes a
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.Va pci_conf_io
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structure.
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It allows the user to retrieve information on all
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.Tn PCI
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devices in the system, or on
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.Tn PCI
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devices matching patterns supplied by the user.
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The call may set
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.Va errno
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to any value specified in either
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.Xr copyin 9
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or
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.Xr copyout 9 .
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The
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.Va pci_conf_io
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structure consists of a number of fields:
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.Bl -tag -width match_buf_len
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.It pat_buf_len
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The length, in bytes, of the buffer filled with user-supplied patterns.
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.It num_patterns
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The number of user-supplied patterns.
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.It patterns
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Pointer to a buffer filled with user-supplied patterns.
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.Va patterns
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is a pointer to
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.Va num_patterns
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.Va pci_match_conf
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structures.
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The
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.Va pci_match_conf
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structure consists of the following elements:
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.Bl -tag -width pd_vendor
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.It pc_sel
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.Tn PCI
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domain, bus, slot and function.
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.It pd_name
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.Tn PCI
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device driver name.
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.It pd_unit
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.Tn PCI
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device driver unit number.
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.It pc_vendor
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.Tn PCI
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vendor ID.
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.It pc_device
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.Tn PCI
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device ID.
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.It pc_class
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.Tn PCI
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device class.
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.It flags
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The flags describe which of the fields the kernel should match against.
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A device must match all specified fields in order to be returned.
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The match flags are enumerated in the
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.Va pci_getconf_flags
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structure.
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Hopefully the flag values are obvious enough that they do not need to
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described in detail.
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.El
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.It match_buf_len
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Length of the
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.Va matches
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buffer allocated by the user to hold the results of the
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.Dv PCIOCGETCONF
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query.
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.It num_matches
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Number of matches returned by the kernel.
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.It matches
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Buffer containing matching devices returned by the kernel.
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The items in this buffer are of type
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.Va pci_conf ,
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which consists of the following items:
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.Bl -tag -width pc_subvendor
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.It pc_sel
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.Tn PCI
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domain, bus, slot and function.
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.It pc_hdr
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.Tn PCI
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header type.
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.It pc_subvendor
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.Tn PCI
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subvendor ID.
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.It pc_subdevice
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.Tn PCI
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subdevice ID.
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.It pc_vendor
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.Tn PCI
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vendor ID.
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.It pc_device
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.Tn PCI
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device ID.
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.It pc_class
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.Tn PCI
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device class.
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.It pc_subclass
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.Tn PCI
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device subclass.
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.It pc_progif
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.Tn PCI
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device programming interface.
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.It pc_revid
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.Tn PCI
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revision ID.
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.It pd_name
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Driver name.
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.It pd_unit
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Driver unit number.
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.El
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.It offset
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The offset is passed in by the user to tell the kernel where it should
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start traversing the device list.
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The value passed out by the kernel
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points to the record immediately after the last one returned.
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The user may
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pass the value returned by the kernel in subsequent calls to the
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.Dv PCIOCGETCONF
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ioctl.
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If the user does not intend to use the offset, it must be set to zero.
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.It generation
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.Tn PCI
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configuration generation.
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This value only needs to be set if the offset is set.
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The kernel will compare the current generation number of its internal
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device list to the generation passed in by the user to determine whether
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its device list has changed since the user last called the
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.Dv PCIOCGETCONF
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ioctl.
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If the device list has changed, a status of
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.Va PCI_GETCONF_LIST_CHANGED
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will be passed back.
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.It status
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The status tells the user the disposition of his request for a device list.
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The possible status values are:
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.Bl -ohang
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.It PCI_GETCONF_LAST_DEVICE
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This means that there are no more devices in the PCI device list matching
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the specified criteria after the
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ones returned in the
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.Va matches
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buffer.
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.It PCI_GETCONF_LIST_CHANGED
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This status tells the user that the
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.Tn PCI
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device list has changed since his last call to the
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.Dv PCIOCGETCONF
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ioctl and he must reset the
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.Va offset
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and
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.Va generation
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to zero to start over at the beginning of the list.
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.It PCI_GETCONF_MORE_DEVS
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This tells the user that his buffer was not large enough to hold all of the
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remaining devices in the device list that match his criteria.
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.It PCI_GETCONF_ERROR
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This indicates a general error while servicing the user's request.
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If the
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.Va pat_buf_len
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is not equal to
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.Va num_patterns
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times
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.Fn sizeof "struct pci_match_conf" ,
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.Va errno
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will be set to
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.Er EINVAL .
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.El
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.El
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.It PCIOCREAD
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This
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.Xr ioctl 2
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reads the
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.Tn PCI
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configuration registers specified by the passed-in
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.Va pci_io
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structure.
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The
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.Va pci_io
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structure consists of the following fields:
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.Bl -tag -width pi_width
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.It pi_sel
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A
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.Va pcisel
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structure which specifies the domain, bus, slot and function the user would
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like to query.
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If the specific bus is not found, errno will be set to ENODEV and -1 returned
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from the ioctl.
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.It pi_reg
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The
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.Tn PCI
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configuration registers the user would like to access.
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.It pi_width
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The width, in bytes, of the data the user would like to read.
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This value
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may be either 1, 2, or 4.
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3-byte reads and reads larger than 4 bytes are
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not supported.
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If an invalid width is passed, errno will be set to EINVAL.
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.It pi_data
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The data returned by the kernel.
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.El
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.It PCIOCWRITE
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This
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.Xr ioctl 2
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allows users to write to the
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.Tn PCI
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configuration registers specified in the passed-in
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.Va pci_io
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structure.
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The
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.Va pci_io
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structure is described above.
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The limitations on data width described for
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reading registers, above, also apply to writing
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.Tn PCI
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configuration registers.
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.It PCIOCATTACHED
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This
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.Xr ioctl 2
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allows users to query if a driver is attached to the
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.Tn PCI
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device specified in the passed-in
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.Va pci_io
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structure.
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The
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.Va pci_io
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structure is described above, however, the
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.Va pi_reg
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and
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.Va pi_width
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fields are not used.
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The status of the device is stored in the
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.Va pi_data
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field.
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A value of 0 indicates no driver is attached, while a value larger than 0
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indicates that a driver is attached.
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.It PCIOCBARMMAP
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This
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.Xr ioctl 2
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command allows userspace processes to
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.Xr mmap 2
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the memory-mapped PCI BAR into its address space.
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The input parameters and results are passed in the
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.Va pci_bar_mmap
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structure, which has the following fields:
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.Bl -tag -width Vt struct pcise pbm_sel
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.It Vt uint64_t pbm_map_base
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Reports the established mapping base to the caller.
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If
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.Va PCIIO_BAR_MMAP_FIXED
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flag was specified, then this field must be filled before the call
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with the desired address for the mapping.
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.It Vt uint64_t pbm_map_length
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Reports the mapped length of the BAR, in bytes.
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Its .Vt uint64_t value is always multiple of machine pages.
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.It Vt int64_t pbm_bar_length
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Reports length of the bar as exposed by the device.
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.It Vt int pbm_bar_off
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Reports offset from the mapped base to the start of the
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first register in the bar.
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.It Vt struct pcisel pbm_sel
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Should be filled before the call.
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Describes the device to operate on.
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.It Vt int pbm_reg
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The BAR index to mmap.
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.It Vt int pbm_flags
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Flags which augments the operation.
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See below.
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.It Vt int pbm_memattr
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The caching attribute for the mapping.
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Typical values are
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.Dv VM_MEMATTR_UNCACHEABLE
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for control registers BARs, and
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.Dv VM_MEMATTR_WRITE_COMBINING
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for frame buffers.
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Regular memory-like BAR should be mapped with
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.Dv VM_MEMATTR_DEFAULT
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attribute.
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.El
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.Pp
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Currently defined flags are:
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.Bl -tag -width PCIIO_BAR_MMAP_ACTIVATE
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.It PCIIO_BAR_MMAP_FIXED
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The resulted mappings should be established at the address
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specified by the
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.Va pbm_map_base
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member, otherwise fail.
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.It PCIIO_BAR_MMAP_EXCL
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Must be used together with
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.Dv PCIIO_BAR_MMAP_FIXED
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If the specified base contains already established mappings, the
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operation fails instead of implicitly unmapping them.
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.It PCIIO_BAR_MMAP_RW
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The requested mapping allows both reading and writing.
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Without the flag, read-only mapping is established.
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Note that it is common for the device registers to have side-effects
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even on reads.
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.It PCIIO_BAR_MMAP_ACTIVATE
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(Unimplemented) If the BAR is not activated, activate it in the course
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of mapping.
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Currently attempt to mmap an inactive BAR results in error.
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.El
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.It PCIOCBARIO
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This
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.Xr ioctl 2
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command allows users to read from and write to BARs.
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The I/O request parameters are passed in a
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.Va struct pci_bar_ioreq
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structure, which has the following fields:
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.Bl -tag
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.It Vt struct pcisel pbi_sel
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Describes the device to operate on.
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.It Vt int pbi_op
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The operation to perform.
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Currently supported values are
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.Dv PCIBARIO_READ
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and
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.Dv PCIBARIO_WRITE .
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.It Vt uint32_t pbi_bar
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The index of the BAR on which to operate.
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.It Vt uint32_t pbi_offset
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The offset into the BAR at which to operate.
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.It Vt uint32_t pbi_width
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The size, in bytes, of the I/O operation.
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1-byte, 2-byte, 4-byte and 8-byte perations are supported.
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.It Vt uint32_t pbi_value
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For reads, the value is returned in this field.
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For writes, the caller specifies the value to be written in this field.
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.Pp
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Note that this operation maps and unmaps the corresponding resource and
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so is relatively expensive for memory BARs.
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The
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.Va PCIOCBARMMAP
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.Xr ioctl 2
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can be used to create a persistent userspace mapping for such BARs instead.
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.El
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.El
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.Sh LOADER TUNABLES
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Tunables can be set at the
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.Xr loader 8
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prompt before booting the kernel, or stored in
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.Xr loader.conf 5 .
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The current value of these tunables can be examined at runtime via
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.Xr sysctl 8
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nodes of the same name.
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Unless otherwise specified,
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each of these tunables is a boolean that can be enabled by setting the
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tunable to a non-zero value.
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.Bl -tag -width indent
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.It Va hw.pci.clear_bars Pq Defaults to 0
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Ignore any firmware-assigned memory and I/O port resources.
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This forces the
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.Tn PCI
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bus driver to allocate resource ranges for memory and I/O port resources
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from scratch.
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.It Va hw.pci.clear_buses Pq Defaults to 0
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Ignore any firmware-assigned bus number registers in PCI-PCI bridges.
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This forces the
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.Tn PCI
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bus driver and PCI-PCI bridge driver to allocate bus numbers for secondary
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buses behind PCI-PCI bridges.
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.It Va hw.pci.clear_pcib Pq Defaults to 0
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Ignore any firmware-assigned memory and I/O port resource windows in PCI-PCI
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bridges.
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This forces the PCI-PCI bridge driver to allocate memory and I/O port resources
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for resource windows from scratch.
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.Pp
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By default the PCI-PCI bridge driver will allocate windows that
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contain the firmware-assigned resources devices behind the bridge.
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In addition, the PCI-PCI bridge driver will suballocate from existing window
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regions when possible to satisfy a resource request.
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As a result,
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both
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.Va hw.pci.clear_bars
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and
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.Va hw.pci.clear_pcib
|
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must be enabled to fully ignore firmware-supplied resource assignments.
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.It Va hw.pci.default_vgapci_unit Pq Defaults to -1
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By default,
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the first
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.Tn PCI
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VGA adapter encountered by the system is assumed to be the boot display device.
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This tunable can be set to choose a specific VGA adapter by specifying the
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unit number of the associated
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.Va vgapci Ns Ar X
|
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device.
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.It Va hw.pci.do_power_nodriver Pq Defaults to 0
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Place devices into a low power state
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.Pq D3
|
|
when a suitable device driver is not found.
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Can be set to one of the following values:
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.Bl -tag -width indent
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.It 3
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Powers down all
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.Tn PCI
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devices without a device driver.
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.It 2
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Powers down most devices without a device driver.
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PCI devices with the display, memory, and base peripheral device classes
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are not powered down.
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.It 1
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Similar to a setting of 2 except that storage controllers are also not
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powered down.
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.It 0
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All devices are left fully powered.
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.El
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.Pp
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A
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.Tn PCI
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device must support power management to be powered down.
|
|
Placing a device into a low power state may not reduce power consumption.
|
|
.It Va hw.pci.do_power_resume Pq Defaults to 1
|
|
Place
|
|
.Tn PCI
|
|
devices into the fully powered state when resuming either the system or an
|
|
individual device.
|
|
Setting this to zero is discouraged as the system will not attempt to power
|
|
up non-powered PCI devices after a suspend.
|
|
.It Va hw.pci.do_power_suspend Pq Defaults to 1
|
|
Place
|
|
.Tn PCI
|
|
devices into a low power state when suspending either the system or individual
|
|
devices.
|
|
Normally the D3 state is used as the low power state,
|
|
but firmware may override the desired power state during a system suspend.
|
|
.It Va hw.pci.enable_ari Pq Defaults to 1
|
|
Enable support for PCI-express Alternative RID Interpretation.
|
|
This is often used in conjunction with SR-IOV.
|
|
.It Va hw.pci.enable_io_modes Pq Defaults to 1
|
|
Enable memory or I/O port decoding in a PCI device's command register if it has
|
|
firmware-assigned memory or I/O port resources.
|
|
The firmware
|
|
.Pq BIOS
|
|
in some systems does not enable memory or I/O port decoding for some devices
|
|
even when it has assigned resources to the device.
|
|
This enables decoding for such resources during bus probe.
|
|
.It Va hw.pci.enable_msi Pq Defaults to 1
|
|
Enable support for Message Signalled Interrupts
|
|
.Pq MSI .
|
|
MSI interrupts can be disabled by setting this tunable to 0.
|
|
.It Va hw.pci.enable_msix Pq Defaults to 1
|
|
Enable support for extended Message Signalled Interrupts
|
|
.Pq MSI-X .
|
|
MSI-X interrupts can be disabled by setting this tunable to 0.
|
|
.It Va hw.pci.enable_pcie_hp Pq Defaults to 1
|
|
Enable support for native PCI-express HotPlug.
|
|
.It Va hw.pci.honor_msi_blacklist Pq Defaults to 1
|
|
MSI and MSI-X interrupts are disabled for certain chipsets known to have
|
|
broken MSI and MSI-X implementations when this tunable is set.
|
|
It can be set to zero to permit use of MSI and MSI-X interrupts if the
|
|
chipset match is a false positive.
|
|
.It Va hw.pci.iov_max_config Pq Defaults to 1MB
|
|
The maximum amount of memory permitted for the configuration parameters
|
|
used when creating Virtual Functions via SR-IOV.
|
|
This tunable can also be changed at runtime via
|
|
.Xr sysctl 8 .
|
|
.It Va hw.pci.realloc_bars Pq Defaults to 0
|
|
Attempt to allocate a new resource range during the initial device scan
|
|
for any memory or I/O port resources with firmware-assigned ranges that
|
|
conflict with another active resource.
|
|
.It Va hw.pci.usb_early_takeover Pq Defaults to 1 on Tn amd64 and Tn i386
|
|
Disable legacy device emulation of USB devices during the initial device
|
|
scan.
|
|
Set this tunable to zero to use USB devices via legacy emulation when
|
|
using a custom kernel without USB controller drivers.
|
|
.It Va hw.pci<D>.<B>.<S>.INT<P>.irq
|
|
These tunables can be used to override the interrupt routing for legacy
|
|
PCI INTx interrupts.
|
|
Unlike other tunables in this list,
|
|
these do not have corresponding sysctl nodes.
|
|
The tunable name includes the address of the PCI device as well as the
|
|
pin of the desired INTx IRQ to override:
|
|
.Bl -tag -width indent
|
|
.It <D>
|
|
The domain
|
|
.Pq or segment
|
|
of the PCI device in decimal.
|
|
.It <B>
|
|
The bus address of the PCI device in decimal.
|
|
.It <S>
|
|
The slot of the PCI device in decimal.
|
|
.It <P>
|
|
The interrupt pin of the PCI slot to override.
|
|
One of
|
|
.Ql A ,
|
|
.Ql B ,
|
|
.Ql C ,
|
|
or
|
|
.Ql D .
|
|
.El
|
|
.Pp
|
|
The value of the tunable is the raw IRQ value to use for the INTx interrupt
|
|
pin identified by the tunable name.
|
|
Mapping of IRQ values to platform interrupt sources is machine dependent.
|
|
.El
|
|
.Sh DEVICE WIRING
|
|
You can wire the device unit at a given location with device.hints.
|
|
Entries of the form
|
|
.Va hints.<name>.<unit>.at="pci<B>:<S>:<F>"
|
|
or
|
|
.Va hints.<name>.<unit>.at="pci<D>:<B>:<S>:<F>"
|
|
will force the driver
|
|
.Va name
|
|
to probe and attach at unit
|
|
.Va unit
|
|
for any PCI device found to match the specification, where:
|
|
.Bl -tag -width -indent
|
|
.It <D>
|
|
The domain
|
|
.Pq or segment
|
|
of the PCI device in decimal.
|
|
Defaults to 0 if unspecified
|
|
.It <B>
|
|
The bus address of the PCI device in decimal.
|
|
.It <S>
|
|
The slot of the PCI device in decimal.
|
|
.It <F>
|
|
The function of the PCI device in decimal.
|
|
.El
|
|
.Pp
|
|
The code to do the matching requires an exact string match.
|
|
Do not specify the angle brackets
|
|
.Pq < >
|
|
in the hints file.
|
|
Wiring multiple devices to the same
|
|
.Va name
|
|
and
|
|
.Va unit
|
|
produces undefined results.
|
|
.Ss Examples
|
|
Given the following lines in
|
|
.Pa /boot/device.hints :
|
|
.Cd hint.nvme.3.at="pci6:0:0"
|
|
.Cd hint.igb.8.at="pci14:0:0"
|
|
If there is a device that supports
|
|
.Xr igb 4
|
|
at PCI bus 14 slot 0 function 0,
|
|
then it will be assigned igb8 for probe and attach.
|
|
Likewise, if there is an
|
|
.Xr nvme 4
|
|
card at PCI bus 6 slot 0 function 0,
|
|
then it will be assigned nvme3 for probe and attach.
|
|
If another type of card is in either of these locations, the name and
|
|
unit of that card will be the default names and will be unaffected by
|
|
these hints.
|
|
If other igb or nvme cards are located elsewhere, they will be
|
|
assigned their unit numbers sequentially, skipping the unit numbers
|
|
that have 'at' hints.
|
|
.Sh FILES
|
|
.Bl -tag -width /dev/pci -compact
|
|
.It Pa /dev/pci
|
|
Character device for the
|
|
.Nm
|
|
driver.
|
|
.El
|
|
.Sh SEE ALSO
|
|
.Xr pciconf 8
|
|
.Sh HISTORY
|
|
The
|
|
.Nm
|
|
driver (not the kernel's
|
|
.Tn PCI
|
|
support code) first appeared in
|
|
.Fx 2.2 ,
|
|
and was written by Stefan Esser and Garrett Wollman.
|
|
Support for device listing and matching was re-implemented by
|
|
Kenneth Merry, and first appeared in
|
|
.Fx 3.0 .
|
|
.Sh AUTHORS
|
|
.An Kenneth Merry Aq Mt ken@FreeBSD.org
|
|
.Sh BUGS
|
|
It is not possible for users to specify an accurate offset into the device
|
|
list without calling the
|
|
.Dv PCIOCGETCONF
|
|
at least once, since they have no way of knowing the current generation
|
|
number otherwise.
|
|
This probably is not a serious problem, though, since
|
|
users can easily narrow their search by specifying a pattern or patterns
|
|
for the kernel to match against.
|