e9dcd83155
Submitted by: kib@ Approved by: hselasky (mentor) MFC after: 1 week Sponsored by: Mellanox Technologies
96 lines
2.8 KiB
C
96 lines
2.8 KiB
C
/*-
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* Copyright (c) 2017 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* $FreeBSD$
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*/
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#ifndef __MLX5_FPGA_IPSEC_H__
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#define __MLX5_FPGA_IPSEC_H__
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#include <dev/mlx5/mlx5_accel/ipsec.h>
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#ifdef CONFIG_MLX5_FPGA
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void *mlx5_fpga_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev,
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struct mlx5_accel_ipsec_sa *cmd);
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int mlx5_fpga_ipsec_sa_cmd_wait(void *context);
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u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev);
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unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev);
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int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
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unsigned int counters_count);
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int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev);
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void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev);
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#else
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static inline void *mlx5_fpga_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev,
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struct mlx5_accel_ipsec_sa *cmd)
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{
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return ERR_PTR(-EOPNOTSUPP);
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}
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static inline int mlx5_fpga_ipsec_sa_cmd_wait(void *context)
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{
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return -EOPNOTSUPP;
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}
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static inline u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev)
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{
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return 0;
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}
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static inline unsigned int
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mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev)
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{
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return 0;
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}
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static inline int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev,
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u64 *counters)
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{
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return 0;
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}
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static inline int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev)
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{
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return 0;
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}
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static inline void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev)
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{
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}
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#endif /* CONFIG_MLX5_FPGA */
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#endif /* __MLX5_FPGA_SADB_H__ */
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