d4fcf3cba5
and amd64. The optimization is a trivial on recent machines. Reviewed by: -arch (imp, marcel, dfr)
246 lines
5.5 KiB
C
246 lines
5.5 KiB
C
/*-
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*
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* Copyright (c) 2000 Andrew Miklic, Andrew Gallatin, and Thomas V. Crimi
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*/
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#include "opt_fb.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/conf.h>
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#include <sys/proc.h>
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#include <sys/fcntl.h>
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#include <sys/malloc.h>
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#include <sys/fbio.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/pmap.h>
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#include <machine/md_var.h>
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#include <machine/pc/bios.h>
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#include <machine/clock.h>
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#include <machine/bus.h>
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#include <machine/pc/vesa.h>
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#include <machine/resource.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/fb/fbreg.h>
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#include <dev/fb/tga.h>
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#include <dev/tga/tga_pci.h>
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#include <dev/fb/gfb.h>
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#include <dev/gfb/gfb_pci.h>
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static int tga_probe(device_t);
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static int tga_attach(device_t);
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static void tga_intr(void *);
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static device_method_t tga_methods[] = {
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DEVMETHOD(device_probe, tga_probe),
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DEVMETHOD(device_attach, tga_attach),
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DEVMETHOD(device_detach, pcigfb_detach),
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{ 0, 0 }
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};
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static driver_t tga_driver = {
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"tga",
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tga_methods,
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sizeof(struct gfb_softc)
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};
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static devclass_t tga_devclass;
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DRIVER_MODULE(tga, pci, tga_driver, tga_devclass, 0, 0);
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static struct gfb_type tga_devs[] = {
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{ DEC_VENDORID, DEC_DEVICEID_TGA,
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"DEC TGA (21030) 2D Graphics Accelerator" },
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{ 0, 0, NULL }
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};
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#ifdef FB_INSTALL_CDEV
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static struct cdevsw tga_cdevsw = {
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.d_version = D_VERSION,
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.d_flags = D_NEEDGIANT,
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.d_open = pcigfb_open,
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.d_close = pcigfb_close,
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.d_read = pcigfb_read,
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.d_write = pcigfb_write,
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.d_ioctl = pcigfb_ioctl,
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.d_mmap = pcigfb_mmap,
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.d_name = "tga",
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};
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#endif /* FB_INSTALL_CDEV */
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static int
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tga_probe(device_t dev)
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{
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int error;
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gfb_type_t t;
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t = tga_devs;
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error = ENXIO;
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while(t->name != NULL) {
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if((pci_get_vendor(dev) == t->vendor_id) &&
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(pci_get_device(dev) == t->device_id)) {
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device_set_desc(dev, t->name);
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error = BUS_PROBE_DEFAULT;
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break;
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}
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t++;
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}
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return(error);
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}
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static int
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tga_attach(device_t dev)
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{
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gfb_softc_t sc;
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int unit, error, rid;
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error = 0;
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unit = device_get_unit(dev);
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sc = device_get_softc(dev);
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sc->driver_name = TGA_DRIVER_NAME;
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switch(pci_get_device(dev)) {
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case DEC_DEVICEID_TGA2:
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sc->model = 1;
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sc->type = KD_TGA2;
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break;
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case DEC_DEVICEID_TGA:
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sc->model = 0;
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sc->type = KD_TGA;
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break;
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default:
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device_printf(dev, "Unrecognized TGA type\n");
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goto fail;
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}
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if((error = pcigfb_attach(dev))) {
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goto fail;
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}
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sc->regs = sc->bhandle + TGA_MEM_CREGS;
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error = bus_setup_intr(dev, sc->irq, INTR_TYPE_TTY, tga_intr, sc,
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&sc->intrhand);
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if(error) {
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device_printf(dev, "couldn't set up irq\n");
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goto fail;
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}
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switch(sc->rev) {
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case 0x1:
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case 0x2:
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case 0x3:
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device_printf(dev, "TGA (21030) step %c\n", 'A' + sc->rev - 1);
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break;
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case 0x20:
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device_printf(dev, "TGA2 (21130) abstract software model\n");
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break;
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case 0x21:
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case 0x22:
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device_printf(dev, "TGA2 (21130) pass %d\n", sc->rev - 0x20);
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break;
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default:
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device_printf(dev, "Unknown stepping (0x%x)\n", sc->rev);
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break;
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}
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#ifdef FB_INSTALL_CDEV
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sc->cdevsw = &tga_cdevsw;
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sc->devt = make_dev(sc->cdevsw, unit, UID_ROOT, GID_WHEEL, 0600,
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"tga%x", unit);
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#endif /* FB_INSTALL_CDEV */
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goto done;
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fail:
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if(sc->intrhand != NULL) {
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bus_teardown_intr(dev, sc->irq, sc->intrhand);
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sc->intrhand = NULL;
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}
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if(sc->irq != NULL) {
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rid = 0x0;
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bus_release_resource(dev, SYS_RES_IRQ, rid, sc->irq);
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sc->irq = NULL;
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}
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if(sc->res != NULL) {
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rid = GFB_MEM_BASE_RID;
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bus_release_resource(dev, SYS_RES_MEMORY, rid, sc->res);
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sc->res = NULL;
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}
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error = ENXIO;
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done:
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return(error);
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}
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static void
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tga_intr(void *v)
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{
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struct gfb_softc *sc = (struct gfb_softc *)v;
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u_int32_t reg;
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reg = READ_GFB_REGISTER(sc->adp, TGA_REG_SISR);
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if((reg & 0x00010001) != 0x00010001) {
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/* Odd. We never set any of the other interrupt enables. */
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if((reg & 0x1f) != 0) {
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/* Clear the mysterious pending interrupts. */
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WRITE_GFB_REGISTER(sc->adp, TGA_REG_SISR, (reg & 0x1f));
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GFB_REGISTER_WRITE_BARRIER(sc, TGA_REG_SISR, 1);
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/* This was our interrupt, even if we're puzzled as to
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* why we got it. Don't make the interrupt handler
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* think it was a stray.
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*/
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}
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}
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/* Call the scheduled handler... */
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sc->gfbc->ramdac_intr(sc);
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/*
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Clear interrupt field (this way, we will force a
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memory error if we get an unexpected interrupt)...
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*/
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sc->gfbc->ramdac_intr = NULL;
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/* Disable the interrupt... */
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WRITE_GFB_REGISTER(sc->adp, TGA_REG_SISR, 0x00000001);
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GFB_REGISTER_WRITE_BARRIER(sc, TGA_REG_SISR, 1);
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}
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