496 lines
12 KiB
C
496 lines
12 KiB
C
/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* Copyright (c) 2009, Luiz Otavio O Souza.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* GPIO driver for AR71xx
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <mips/atheros/ar71xxreg.h>
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#include <mips/atheros/ar71xx_setup.h>
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#include <mips/atheros/ar71xx_gpiovar.h>
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#include <mips/atheros/ar933xreg.h>
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#include <mips/atheros/ar934xreg.h>
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#include "gpio_if.h"
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#define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
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/*
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* Helpers
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*/
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static void ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc,
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uint32_t mask);
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static void ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc,
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uint32_t mask);
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static void ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc,
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struct gpio_pin *pin, uint32_t flags);
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/*
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* Driver stuff
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*/
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static int ar71xx_gpio_probe(device_t dev);
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static int ar71xx_gpio_attach(device_t dev);
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static int ar71xx_gpio_detach(device_t dev);
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static int ar71xx_gpio_filter(void *arg);
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static void ar71xx_gpio_intr(void *arg);
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/*
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* GPIO interface
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*/
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static int ar71xx_gpio_pin_max(device_t dev, int *maxpin);
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static int ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
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static int ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
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*flags);
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static int ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
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static int ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
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static int ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
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static int ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
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static int ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin);
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static void
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ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, uint32_t mask)
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{
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if (ar71xx_soc == AR71XX_SOC_AR9341 ||
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ar71xx_soc == AR71XX_SOC_AR9342 ||
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ar71xx_soc == AR71XX_SOC_AR9344)
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GPIO_SET_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
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else
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GPIO_SET_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
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}
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static void
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ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, uint32_t mask)
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{
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if (ar71xx_soc == AR71XX_SOC_AR9341 ||
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ar71xx_soc == AR71XX_SOC_AR9342 ||
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ar71xx_soc == AR71XX_SOC_AR9344)
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GPIO_CLEAR_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
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else
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GPIO_CLEAR_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
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}
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static void
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ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, struct gpio_pin *pin,
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unsigned int flags)
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{
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uint32_t mask;
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mask = 1 << pin->gp_pin;
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/*
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* Manage input/output
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*/
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if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
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pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
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if (flags & GPIO_PIN_OUTPUT) {
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pin->gp_flags |= GPIO_PIN_OUTPUT;
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GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask);
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}
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else {
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pin->gp_flags |= GPIO_PIN_INPUT;
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GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask);
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}
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}
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}
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static int
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ar71xx_gpio_pin_max(device_t dev, int *maxpin)
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{
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switch (ar71xx_soc) {
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case AR71XX_SOC_AR9130:
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case AR71XX_SOC_AR9132:
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*maxpin = AR91XX_GPIO_PINS - 1;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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*maxpin = AR724X_GPIO_PINS - 1;
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break;
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case AR71XX_SOC_AR9330:
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case AR71XX_SOC_AR9331:
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*maxpin = AR933X_GPIO_COUNT - 1;
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break;
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case AR71XX_SOC_AR9341:
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case AR71XX_SOC_AR9342:
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case AR71XX_SOC_AR9344:
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*maxpin = AR934X_GPIO_COUNT - 1;
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break;
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default:
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*maxpin = AR71XX_GPIO_PINS - 1;
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}
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return (0);
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}
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static int
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ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct ar71xx_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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*caps = sc->gpio_pins[i].gp_caps;
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct ar71xx_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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*flags = sc->gpio_pins[i].gp_flags;
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct ar71xx_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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int i;
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struct ar71xx_gpio_softc *sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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/* Check for unwanted flags. */
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if ((flags & sc->gpio_pins[i].gp_caps) != flags)
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return (EINVAL);
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/* Can't mix input/output together */
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if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) ==
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(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT))
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return (EINVAL);
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ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
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return (0);
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}
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static int
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ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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struct ar71xx_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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if (value)
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GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
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else
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GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
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return (0);
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}
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static int
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ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
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{
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struct ar71xx_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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*val = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
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return (0);
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}
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static int
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ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin)
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{
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int res, i;
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struct ar71xx_gpio_softc *sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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res = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
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if (res)
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GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
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else
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GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
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return (0);
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}
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static int
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ar71xx_gpio_filter(void *arg)
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{
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/* TODO: something useful */
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return (FILTER_STRAY);
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}
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static void
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ar71xx_gpio_intr(void *arg)
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{
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struct ar71xx_gpio_softc *sc = arg;
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GPIO_LOCK(sc);
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/* TODO: something useful */
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GPIO_UNLOCK(sc);
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}
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static int
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ar71xx_gpio_probe(device_t dev)
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{
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device_set_desc(dev, "Atheros AR71XX GPIO driver");
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return (0);
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}
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static int
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ar71xx_gpio_attach(device_t dev)
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{
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struct ar71xx_gpio_softc *sc = device_get_softc(dev);
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int error = 0;
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int i, j, maxpin;
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int mask, pinon;
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int old = 0;
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KASSERT((device_get_unit(dev) == 0),
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("ar71xx_gpio: Only one gpio module supported"));
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mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
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/* Map control/status registers. */
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sc->gpio_mem_rid = 0;
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sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->gpio_mem_rid, RF_ACTIVE);
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if (sc->gpio_mem_res == NULL) {
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device_printf(dev, "couldn't map memory\n");
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error = ENXIO;
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ar71xx_gpio_detach(dev);
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return(error);
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}
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if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
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device_printf(dev, "unable to allocate IRQ resource\n");
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return (ENXIO);
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}
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if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC,
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ar71xx_gpio_filter, ar71xx_gpio_intr, sc, &sc->gpio_ih))) {
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device_printf(dev,
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"WARNING: unable to register interrupt handler\n");
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return (ENXIO);
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}
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sc->dev = dev;
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/* Enable function bits that are required */
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"function_set", &mask) == 0) {
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device_printf(dev, "function_set: 0x%x\n", mask);
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ar71xx_gpio_function_enable(sc, mask);
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old = 1;
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}
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/* Disable function bits that are required */
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"function_clear", &mask) == 0) {
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device_printf(dev, "function_clear: 0x%x\n", mask);
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ar71xx_gpio_function_disable(sc, mask);
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old = 1;
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}
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/* Handle previous behaviour */
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if (old == 0) {
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ar71xx_gpio_function_enable(sc, GPIO_FUNC_SPI_CS1_EN);
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ar71xx_gpio_function_enable(sc, GPIO_FUNC_SPI_CS2_EN);
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}
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/* Configure all pins as input */
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/* disable interrupts for all pins */
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GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0);
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/* Initialise all pins specified in the mask, up to the pin count */
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(void) ar71xx_gpio_pin_max(dev, &maxpin);
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"pinmask", &mask) != 0)
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mask = 0;
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"pinon", &pinon) != 0)
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pinon = 0;
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device_printf(dev, "gpio pinmask=0x%x\n", mask);
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for (j = 0; j <= maxpin; j++) {
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if ((mask & (1 << j)) == 0)
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continue;
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sc->gpio_npins++;
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}
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sc->gpio_pins = malloc(sizeof(*sc->gpio_pins) * sc->gpio_npins,
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M_DEVBUF, M_WAITOK | M_ZERO);
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for (i = 0, j = 0; j <= maxpin; j++) {
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if ((mask & (1 << j)) == 0)
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continue;
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snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME,
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"pin %d", j);
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sc->gpio_pins[i].gp_pin = j;
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sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
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sc->gpio_pins[i].gp_flags = 0;
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ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], DEFAULT_CAPS);
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i++;
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}
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for (i = 0; i < sc->gpio_npins; i++) {
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j = sc->gpio_pins[i].gp_pin;
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if ((pinon & (1 << j)) != 0)
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ar71xx_gpio_pin_set(dev, j, 1);
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}
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device_add_child(dev, "gpioc", device_get_unit(dev));
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device_add_child(dev, "gpiobus", device_get_unit(dev));
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return (bus_generic_attach(dev));
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}
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static int
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ar71xx_gpio_detach(device_t dev)
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{
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struct ar71xx_gpio_softc *sc = device_get_softc(dev);
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KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
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ar71xx_gpio_function_disable(sc, GPIO_FUNC_SPI_CS1_EN);
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ar71xx_gpio_function_disable(sc, GPIO_FUNC_SPI_CS2_EN);
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bus_generic_detach(dev);
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if (sc->gpio_mem_res)
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bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid,
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sc->gpio_mem_res);
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free(sc->gpio_pins, M_DEVBUF);
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mtx_destroy(&sc->gpio_mtx);
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return(0);
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}
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static device_method_t ar71xx_gpio_methods[] = {
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DEVMETHOD(device_probe, ar71xx_gpio_probe),
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DEVMETHOD(device_attach, ar71xx_gpio_attach),
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DEVMETHOD(device_detach, ar71xx_gpio_detach),
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/* GPIO protocol */
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DEVMETHOD(gpio_pin_max, ar71xx_gpio_pin_max),
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DEVMETHOD(gpio_pin_getname, ar71xx_gpio_pin_getname),
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DEVMETHOD(gpio_pin_getflags, ar71xx_gpio_pin_getflags),
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DEVMETHOD(gpio_pin_getcaps, ar71xx_gpio_pin_getcaps),
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DEVMETHOD(gpio_pin_setflags, ar71xx_gpio_pin_setflags),
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DEVMETHOD(gpio_pin_get, ar71xx_gpio_pin_get),
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DEVMETHOD(gpio_pin_set, ar71xx_gpio_pin_set),
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DEVMETHOD(gpio_pin_toggle, ar71xx_gpio_pin_toggle),
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{0, 0},
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};
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static driver_t ar71xx_gpio_driver = {
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"gpio",
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ar71xx_gpio_methods,
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|
sizeof(struct ar71xx_gpio_softc),
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|
};
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|
static devclass_t ar71xx_gpio_devclass;
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|
|
|
DRIVER_MODULE(ar71xx_gpio, apb, ar71xx_gpio_driver, ar71xx_gpio_devclass, 0, 0);
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