MAKE(1)

NAME
make - maintain program dependencies

SYNOPSIS
make [-eiknqrstv] [-D variable] [-d flags] [-f makefile] [-I directory] [-j max_jobs] [variable=value] [target ...]

DESCRIPTION
Make is a program designed to simplify the maintenance of other programs. Its input is a list of specifications as to the files upon which programs and other files depend. If the file ‘makefile’ exists, it is read for this list of specifications. If it does not exist, the file ‘Makefile’ is read. If the file ‘.depend’ exists, it is read (see mkdep(1)).

This manual page is intended as a reference document only. For a more thorough description of make and makefiles, please refer to

The options are as follows:

-D variable
    Define Ar variable to be 1, in the global context.

-d flags
    Turn on debugging, and specify which portions of make are to print debugging information. Flags is one or more of the following:

    A   Print all possible debugging information; equivalent to specifying all of the debugging flags.

    a   Print debugging information about archive searching and caching.

    c   Print debugging information about conditional evaluation.

    d   Print debugging information about directory searching and caching.

    g1  Print the input graph before making anything.

    g2  Print the input graph after making everything, or before exiting on error.

    j   Print debugging information about running multiple shells.

    m   Print debugging information about making targets, including modification dates.

    s   Print debugging information about suffix-transformation rules.

    t   Print debugging information about target list maintenance.

    v   Print debugging information about variable assignment.

-e  Specify that environmental variables override macro assignments within makefiles.

-f makefile
    Specify a makefile to read instead of the default ‘makefile’ and ‘Makefile’. If makefile is ‘-’, standard input is read. Multiple makefile's may be specified, and are read in the order specified.

-I directory
    Specify a directory in which to search for makefiles and included makefiles. The system makefile directory is automatically included as part of this list.

-i  Ignore non-zero exit of shell commands in the makefile. Equivalent to specifying ‘-’ before each command line in the makefile.

-j max_jobs
    Specify the maximum number of jobs that make may have running at any one time.

-k  Continue processing after errors are encountered, but only on those targets that do not depend on the target whose creation caused the error.

-n  Display the commands that would have been executed, but do not actually execute them.

-q  Do not execute any commands, but exit 0 if the specified targets are up-to-date and 1, otherwise.

-r  Do not use the built-in rules specified in the system makefile.

-s  Do not echo any commands as they are executed. Equivalent to specifying ‘@’ before each command line in the makefile.

-t  Rather than re-building a target as specified in the makefile, create it or update its modification time to make it appear up-to-date.

variable=value
    Set the value of the variable variable to value.

There are seven different types of lines in a makefile: file dependency specifications, shell commands, variable assignments, include statements, conditional directives, for loops, and comments.

In general, lines may be continued from one line to the next by ending them with a backslash (‘\’). The trailing newline character and initial whitespace on the following line are compressed into a single space.

FILE DEPENDENCY SPECIFICATIONS
Dependency lines consist of one or more targets, an operator, and zero or more sources. This creates a relationship where the targets ``depend'' on the sources and are usually created from them. The exact relationship between the target and the source is determined by the operator that separates them. The three operators are as follows:

:   A target is considered out-of-date if its modification time is less than those of any of its sources. Sources for a target accumulate over dependency lines when this operator is used. The target is removed if make is interrupted.

!   Targets are always re-created, but not until all sources have been examined and re-created as necessary. Sources for a target accumulate over dependency lines when this operator is used. The target is removed if make is interrupted.

::  If no sources are specified, the target is always re-created. Otherwise, a target is considered out-of-date if any of its sources has been modified more recently than the target. Sources for a target do not accumulate over dependency lines when this operator is used. The target will not be removed if make is interrupted.

Targets and sources may contain the shell wildcard values ‘’?, ‘*’, ‘[]’ and ‘{}’. The values ‘’?, ‘*’ and ‘[]’ may only be used as part of the final component of the target or source, and must be used to describe existing files. The value ‘{}’ need not necessarily be used to describe existing files. Expansion is in directory order, not alphabetically as done in the shell.

SHELL COMMANDS
Each target may have associated with it a series of shell commands, normally used to create the target. Each of the commands in this script must be preceded by a tab. While any target may appear on a dependency line, only one of these dependencies may be followed by a creation script, unless the ‘::’ operator is used.

If the first or first two characters of the command line are ‘@’ and/or ‘-’, the command is treated specially. A ‘@’ causes the command not to be echoed before it is executed. A ‘-’ causes any non-zero exit status of the command line to be ignored.

VARIABLE ASSIGNMENTS
Variables in make are much like variables in the shell, and, by tradition, consist of all upper-case letters. The five operators that can be used to assign values to variables are as follows:

=   Assign the value to the variable. Any previous value is overridden.

+=  Append the value to the current value of the variable.

?=  Assign the value to the variable if it is not already defined.

:=  Assign with expansion, i.e. expand the value before assigning it to the variable. Normally, expansion is not done until the variable is referenced.

!=  Expand the value and pass it to the shell for execution and assign the result to the variable. Any newlines in the result are replaced with spaces.

Any white-space before the assigned value is removed; if the value is being appended, a single space is inserted between the previous contents of the variable and the appended value.

Variables are expanded by surrounding the variable name with either curly braces (‘{}’) or parenthesis (‘()’) and preceding it with a dollar sign (‘$’). If the variable name contains only a single letter, the surrounding braces or parenthesis are not required. This shorter form is not recommended.

Variable substitution occurs at two distinct times, depending on where the variable is being used. Variables in dependency lines are expanded as the line is read. Variables in shell commands are expanded when the shell command is executed.

The four different classes of variables (in order of increasing precedence) are:

Environment variables
    Variables defined as part of make's environment.

Global variables
    Variables defined in the makefile or in included makefiles.

Command line variables
    Variables defined as part of the command line.

Local variables
    Variables that are defined specific to a certain target. The seven local variables are as follows:

    .ALLSRC
        The list of all sources for this target; also known as ‘>’.

    .ARCHIVE
        The name of the archive file.

    .IMPSRC
        The name/path of the source from which the target is to be transformed (the ``implied'' source); also known as ‘<’.

    .MEMBER
        The name of the archive member.

    .OODATE
        The list of sources for this target that were deemed out-of-date; also known as ‘’?.

    .PREFIX
        The file prefix of the file, containing only the file portion, no suffix or preceding directory components; also known as ‘*’.

    .TARGET
        The name of the target; also known as ‘@’.

    The shorter forms ‘@’, ‘’?, ‘>’ and ‘*’ are permitted for backward compatibility with historical makefiles and are not recommended. The six variables ‘@F’, ‘@D’, ‘<F’, ‘<D’, ‘*F’ and ‘*D’ are permitted for compatibility with AT&T UNIX makefiles and are not recommended.

    Four of the local variables may be used in sources on dependency lines because they expand to the proper value for each target on the line. These variables are ‘.TARGET’, ‘.PREFIX’, ‘.ARCHIVE’, and ‘.MEMBER’.

    In addition, make sets or knows about the following variables:

    $   A single dollar sign ‘$’, i.e. ‘$$’ expands to a single dollar sign.

    .MAKE
        The name that make was executed with (argv [0])

    .CURDIR
        A path to the directory where make was executed.

    .OBJDIR
        A path to the directory where the targets are built.

    MAKEFLAGS
        The environment variable ‘MAKEFLAGS’ may contain anything that may be specified on make's command line. Anything specified on make's command line is appended to the ‘MAKEFLAGS’ variable which is then entered into the environment for all programs which make executes.

    Variable expansion may be modified to select or modify each word of the variable (where a ``word'' is white-space delimited sequence of characters). The general format of a variable expansion is as follows:

        {variable[:modifier[:...]]}

    Each modifier begins with a colon and one of the following special characters. The colon may be escaped with a backslash (‘\’).

    E   Replaces each word in the variable with its suffix.

    H   Replaces each word in the variable with everything but the last component.

    Mpattern
        Select only those words that match the rest of the modifier. The standard shell wildcard characters (‘*’, ‘’?, and ‘[]’) may be used. The wildcard characters may be escaped with a backslash (‘\’).

    Npattern
        This is identical to ‘M’, but selects all words which do not match the rest of the modifier.

    R   Replaces each word in the variable with everything but its suffix.

    S/old_pattern
        /new_pattern /[g] Modify the first occurrence of old_pattern in each word to be replaced with new_pattern. If a ‘g’ is appended to the last slash of the pattern, all occurrences in each word are replaced. If old_pattern begins with a carat (‘^’), old_pattern is anchored at the beginning of each word. If old_pattern ends with a dollar sign (‘$’), it is anchored at the end of each word. Inside new_string, an ampersand (‘&’) is replaced by old_pattern. Any character may be used as a delimiter for the parts of the modifier string. The anchoring, ampersand and delimiter characters may be escaped with a backslash (‘\’).

        Variable expansion occurs in the normal fashion inside both old_string and new_string with the single exception that a backslash is used to prevent the expansion of a dollar sign (‘$’) not a preceding dollar sign as is usual.

    T   Replaces each word in the variable with its last component.

    old_string=new_string
        This is the AT&T UNIX style variable substitution. It must be the last modifier specified. If old_string or new_string do not contain the pattern matching character % then it is assumed that they are anchored at the end of each word, so only suffixes or entire words may be replaced. Otherwise % is the substring of old_string to be replaced in new_string

INCLUDE STATEMENTS, CONDITIONALS AND FOR LOOPS
Makefile inclusion, conditional structures and for loops reminiscent of the C programming language are provided in make. All such structures are identified by a line beginning with a single dot (‘’). character. Files are included with either ‘.include <file>’ or ‘.include file’. Variables between the angle brackets or double quotes are expanded to form the file name. If angle brackets are used, the included makefile is expected to be in the system makefile directory. If double quotes are used, the including makefile's directory and any directories specified using the -I option are searched before the system makefile directory.

Conditional expressions are also preceded by a single dot as the first character of a line. The possible conditionals are as follows:

.undef variable
    Un-define the specified global variable. Only global variables may be un-defined.

    .if [!]expression [operator expression ...] Test the value of an expression.

    .ifdef [!]variable [operator variable ...] Test the value of a variable.

    .ifndef [!]variable [operator variable ...] Test the value of a variable.

    .ifmake [!]target [operator target ...] Test the the target being built.

    .ifnmake [!] target [operator target ...] Test the target being built.

.else
    Reverse the sense of the last conditional.

    .elif [!] expression [operator expression ...] A combination of ‘.else’ followed by ‘.if’.

    .elifdef [!]variable [operator variable ...] A combination of ‘.else’ followed by ‘.ifdef’.

    .elifndef [!]variable [operator variable ...] A combination of ‘.else’ followed by ‘.ifndef’.

    .elifmake [!]target [operator target ...] A combination of ‘.else’ followed by ‘.ifmake’.

    .elifnmake [!]target [operator target ...] A combination of ‘.else’ followed by ‘.ifnmake’.

.endif
    End the body of the conditional.

The operator may be any one of the following:

||  logical OR

&&  Logical AND; of higher precedence than “”.

As in C, make will only evaluate a conditional as far as is necessary to determine its value. Parentheses may be used to change the order of evaluation. The boolean operator ‘’! may be used to logically negate an entire conditional. It is of higher precedence than ‘&&’.

The value of expression may be any of the following:

defined
    Takes a variable name as an argument and evaluates to true if the variable has been defined.

make
    Takes a target name as an argument and evaluates to true if the target was specified as part of make's command line or was declared the default target (either implicitly or explicitly, see .MAIN) before the line containing the conditional.

empty
    Takes a variable, with possible modifiers, and evaluates to true if the expansion of the variable would result in an empty string.

exists
    Takes a file name as an argument and evaluates to true if the file exists. The file is searched for on the system search path (see .PATH).

target
    Takes a target name as an argument and evaluates to true if the target has been defined.

Expression may also be an arithmetic or string comparison. Variable expansion is performed on both sides of the comparison, after which the integral values are compared. A value is interpreted as hexadecimal if it is preceded by 0x, otherwise it is decimal; octal numbers are not supported. The standard C relational operators are all supported. If after variable expansion, either the left or right hand side of a ‘==’ or ‘!=’ operator is not an integral value, then string comparison is performed between the expanded variables. If no relational operator is given, it is assumed that the expanded variable is being compared against 0.

When make is evaluating one of these conditional expression, and it encounters a word it doesn't recognize, either the ``make'' or ``defined'' expression is applied to it, depending on the form of the conditional. If the form is ‘.ifdef’ or ‘.ifndef’, the ``defined'' expression is applied. Similarly, if the form is ‘.ifmake’ or ‘.ifnmake, the ``make''’ expression is applied.

If the conditional evaluates to true the parsing of the makefile continues as before. If it evaluates to false, the following lines are skipped. In both cases this continues until a ‘.else’ or ‘.endif’ is found.

For loops are typically used to apply a set of rules to a list of files. The syntax of a for loop is:

    .for variable in expression

    <make-rules>

    .endfor
After the for expression is evaluated, it is split into words. The iteration variable is successively set to each word, and substituted in the make-rules inside the body of the for loop.

COMMENTS
Comments begin with a hash (‘#’) character, anywhere but in a shell command line, and continue to the end of the line.

SPECIAL SOURCES

.IGNORE
    Ignore any errors from the commands associated with this target, exactly as if they all were preceded by a dash (‘-’).

.MAKE
    Execute the commands associated with this target even if the -n or -t options were specified. Normally used to mark recursive make's.

.NOTMAIN
    Normally make selects the first target it encounters as the default target to be built if no target was specified. This source prevents this target from being selected.

.OPTIONAL
    If a target is marked with this attribute and make can't figure out how to create it, it will ignore this fact and assume the file isn't needed or already exists.

.PRECIOUS
    When make is interrupted, it removes any partially made targets. This source prevents the target from being removed.

.SILENT
    Do not echo any of the commands associated with this target, exactly as if they all were preceded by an at sign (‘@’).

.USE
    Turn the target into make's. version of a macro. When the target is used as a source for another target, the other target acquires the commands, sources, and attributes (except for .USE) of the source. If the target already has commands, the .USE target's commands are appended to them.

SPECIAL TARGETS
Special targets may not be included with other targets, i.e. they must be the only target specified.

.BEGIN
    Any command lines attached to this target are executed before anything else is done.

.DEFAULT
    This is sort of a .USE rule for any target (that was used only as a source) that make can't figure out any other way to create. Only the shell script is used. The .IMPSRC variable of a target that inherits .DEFAULT's commands is set to the target's own name.

.END
    Any command lines attached to this target are executed after everything else is done.

.IGNORE
    Mark each of the sources with the .IGNORE attribute. If no sources are specified, this is the equivalent of specifying the -i option.

.INTERRUPT
    If make is interrupted, the commands for this target will be executed.

.MAIN
    If no target is specified when make is invoked, this target will be built.

.MAKEFLAGS
    This target provides a way to specify flags for make when the makefile is used. The flags are as if typed to the shell, though the -f option will have no effect.

.PATH
    The sources are directories which are to be searched for files not found in the current directory. If no sources are specified, any previously specified directories are deleted.

.PRECIOUS
    Apply the .PRECIOUS attribute to any specified sources. If no sources are specified, the .PRECIOUS attribute is applied to every target in the file.

.SILENT
    Apply the .SILENT attribute to any specified sources. If no sources are specified, the .SILENT attribute is applied to every command in the file.

.SUFFIXES
    Each source specifies a suffix to make. If no sources are specified, any previous specified suffices are deleted.

ENVIRONMENT
Make utilizes the following environment variables, if they exist: MAKE, MAKEFLAGS and MAKEOBJDIR.

FILES
.depend
    list of dependencies
Makefile
    list of dependencies
makefile
    list of dependencies
sys.mk
    system makefile
/usr/share/mk
    system makefile directory

SEE ALSO
mkdep(1)

HISTORY
A Make command appeared in AT&T UNIX.