2015-03-20 19:51:24 +00:00
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/*-
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* Copyright (c) 2015 Luiz Otavio O Souza <loos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for Maxim DS1307 I2C real-time clock/calendar.
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*/
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/clock.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <dev/iicbus/iicbus.h>
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#include <dev/iicbus/iiconf.h>
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#ifdef FDT
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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#include <dev/iicbus/ds1307reg.h>
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#include "clock_if.h"
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#include "iicbus_if.h"
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struct ds1307_softc {
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device_t sc_dev;
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2017-07-30 18:46:38 +00:00
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struct intr_config_hook
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enum_hook;
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2015-03-20 19:51:24 +00:00
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uint8_t sc_ctrl;
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2017-07-30 18:46:38 +00:00
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bool sc_mcp7941x;
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bool sc_use_ampm;
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2015-03-20 19:51:24 +00:00
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};
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static void ds1307_start(void *);
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2016-04-05 03:27:33 +00:00
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#ifdef FDT
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static const struct ofw_compat_data ds1307_compat_data[] = {
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2017-07-30 18:46:38 +00:00
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{"dallas,ds1307", (uintptr_t)"Dallas DS1307 RTC"},
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{"maxim,ds1307", (uintptr_t)"Maxim DS1307 RTC"},
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{"microchip,mcp7941x", (uintptr_t)"Microchip MCP7941x RTC"},
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2016-04-05 03:27:33 +00:00
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{ NULL, 0 }
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};
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#endif
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2015-03-20 19:51:24 +00:00
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static int
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2017-07-30 16:17:06 +00:00
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ds1307_read1(device_t dev, uint8_t reg, uint8_t *data)
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2015-03-20 19:51:24 +00:00
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{
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2017-07-31 14:58:01 +00:00
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return (iicdev_readfrom(dev, reg, data, 1, IIC_INTRWAIT));
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2015-03-20 19:51:24 +00:00
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}
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static int
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2017-07-30 16:17:06 +00:00
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ds1307_write1(device_t dev, uint8_t reg, uint8_t data)
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2015-03-20 19:51:24 +00:00
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{
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2017-07-31 14:58:01 +00:00
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return (iicdev_writeto(dev, reg, &data, 1, IIC_INTRWAIT));
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2015-03-20 19:51:24 +00:00
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}
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static int
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ds1307_ctrl_read(struct ds1307_softc *sc)
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{
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int error;
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sc->sc_ctrl = 0;
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2017-07-30 16:17:06 +00:00
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error = ds1307_read1(sc->sc_dev, DS1307_CONTROL, &sc->sc_ctrl);
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2015-03-20 19:51:24 +00:00
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if (error) {
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device_printf(sc->sc_dev, "cannot read from RTC.\n");
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return (error);
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}
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return (0);
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}
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static int
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ds1307_ctrl_write(struct ds1307_softc *sc)
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{
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int error;
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2017-07-30 16:17:06 +00:00
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uint8_t ctrl;
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2015-03-20 19:51:24 +00:00
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2017-07-30 16:17:06 +00:00
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ctrl = sc->sc_ctrl & DS1307_CTRL_MASK;
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error = ds1307_write1(sc->sc_dev, DS1307_CONTROL, ctrl);
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2015-03-20 19:51:24 +00:00
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if (error != 0)
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device_printf(sc->sc_dev, "cannot write to RTC.\n");
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return (error);
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}
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static int
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ds1307_sqwe_sysctl(SYSCTL_HANDLER_ARGS)
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{
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2016-04-05 03:27:33 +00:00
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int sqwe, error, newv, sqwe_bit;
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2015-03-20 19:51:24 +00:00
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struct ds1307_softc *sc;
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sc = (struct ds1307_softc *)arg1;
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error = ds1307_ctrl_read(sc);
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if (error != 0)
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return (error);
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2016-04-05 03:27:33 +00:00
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if (sc->sc_mcp7941x)
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sqwe_bit = MCP7941X_CTRL_SQWE;
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else
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sqwe_bit = DS1307_CTRL_SQWE;
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sqwe = newv = (sc->sc_ctrl & sqwe_bit) ? 1 : 0;
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2015-03-20 19:51:24 +00:00
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error = sysctl_handle_int(oidp, &newv, 0, req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (sqwe != newv) {
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2016-04-05 03:27:33 +00:00
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sc->sc_ctrl &= ~sqwe_bit;
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2015-03-20 19:51:24 +00:00
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if (newv)
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2016-04-05 03:27:33 +00:00
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sc->sc_ctrl |= sqwe_bit;
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2015-03-20 19:51:24 +00:00
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error = ds1307_ctrl_write(sc);
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if (error != 0)
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return (error);
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}
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return (error);
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}
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static int
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ds1307_sqw_freq_sysctl(SYSCTL_HANDLER_ARGS)
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{
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int ds1307_sqw_freq[] = { 1, 4096, 8192, 32768 };
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int error, freq, i, newf, tmp;
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struct ds1307_softc *sc;
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sc = (struct ds1307_softc *)arg1;
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error = ds1307_ctrl_read(sc);
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if (error != 0)
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return (error);
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tmp = (sc->sc_ctrl & DS1307_CTRL_RS_MASK);
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if (tmp >= nitems(ds1307_sqw_freq))
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tmp = nitems(ds1307_sqw_freq) - 1;
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freq = ds1307_sqw_freq[tmp];
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error = sysctl_handle_int(oidp, &freq, 0, req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (freq != ds1307_sqw_freq[tmp]) {
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newf = 0;
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for (i = 0; i < nitems(ds1307_sqw_freq); i++)
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if (freq >= ds1307_sqw_freq[i])
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newf = i;
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sc->sc_ctrl &= ~DS1307_CTRL_RS_MASK;
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sc->sc_ctrl |= newf;
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error = ds1307_ctrl_write(sc);
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if (error != 0)
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return (error);
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}
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return (error);
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}
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static int
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ds1307_sqw_out_sysctl(SYSCTL_HANDLER_ARGS)
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{
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int sqwe, error, newv;
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struct ds1307_softc *sc;
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sc = (struct ds1307_softc *)arg1;
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error = ds1307_ctrl_read(sc);
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if (error != 0)
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return (error);
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sqwe = newv = (sc->sc_ctrl & DS1307_CTRL_OUT) ? 1 : 0;
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error = sysctl_handle_int(oidp, &newv, 0, req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (sqwe != newv) {
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sc->sc_ctrl &= ~DS1307_CTRL_OUT;
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if (newv)
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sc->sc_ctrl |= DS1307_CTRL_OUT;
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error = ds1307_ctrl_write(sc);
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if (error != 0)
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return (error);
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}
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return (error);
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}
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static int
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ds1307_probe(device_t dev)
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{
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#ifdef FDT
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2016-04-05 03:27:33 +00:00
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const struct ofw_compat_data *compat;
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2015-03-20 19:51:24 +00:00
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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2016-04-05 03:27:33 +00:00
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compat = ofw_bus_search_compatible(dev, ds1307_compat_data);
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2016-09-24 05:27:12 +00:00
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if (compat->ocd_str == NULL)
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2015-03-20 19:51:24 +00:00
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return (ENXIO);
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2016-04-05 03:27:33 +00:00
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device_set_desc(dev, (const char *)compat->ocd_data);
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return (BUS_PROBE_DEFAULT);
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#else
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2015-03-20 19:51:24 +00:00
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device_set_desc(dev, "Maxim DS1307 RTC");
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2017-07-30 18:46:38 +00:00
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return (BUS_PROBE_NOWILDCARD);
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2016-04-05 03:27:33 +00:00
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#endif
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2015-03-20 19:51:24 +00:00
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}
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static int
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ds1307_attach(device_t dev)
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{
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struct ds1307_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->enum_hook.ich_func = ds1307_start;
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sc->enum_hook.ich_arg = dev;
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2017-07-30 00:00:30 +00:00
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#ifdef FDT
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2016-04-05 03:27:33 +00:00
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if (ofw_bus_is_compatible(dev, "microchip,mcp7941x"))
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sc->sc_mcp7941x = 1;
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2017-07-30 00:00:30 +00:00
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#endif
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2016-04-05 03:27:33 +00:00
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2015-03-20 19:51:24 +00:00
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/*
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* We have to wait until interrupts are enabled. Usually I2C read
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* and write only works when the interrupts are available.
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*/
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if (config_intrhook_establish(&sc->enum_hook) != 0)
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return (ENOMEM);
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return (0);
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}
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2017-07-31 14:58:01 +00:00
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static int
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ds1307_detach(device_t dev)
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{
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clock_unregister(dev);
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return (0);
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}
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2015-03-20 19:51:24 +00:00
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static void
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ds1307_start(void *xdev)
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{
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device_t dev;
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struct ds1307_softc *sc;
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struct sysctl_ctx_list *ctx;
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struct sysctl_oid *tree_node;
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struct sysctl_oid_list *tree;
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2017-07-30 18:46:38 +00:00
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uint8_t secs;
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2017-11-08 01:28:20 +00:00
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uint8_t osc_en;
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2015-03-20 19:51:24 +00:00
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dev = (device_t)xdev;
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sc = device_get_softc(dev);
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ctx = device_get_sysctl_ctx(dev);
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tree_node = device_get_sysctl_tree(dev);
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tree = SYSCTL_CHILDREN(tree_node);
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config_intrhook_disestablish(&sc->enum_hook);
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2017-07-30 18:46:38 +00:00
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/* Check if the oscillator is disabled. */
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if (ds1307_read1(sc->sc_dev, DS1307_SECS, &secs) != 0) {
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device_printf(sc->sc_dev, "cannot read from RTC.\n");
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2015-03-20 19:51:24 +00:00
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return;
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2017-07-30 18:46:38 +00:00
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}
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2017-11-08 01:28:20 +00:00
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if (sc->sc_mcp7941x)
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osc_en = 0x80;
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else
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osc_en = 0x00;
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if (((secs & DS1307_SECS_CH) ^ osc_en) != 0) {
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2017-07-30 18:46:38 +00:00
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device_printf(sc->sc_dev,
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"WARNING: RTC clock stopped, check the battery.\n");
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}
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2015-03-20 19:51:24 +00:00
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/* Configuration parameters. */
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "sqwe",
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CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
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ds1307_sqwe_sysctl, "IU", "DS1307 square-wave enable");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "sqw_freq",
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CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
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ds1307_sqw_freq_sysctl, "IU",
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"DS1307 square-wave output frequency");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "sqw_out",
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CTLFLAG_RW | CTLTYPE_UINT | CTLFLAG_MPSAFE, sc, 0,
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ds1307_sqw_out_sysctl, "IU", "DS1307 square-wave output state");
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2017-07-31 21:53:00 +00:00
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/*
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* Register as a clock with 1 second resolution. Schedule the
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* clock_settime() method to be called just after top-of-second;
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* resetting the time resets top-of-second in the hardware.
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*/
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clock_register_flags(dev, 1000000, CLOCKF_SETTIME_NO_ADJ);
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2017-07-31 01:36:51 +00:00
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clock_schedule(dev, 1);
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2015-03-20 19:51:24 +00:00
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}
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static int
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ds1307_gettime(device_t dev, struct timespec *ts)
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{
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int error;
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2018-01-23 21:31:43 +00:00
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struct bcd_clocktime bct;
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2015-03-20 19:51:24 +00:00
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struct ds1307_softc *sc;
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2017-11-08 01:28:20 +00:00
|
|
|
uint8_t data[7], hourmask, st_mask;
|
2015-03-20 19:51:24 +00:00
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
2017-07-30 16:17:06 +00:00
|
|
|
error = iicdev_readfrom(sc->sc_dev, DS1307_SECS, data, sizeof(data),
|
|
|
|
IIC_INTRWAIT);
|
2015-03-20 19:51:24 +00:00
|
|
|
if (error != 0) {
|
|
|
|
device_printf(dev, "cannot read from RTC.\n");
|
|
|
|
return (error);
|
|
|
|
}
|
2017-07-30 18:46:38 +00:00
|
|
|
|
2017-07-31 15:24:40 +00:00
|
|
|
/* If the clock halted, we don't have good data. */
|
2017-11-08 01:28:20 +00:00
|
|
|
if (sc->sc_mcp7941x)
|
|
|
|
st_mask = 0x80;
|
|
|
|
else
|
|
|
|
st_mask = 0x00;
|
|
|
|
|
|
|
|
if (((data[DS1307_SECS] & DS1307_SECS_CH) ^ st_mask) != 0)
|
2017-07-31 15:24:40 +00:00
|
|
|
return (EINVAL);
|
|
|
|
|
2017-07-30 18:46:38 +00:00
|
|
|
/* If chip is in AM/PM mode remember that. */
|
|
|
|
if (data[DS1307_HOUR] & DS1307_HOUR_USE_AMPM) {
|
|
|
|
sc->sc_use_ampm = true;
|
|
|
|
hourmask = DS1307_HOUR_MASK_12HR;
|
|
|
|
} else
|
|
|
|
hourmask = DS1307_HOUR_MASK_24HR;
|
|
|
|
|
2018-01-23 21:31:43 +00:00
|
|
|
bct.nsec = 0;
|
|
|
|
bct.ispm = (data[DS1307_HOUR] & DS1307_HOUR_IS_PM) != 0;
|
|
|
|
bct.sec = data[DS1307_SECS] & DS1307_SECS_MASK;
|
|
|
|
bct.min = data[DS1307_MINS] & DS1307_MINS_MASK;
|
|
|
|
bct.hour = data[DS1307_HOUR] & hourmask;
|
|
|
|
bct.day = data[DS1307_DATE] & DS1307_DATE_MASK;
|
|
|
|
bct.mon = data[DS1307_MONTH] & DS1307_MONTH_MASK;
|
|
|
|
bct.year = data[DS1307_YEAR] & DS1307_YEAR_MASK;
|
2017-07-30 18:46:38 +00:00
|
|
|
|
2018-03-04 19:20:11 +00:00
|
|
|
clock_dbgprint_bcd(sc->sc_dev, CLOCK_DBG_READ, &bct);
|
2018-01-23 21:31:43 +00:00
|
|
|
return (clock_bcd_to_ts(&bct, ts, sc->sc_use_ampm));
|
2015-03-20 19:51:24 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
ds1307_settime(device_t dev, struct timespec *ts)
|
|
|
|
{
|
2018-01-23 21:31:43 +00:00
|
|
|
struct bcd_clocktime bct;
|
2015-03-20 19:51:24 +00:00
|
|
|
struct ds1307_softc *sc;
|
2018-01-23 21:31:43 +00:00
|
|
|
int error, year;
|
2017-07-30 16:17:06 +00:00
|
|
|
uint8_t data[7];
|
2017-07-30 18:46:38 +00:00
|
|
|
uint8_t pmflags;
|
2015-03-20 19:51:24 +00:00
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
2017-07-30 18:46:38 +00:00
|
|
|
|
2017-07-31 21:53:00 +00:00
|
|
|
/*
|
|
|
|
* We request a timespec with no resolution-adjustment. That also
|
|
|
|
* disables utc adjustment, so apply that ourselves.
|
|
|
|
*/
|
|
|
|
ts->tv_sec -= utc_offset();
|
2018-01-23 21:31:43 +00:00
|
|
|
clock_ts_to_bcd(ts, &bct, sc->sc_use_ampm);
|
2018-03-04 19:20:11 +00:00
|
|
|
clock_dbgprint_bcd(sc->sc_dev, CLOCK_DBG_WRITE, &bct);
|
2017-07-31 21:53:00 +00:00
|
|
|
|
2017-07-30 18:46:38 +00:00
|
|
|
/* If the chip is in AM/PM mode, adjust hour and set flags as needed. */
|
|
|
|
if (sc->sc_use_ampm) {
|
|
|
|
pmflags = DS1307_HOUR_USE_AMPM;
|
2018-01-23 21:31:43 +00:00
|
|
|
if (bct.ispm)
|
2017-07-30 18:46:38 +00:00
|
|
|
pmflags |= DS1307_HOUR_IS_PM;
|
|
|
|
} else
|
|
|
|
pmflags = 0;
|
|
|
|
|
2018-01-23 21:31:43 +00:00
|
|
|
data[DS1307_SECS] = bct.sec;
|
|
|
|
data[DS1307_MINS] = bct.min;
|
|
|
|
data[DS1307_HOUR] = bct.hour | pmflags;
|
|
|
|
data[DS1307_DATE] = bct.day;
|
|
|
|
data[DS1307_WEEKDAY] = bct.dow;
|
|
|
|
data[DS1307_MONTH] = bct.mon;
|
|
|
|
data[DS1307_YEAR] = bct.year & 0xff;
|
2017-11-08 01:28:20 +00:00
|
|
|
if (sc->sc_mcp7941x) {
|
|
|
|
data[DS1307_SECS] |= MCP7941X_SECS_ST;
|
|
|
|
data[DS1307_WEEKDAY] |= MCP7941X_WEEKDAY_VBATEN;
|
2018-01-23 21:31:43 +00:00
|
|
|
year = bcd2bin(bct.year >> 8) * 100 + bcd2bin(bct.year & 0xff);
|
|
|
|
if ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0)
|
2017-11-08 01:28:20 +00:00
|
|
|
data[DS1307_MONTH] |= MCP7941X_MONTH_LPYR;
|
|
|
|
}
|
2015-03-20 19:51:24 +00:00
|
|
|
/* Write the time back to RTC. */
|
2017-07-30 16:17:06 +00:00
|
|
|
error = iicdev_writeto(sc->sc_dev, DS1307_SECS, data, sizeof(data),
|
|
|
|
IIC_INTRWAIT);
|
2015-03-20 19:51:24 +00:00
|
|
|
if (error != 0)
|
|
|
|
device_printf(dev, "cannot write to RTC.\n");
|
|
|
|
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
static device_method_t ds1307_methods[] = {
|
|
|
|
DEVMETHOD(device_probe, ds1307_probe),
|
|
|
|
DEVMETHOD(device_attach, ds1307_attach),
|
2017-07-31 14:58:01 +00:00
|
|
|
DEVMETHOD(device_detach, ds1307_detach),
|
2015-03-20 19:51:24 +00:00
|
|
|
|
|
|
|
DEVMETHOD(clock_gettime, ds1307_gettime),
|
|
|
|
DEVMETHOD(clock_settime, ds1307_settime),
|
|
|
|
|
|
|
|
DEVMETHOD_END
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t ds1307_driver = {
|
|
|
|
"ds1307",
|
|
|
|
ds1307_methods,
|
|
|
|
sizeof(struct ds1307_softc),
|
|
|
|
};
|
|
|
|
|
|
|
|
static devclass_t ds1307_devclass;
|
|
|
|
|
|
|
|
DRIVER_MODULE(ds1307, iicbus, ds1307_driver, ds1307_devclass, NULL, NULL);
|
|
|
|
MODULE_VERSION(ds1307, 1);
|
|
|
|
MODULE_DEPEND(ds1307, iicbus, 1, 1, 1);
|
2019-05-23 18:24:27 +00:00
|
|
|
IICBUS_FDT_PNP_INFO(ds1307_compat_data);
|