1995-05-30 08:16:23 +00:00
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/* gscreg.h - port and bit definitions for the Genius GS-4500 interface
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1995-01-07 14:52:08 +00:00
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*
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*
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* Copyright (c) 1995 Gunther Schadow. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Gunther Schadow.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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2000-05-01 20:32:07 +00:00
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*
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* $FreeBSD$
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1995-01-07 14:52:08 +00:00
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*/
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/*
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* status register (r)
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*/
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/* the DMA/IRQ jumper configuration */
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#define GSC_CNF_MASK 0x5a
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#define GSC_CNF_DMA1 (~0x02 & GSC_CNF_MASK)
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#define GSC_CNF_DMA3 (~0x08 & GSC_CNF_MASK)
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#define GSC_CNF_IRQ3 (~0x10 & GSC_CNF_MASK)
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#define GSC_CNF_IRQ5 (~0x40 & GSC_CNF_MASK)
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/* the resolution switch setting */
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#define GSC_RES_MASK 0x24
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#define GSC_RES_400 0x00
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#define GSC_RES_300 0x04
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#define GSC_RES_200 0x20
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#define GSC_RES_100 0x24
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/* other flags */
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#define GSC_RDY_FLAG 0x80
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#define GSC_IRQ_FLAG 0x01
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/*
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* control register (w)
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*/
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/* power on */
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#define GSC_POWER_ON 0x01
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/* pixel per line count */
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#define GSC_CNT_MASK 0xf0
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#define GSC_CNT_3648 0x30
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#define GSC_CNT_2544 0x90
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#define GSC_CNT_1696 0xb0
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#define GSC_CNT_1648 0xe0
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#define GSC_CNT_1264 0x80
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#define GSC_CNT_840 0xa0
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#define GSC_CNT_424 0xf0
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/*
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* port addresses
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*/
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#define GSC_DATA(iob) (iob + (iob == 0x270 ? 0x02 : 0x01))
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#define GSC_STAT(iob) (iob + (iob == 0x270 ? 0x03 : 0x02))
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#define GSC_CTRL(iob) (iob + (iob == 0x270 ? 0x0a : 0x03))
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#define GSC_CLRP(iob) (iob + (iob == 0x270 ? 0x0b : 0x04))
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