2006-05-11 14:30:28 +00:00
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/*-
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* Copyright (c) 2006 M. Warner Losh. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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2008-11-25 00:13:26 +00:00
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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2006-05-11 14:30:28 +00:00
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*/
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/* $FreeBSD$ */
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#ifndef ARM_AT91_AT91_PDCREG_H
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#define ARM_AT91_AT91_PDCREG_H
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#define PDC_RPR 0x100 /* PDC Receive Pointer Register */
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#define PDC_RCR 0x104 /* PDC Receive Counter Register */
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#define PDC_TPR 0x108 /* PDC Transmit Pointer Register */
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#define PDC_TCR 0x10c /* PDC Transmit Counter Register */
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#define PDC_RNPR 0x110 /* PDC Receive Next Pointer Register */
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#define PDC_RNCR 0x114 /* PDC Receive Next Counter Register */
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#define PDC_TNPR 0x118 /* PDC Transmit Next Pointer Reg */
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#define PDC_TNCR 0x11c /* PDC Transmit Next Counter Reg */
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#define PDC_PTCR 0x120 /* PDC Transfer Control Register */
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#define PDC_PTSR 0x124 /* PDC Transfer Status Register */
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/* PTCR/PTSR */
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#define PDC_PTCR_RXTEN (1UL << 0) /* RXTEN: Receiver Transfer Enable */
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#define PDC_PTCR_RXTDIS (1UL << 1) /* RXTDIS: Receiver Transfer Disable */
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#define PDC_PTCR_TXTEN (1UL << 8) /* TXTEN: Transmitter Transfer En */
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#define PDC_PTCR_TXTDIS (1UL << 9) /* TXTDIS: Transmitter Transmit Dis */
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#endif /* ARM_AT91_AT91_PDCREG_H */
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