2016-12-20 18:02:07 +00:00
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/*-
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* Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_EXTRES_XDMA_H_
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#define _DEV_EXTRES_XDMA_H_
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enum xdma_direction {
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XDMA_MEM_TO_MEM,
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XDMA_MEM_TO_DEV,
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XDMA_DEV_TO_MEM,
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XDMA_DEV_TO_DEV,
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};
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enum xdma_operation_type {
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XDMA_MEMCPY,
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XDMA_SG,
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XDMA_CYCLIC,
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};
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enum xdma_command {
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XDMA_CMD_BEGIN,
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XDMA_CMD_PAUSE,
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XDMA_CMD_TERMINATE,
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XDMA_CMD_TERMINATE_ALL,
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};
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struct xdma_controller {
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device_t dev; /* DMA consumer device_t. */
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device_t dma_dev; /* A real DMA device_t. */
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void *data; /* OFW MD part. */
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/* List of virtual channels allocated. */
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TAILQ_HEAD(xdma_channel_list, xdma_channel) channels;
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};
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typedef struct xdma_controller xdma_controller_t;
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struct xdma_channel_config {
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enum xdma_direction direction;
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uintptr_t src_addr; /* Physical address. */
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uintptr_t dst_addr; /* Physical address. */
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int block_len; /* In bytes. */
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int block_num; /* Count of blocks. */
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int src_width; /* In bytes. */
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int dst_width; /* In bytes. */
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};
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typedef struct xdma_channel_config xdma_config_t;
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struct xdma_descriptor {
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2016-12-30 16:06:05 +00:00
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bus_addr_t ds_addr;
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bus_size_t ds_len;
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2016-12-20 18:02:07 +00:00
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};
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typedef struct xdma_descriptor xdma_descriptor_t;
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struct xdma_channel {
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xdma_controller_t *xdma;
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xdma_config_t conf;
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uint8_t flags;
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#define XCHAN_DESC_ALLOCATED (1 << 0)
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#define XCHAN_CONFIGURED (1 << 1)
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#define XCHAN_TYPE_CYCLIC (1 << 2)
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#define XCHAN_TYPE_MEMCPY (1 << 3)
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/* A real hardware driver channel. */
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void *chan;
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/* Interrupt handlers. */
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TAILQ_HEAD(, xdma_intr_handler) ie_handlers;
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/* Descriptors. */
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bus_dma_tag_t dma_tag;
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bus_dmamap_t dma_map;
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void *descs;
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xdma_descriptor_t *descs_phys;
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uint8_t map_err;
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struct mtx mtx_lock;
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TAILQ_ENTRY(xdma_channel) xchan_next;
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};
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typedef struct xdma_channel xdma_channel_t;
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/* xDMA controller alloc/free */
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xdma_controller_t *xdma_ofw_get(device_t dev, const char *prop);
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int xdma_put(xdma_controller_t *xdma);
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xdma_channel_t * xdma_channel_alloc(xdma_controller_t *);
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int xdma_channel_free(xdma_channel_t *);
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int xdma_prep_cyclic(xdma_channel_t *, enum xdma_direction,
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uintptr_t, uintptr_t, int, int, int, int);
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int xdma_prep_memcpy(xdma_channel_t *, uintptr_t, uintptr_t, size_t len);
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int xdma_desc_alloc(xdma_channel_t *, uint32_t, uint32_t);
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int xdma_desc_free(xdma_channel_t *xchan);
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/* Channel Control */
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int xdma_begin(xdma_channel_t *xchan);
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int xdma_pause(xdma_channel_t *xchan);
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int xdma_terminate(xdma_channel_t *xchan);
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/* Interrupt callback */
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int xdma_setup_intr(xdma_channel_t *xchan, int (*cb)(void *), void *arg, void **);
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int xdma_teardown_intr(xdma_channel_t *xchan, struct xdma_intr_handler *ih);
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int xdma_teardown_all_intr(xdma_channel_t *xchan);
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int xdma_callback(struct xdma_channel *xchan);
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void xdma_assert_locked(void);
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struct xdma_intr_handler {
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int (*cb)(void *);
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void *cb_user;
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struct mtx ih_lock;
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TAILQ_ENTRY(xdma_intr_handler) ih_next;
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};
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#endif /* !_DEV_EXTRES_XDMA_H_ */
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