1993-06-12 14:58:17 +00:00
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/*-
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* Copyright (c) 1990 William Jolitz.
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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ALL:
Removed patch kit headers and rcsid strings, add $Id$.
isa.c:
Removed old #ifdef notyet isa_configure code, since it will never be
used, and I have done 90% of what it attempted to.
Add conflict checking code that searchs back through the devtab's looking
for any device that has already been found that may conflict with what
we are about to probe. Checks are mode for I/O address, memory address,
IRQ, and DRQ. This should stop the screwing up of any device that has
alread been found by other device probes.
Print out messages when we are not going to probe a device due to
a conflict so the user knows WHY something was not found. For example:
aha0 not probed due to irq conflict with ahb0 at 11
Now print out a message when a device is not found so the user knows
that it was probed for, but could not be found. For example:
ed1 not found at 0x320
For devices that have I/O address < 0x100 say that they are on the
motherboard, not on isa! The 0x100 magic number is per ISA spec. It
may seem funny that pc0 and sc0 report as being on the motherboard, but
this is due to the fact that the I/O address used is that of the keyboard
controller which IS on the motherboard. We really need to split the
keyboard probe from the display probe. It is completly legal to build
a pc with out one or the other, or even with out both!
npx.c:
Return -1 from the probe routine if we are using the Emulator so
that the i/o addresses are not printed, this is the same trick used
for 486's.
Do not print the ``Errors reported via Exception 16'', and
``Errors reported via IRQ 13'' messages any more, since these just lead
to more user confusion that anything. It still prints the message
``Error reporting broken, using 387 emulator'' so that the person is
aware that there mother board is ill.
1993-10-13 15:59:30 +00:00
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* from: @(#)npx.c 7.2 (Berkeley) 5/12/91
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1999-08-28 01:08:13 +00:00
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* $FreeBSD$
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1993-06-12 14:58:17 +00:00
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*/
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1998-01-31 07:23:16 +00:00
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#include "opt_debug_npx.h"
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1996-01-06 23:10:57 +00:00
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#include "opt_math_emulate.h"
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1996-01-04 19:51:50 +00:00
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1994-08-13 03:50:34 +00:00
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#include <sys/param.h>
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#include <sys/systm.h>
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1999-04-16 21:22:55 +00:00
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#include <sys/bus.h>
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2000-10-20 07:58:15 +00:00
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#include <sys/ipl.h>
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1995-10-28 13:07:28 +00:00
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#include <sys/kernel.h>
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1998-02-12 21:41:10 +00:00
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#include <sys/malloc.h>
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1999-04-16 21:22:55 +00:00
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#include <sys/module.h>
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1995-10-28 13:07:28 +00:00
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#include <sys/sysctl.h>
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1994-08-13 03:50:34 +00:00
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#include <sys/proc.h>
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2001-01-20 02:30:58 +00:00
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#include <sys/mutex.h>
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1999-04-16 21:22:55 +00:00
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#include <machine/bus.h>
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#include <sys/rman.h>
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1997-01-29 13:46:28 +00:00
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#ifdef NPX_DEBUG
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1994-11-14 14:59:06 +00:00
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#include <sys/syslog.h>
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1997-01-29 13:46:28 +00:00
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#endif
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1994-11-14 14:59:06 +00:00
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#include <sys/signalvar.h>
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1994-10-23 21:28:03 +00:00
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1997-11-18 11:32:31 +00:00
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#ifndef SMP
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1997-04-22 06:55:47 +00:00
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#include <machine/asmacros.h>
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1997-11-18 11:32:31 +00:00
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#endif
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1997-10-28 11:43:57 +00:00
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#include <machine/cputypes.h>
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#include <machine/frame.h>
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1996-06-25 20:31:01 +00:00
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#include <machine/md_var.h>
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1997-05-31 09:27:31 +00:00
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#include <machine/pcb.h>
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1997-10-28 11:43:57 +00:00
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#include <machine/psl.h>
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1997-11-18 11:32:31 +00:00
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#ifndef SMP
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1994-11-14 14:59:06 +00:00
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#include <machine/clock.h>
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1997-11-18 11:32:31 +00:00
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#endif
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1999-04-16 21:22:55 +00:00
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#include <machine/resource.h>
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1994-08-13 03:50:34 +00:00
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#include <machine/specialreg.h>
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1997-10-28 11:43:57 +00:00
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#include <machine/segments.h>
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1994-10-23 21:28:03 +00:00
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1997-11-18 11:32:31 +00:00
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#ifndef SMP
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1994-08-13 03:50:34 +00:00
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#include <i386/isa/icu.h>
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1997-06-02 08:19:06 +00:00
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#include <i386/isa/intr_machdep.h>
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1994-08-13 03:50:34 +00:00
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#include <i386/isa/isa.h>
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1997-11-18 11:32:31 +00:00
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#endif
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2000-05-04 23:57:32 +00:00
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#include <isa/isavar.h>
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1993-06-12 14:58:17 +00:00
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/*
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* 387 and 287 Numeric Coprocessor Extension (NPX) Driver.
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*/
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1996-11-11 20:39:03 +00:00
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/* Configuration flags. */
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#define NPX_DISABLE_I586_OPTIMIZED_BCOPY (1 << 0)
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#define NPX_DISABLE_I586_OPTIMIZED_BZERO (1 << 1)
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#define NPX_DISABLE_I586_OPTIMIZED_COPYIO (1 << 2)
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1999-07-25 13:16:09 +00:00
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#define NPX_PREFER_EMULATOR (1 << 3)
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1996-11-11 20:39:03 +00:00
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1993-06-12 14:58:17 +00:00
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#ifdef __GNUC__
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1995-01-03 04:00:06 +00:00
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#define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr)))
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1993-06-12 14:58:17 +00:00
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#define fnclex() __asm("fnclex")
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#define fninit() __asm("fninit")
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1995-01-03 04:00:06 +00:00
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#define fnop() __asm("fnop")
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1998-04-15 18:58:09 +00:00
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#define fnsave(addr) __asm __volatile("fnsave %0" : "=m" (*(addr)))
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#define fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr)))
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#define fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr)))
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1995-01-03 04:00:06 +00:00
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#define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop")
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#define frstor(addr) __asm("frstor %0" : : "m" (*(addr)))
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1993-06-12 14:58:17 +00:00
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#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \
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: : "n" (CR0_TS) : "ax")
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#define stop_emulating() __asm("clts")
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#else /* not __GNUC__ */
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void fldcw __P((caddr_t addr));
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void fnclex __P((void));
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void fninit __P((void));
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1995-01-03 04:00:06 +00:00
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void fnop __P((void));
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1993-06-12 14:58:17 +00:00
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void fnsave __P((caddr_t addr));
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void fnstcw __P((caddr_t addr));
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void fnstsw __P((caddr_t addr));
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void fp_divide_by_0 __P((void));
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void frstor __P((caddr_t addr));
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void start_emulating __P((void));
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void stop_emulating __P((void));
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#endif /* __GNUC__ */
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typedef u_char bool_t;
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1999-04-16 21:22:55 +00:00
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static int npx_attach __P((device_t dev));
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void npx_intr __P((void *));
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1999-08-22 19:52:51 +00:00
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static void npx_identify __P((driver_t *driver, device_t parent));
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1999-04-16 21:22:55 +00:00
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static int npx_probe __P((device_t dev));
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static int npx_probe1 __P((device_t dev));
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1999-03-28 23:28:18 +00:00
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#ifdef I586_CPU
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1998-02-12 21:41:10 +00:00
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static long timezero __P((const char *funcname,
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void (*func)(void *buf, size_t len)));
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1999-03-28 23:28:18 +00:00
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#endif /* I586_CPU */
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1993-06-12 14:58:17 +00:00
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1995-01-03 04:00:06 +00:00
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int hw_float; /* XXX currently just alias for npx_exists */
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1995-10-28 13:07:28 +00:00
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SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint,
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CTLFLAG_RD, &hw_float, 0,
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"Floatingpoint instructions executed in hardware");
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1998-12-07 21:58:50 +00:00
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#ifndef SMP
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2000-10-05 23:09:57 +00:00
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static u_int npx0_imask = 0;
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1998-12-07 21:58:50 +00:00
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static struct gate_descriptor npx_idt_probeintr;
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1998-12-14 19:16:17 +00:00
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static int npx_intrno;
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1998-12-07 21:58:50 +00:00
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static volatile u_int npx_intrs_while_probing;
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static volatile u_int npx_traps_while_probing;
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#endif
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1997-06-22 16:04:22 +00:00
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1993-06-12 14:58:17 +00:00
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static bool_t npx_ex16;
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static bool_t npx_exists;
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static bool_t npx_irq13;
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1999-05-15 17:58:58 +00:00
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static int npx_irq; /* irq number */
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1993-06-12 14:58:17 +00:00
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1997-07-21 07:57:50 +00:00
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#ifndef SMP
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1993-06-12 14:58:17 +00:00
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/*
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* Special interrupt handlers. Someday intr0-intr15 will be used to count
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* interrupts. We'll still need a special exception 16 handler. The busy
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1995-01-03 04:00:06 +00:00
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* latch stuff in probeintr() can be moved to npxprobe().
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1993-06-12 14:58:17 +00:00
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*/
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1994-11-14 14:59:06 +00:00
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inthand_t probeintr;
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1998-04-19 15:39:26 +00:00
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__asm(" \n\
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.text \n\
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.p2align 2,0x90 \n\
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1999-05-06 09:44:57 +00:00
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.type " __XSTRING(CNAME(probeintr)) ",@function \n\
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1998-04-19 15:39:26 +00:00
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" __XSTRING(CNAME(probeintr)) ": \n\
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ss \n\
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incl " __XSTRING(CNAME(npx_intrs_while_probing)) " \n\
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pushl %eax \n\
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movb $0x20,%al # EOI (asm in strings loses cpp features) \n\
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outb %al,$0xa0 # IO_ICU2 \n\
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outb %al,$0x20 # IO_ICU1 \n\
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movb $0,%al \n\
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outb %al,$0xf0 # clear BUSY# latch \n\
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popl %eax \n\
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iret \n\
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1993-06-12 14:58:17 +00:00
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");
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1994-11-14 14:59:06 +00:00
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inthand_t probetrap;
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1998-04-19 15:39:26 +00:00
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__asm(" \n\
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.text \n\
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.p2align 2,0x90 \n\
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1999-05-06 09:44:57 +00:00
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.type " __XSTRING(CNAME(probetrap)) ",@function \n\
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1998-04-19 15:39:26 +00:00
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" __XSTRING(CNAME(probetrap)) ": \n\
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ss \n\
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incl " __XSTRING(CNAME(npx_traps_while_probing)) " \n\
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fnclex \n\
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iret \n\
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1993-06-12 14:58:17 +00:00
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");
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1997-07-21 07:57:50 +00:00
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#endif /* SMP */
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1999-08-22 19:52:51 +00:00
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/*
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* Identify routine. Create a connection point on our parent for probing.
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*/
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static void
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npx_identify(driver, parent)
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driver_t *driver;
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device_t parent;
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{
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device_t child;
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child = BUS_ADD_CHILD(parent, 0, "npx", 0);
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if (child == NULL)
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panic("npx_identify");
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}
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1993-06-12 14:58:17 +00:00
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/*
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* Probe routine. Initialize cr0 to give correct behaviour for [f]wait
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* whether the device exists or not (XXX should be elsewhere). Set flags
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* to tell npxattach() what to do. Modify device struct if npx doesn't
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* need to use interrupts. Return 1 if device exists.
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*/
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static int
|
1999-04-16 21:22:55 +00:00
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npx_probe(dev)
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device_t dev;
|
1993-06-12 14:58:17 +00:00
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{
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1999-05-06 12:47:21 +00:00
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#ifdef SMP
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1997-07-21 07:57:50 +00:00
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1999-05-15 17:58:58 +00:00
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if (resource_int_value("npx", 0, "irq", &npx_irq) != 0)
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npx_irq = 13;
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1999-04-16 21:22:55 +00:00
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return npx_probe1(dev);
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1997-07-21 07:57:50 +00:00
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#else /* SMP */
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1993-06-12 14:58:17 +00:00
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int result;
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u_long save_eflags;
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u_char save_icu1_mask;
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u_char save_icu2_mask;
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struct gate_descriptor save_idt_npxintr;
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struct gate_descriptor save_idt_npxtrap;
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/*
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* This routine is now just a wrapper for npxprobe1(), to install
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* special npx interrupt and trap handlers, to enable npx interrupts
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* and to disable other interrupts. Someday isa_configure() will
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* install suitable handlers and run with interrupts enabled so we
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* won't need to do so much here.
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*/
|
1999-05-15 17:58:58 +00:00
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if (resource_int_value("npx", 0, "irq", &npx_irq) != 0)
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npx_irq = 13;
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npx_intrno = NRSVIDT + npx_irq;
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1993-06-12 14:58:17 +00:00
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save_eflags = read_eflags();
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disable_intr();
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save_icu1_mask = inb(IO_ICU1 + 1);
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save_icu2_mask = inb(IO_ICU2 + 1);
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save_idt_npxintr = idt[npx_intrno];
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save_idt_npxtrap = idt[16];
|
1999-04-16 21:22:55 +00:00
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outb(IO_ICU1 + 1, ~IRQ_SLAVE);
|
1999-05-15 17:58:58 +00:00
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outb(IO_ICU2 + 1, ~(1 << (npx_irq - 8)));
|
1995-12-19 14:30:50 +00:00
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|
setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
1993-06-12 14:58:17 +00:00
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npx_idt_probeintr = idt[npx_intrno];
|
2000-09-07 01:33:02 +00:00
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/*
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* XXX This looks highly bogus, but it appears that npc_probe1
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|
|
* needs interrupts enabled. Does this make any difference
|
|
|
|
* here?
|
|
|
|
*/
|
1993-06-12 14:58:17 +00:00
|
|
|
enable_intr();
|
1999-04-16 21:22:55 +00:00
|
|
|
result = npx_probe1(dev);
|
1993-06-12 14:58:17 +00:00
|
|
|
disable_intr();
|
|
|
|
outb(IO_ICU1 + 1, save_icu1_mask);
|
|
|
|
outb(IO_ICU2 + 1, save_icu2_mask);
|
|
|
|
idt[npx_intrno] = save_idt_npxintr;
|
|
|
|
idt[16] = save_idt_npxtrap;
|
|
|
|
write_eflags(save_eflags);
|
|
|
|
return (result);
|
1997-07-21 07:57:50 +00:00
|
|
|
|
|
|
|
#endif /* SMP */
|
1993-06-12 14:58:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
1999-04-16 21:22:55 +00:00
|
|
|
npx_probe1(dev)
|
|
|
|
device_t dev;
|
1993-06-12 14:58:17 +00:00
|
|
|
{
|
1998-12-07 21:58:50 +00:00
|
|
|
#ifndef SMP
|
1995-01-03 04:00:06 +00:00
|
|
|
u_short control;
|
|
|
|
u_short status;
|
1998-12-07 21:58:50 +00:00
|
|
|
#endif
|
1995-01-03 04:00:06 +00:00
|
|
|
|
1993-06-12 14:58:17 +00:00
|
|
|
/*
|
|
|
|
* Partially reset the coprocessor, if any. Some BIOS's don't reset
|
|
|
|
* it after a warm boot.
|
|
|
|
*/
|
|
|
|
outb(0xf1, 0); /* full reset on some systems, NOP on others */
|
|
|
|
outb(0xf0, 0); /* clear BUSY# latch */
|
|
|
|
/*
|
|
|
|
* Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
|
|
|
|
* instructions. We must set the CR0_MP bit and use the CR0_TS
|
|
|
|
* bit to control the trap, because setting the CR0_EM bit does
|
|
|
|
* not cause WAIT instructions to trap. It's important to trap
|
|
|
|
* WAIT instructions - otherwise the "wait" variants of no-wait
|
|
|
|
* control instructions would degenerate to the "no-wait" variants
|
|
|
|
* after FP context switches but work correctly otherwise. It's
|
|
|
|
* particularly important to trap WAITs when there is no NPX -
|
|
|
|
* otherwise the "wait" variants would always degenerate.
|
|
|
|
*
|
|
|
|
* Try setting CR0_NE to get correct error reporting on 486DX's.
|
|
|
|
* Setting it should fail or do nothing on lesser processors.
|
|
|
|
*/
|
|
|
|
load_cr0(rcr0() | CR0_MP | CR0_NE);
|
|
|
|
/*
|
|
|
|
* But don't trap while we're probing.
|
|
|
|
*/
|
|
|
|
stop_emulating();
|
|
|
|
/*
|
|
|
|
* Finish resetting the coprocessor, if any. If there is an error
|
|
|
|
* pending, then we may get a bogus IRQ13, but probeintr() will handle
|
|
|
|
* it OK. Bogus halts have never been observed, but we enabled
|
|
|
|
* IRQ13 and cleared the BUSY# latch early to handle them anyway.
|
|
|
|
*/
|
|
|
|
fninit();
|
1997-07-21 07:57:50 +00:00
|
|
|
|
1999-05-06 12:47:21 +00:00
|
|
|
#ifdef SMP
|
1997-07-21 07:57:50 +00:00
|
|
|
/*
|
|
|
|
* Exception 16 MUST work for SMP.
|
|
|
|
*/
|
|
|
|
npx_irq13 = 0;
|
|
|
|
npx_ex16 = hw_float = npx_exists = 1;
|
1999-04-16 21:22:55 +00:00
|
|
|
device_set_desc(dev, "math processor");
|
|
|
|
return (0);
|
1997-07-21 07:57:50 +00:00
|
|
|
|
1999-04-16 21:22:55 +00:00
|
|
|
#else /* !SMP */
|
|
|
|
device_set_desc(dev, "math processor");
|
1997-07-21 07:57:50 +00:00
|
|
|
|
1995-02-23 17:32:38 +00:00
|
|
|
/*
|
|
|
|
* Don't use fwait here because it might hang.
|
|
|
|
* Don't use fnop here because it usually hangs if there is no FPU.
|
|
|
|
*/
|
1995-01-03 04:00:06 +00:00
|
|
|
DELAY(1000); /* wait for any IRQ13 */
|
1993-06-12 14:58:17 +00:00
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
if (npx_intrs_while_probing != 0)
|
|
|
|
printf("fninit caused %u bogus npx interrupt(s)\n",
|
|
|
|
npx_intrs_while_probing);
|
|
|
|
if (npx_traps_while_probing != 0)
|
|
|
|
printf("fninit caused %u bogus npx trap(s)\n",
|
|
|
|
npx_traps_while_probing);
|
|
|
|
#endif
|
|
|
|
/*
|
|
|
|
* Check for a status of mostly zero.
|
|
|
|
*/
|
|
|
|
status = 0x5a5a;
|
|
|
|
fnstsw(&status);
|
|
|
|
if ((status & 0xb8ff) == 0) {
|
|
|
|
/*
|
|
|
|
* Good, now check for a proper control word.
|
|
|
|
*/
|
1995-05-30 08:16:23 +00:00
|
|
|
control = 0x5a5a;
|
1993-06-12 14:58:17 +00:00
|
|
|
fnstcw(&control);
|
|
|
|
if ((control & 0x1f3f) == 0x033f) {
|
1994-09-09 23:13:03 +00:00
|
|
|
hw_float = npx_exists = 1;
|
1993-06-12 14:58:17 +00:00
|
|
|
/*
|
|
|
|
* We have an npx, now divide by 0 to see if exception
|
|
|
|
* 16 works.
|
|
|
|
*/
|
|
|
|
control &= ~(1 << 2); /* enable divide by 0 trap */
|
|
|
|
fldcw(&control);
|
|
|
|
npx_traps_while_probing = npx_intrs_while_probing = 0;
|
|
|
|
fp_divide_by_0();
|
|
|
|
if (npx_traps_while_probing != 0) {
|
|
|
|
/*
|
|
|
|
* Good, exception 16 works.
|
|
|
|
*/
|
|
|
|
npx_ex16 = 1;
|
1999-04-16 21:22:55 +00:00
|
|
|
return (0);
|
1993-06-12 14:58:17 +00:00
|
|
|
}
|
|
|
|
if (npx_intrs_while_probing != 0) {
|
1999-04-16 21:22:55 +00:00
|
|
|
int rid;
|
|
|
|
struct resource *r;
|
|
|
|
void *intr;
|
1993-06-12 14:58:17 +00:00
|
|
|
/*
|
|
|
|
* Bad, we are stuck with IRQ13.
|
|
|
|
*/
|
|
|
|
npx_irq13 = 1;
|
1995-01-03 04:00:06 +00:00
|
|
|
/*
|
1999-05-15 17:58:58 +00:00
|
|
|
* npxattach would be too late to set npx0_imask
|
1995-01-03 04:00:06 +00:00
|
|
|
*/
|
1999-05-15 17:58:58 +00:00
|
|
|
npx0_imask |= (1 << npx_irq);
|
1999-04-16 21:22:55 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* We allocate these resources permanently,
|
|
|
|
* so there is no need to keep track of them.
|
|
|
|
*/
|
|
|
|
rid = 0;
|
|
|
|
r = bus_alloc_resource(dev, SYS_RES_IOPORT,
|
|
|
|
&rid, IO_NPX, IO_NPX,
|
|
|
|
IO_NPXSIZE, RF_ACTIVE);
|
|
|
|
if (r == 0)
|
|
|
|
panic("npx: can't get ports");
|
|
|
|
rid = 0;
|
|
|
|
r = bus_alloc_resource(dev, SYS_RES_IRQ,
|
1999-05-15 17:58:58 +00:00
|
|
|
&rid, npx_irq, npx_irq,
|
1999-04-16 21:22:55 +00:00
|
|
|
1, RF_ACTIVE);
|
|
|
|
if (r == 0)
|
|
|
|
panic("npx: can't get IRQ");
|
|
|
|
BUS_SETUP_INTR(device_get_parent(dev),
|
2001-01-20 02:30:58 +00:00
|
|
|
dev, r,
|
|
|
|
INTR_TYPE_MISC | INTR_MPSAFE,
|
1999-05-08 21:59:43 +00:00
|
|
|
npx_intr, 0, &intr);
|
1999-04-16 21:22:55 +00:00
|
|
|
if (intr == 0)
|
|
|
|
panic("npx: can't create intr");
|
|
|
|
|
|
|
|
return (0);
|
1993-06-12 14:58:17 +00:00
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Worse, even IRQ13 is broken. Use emulator.
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Probe failed, but we want to get to npxattach to initialize the
|
|
|
|
* emulator and say that it has been installed. XXX handle devices
|
|
|
|
* that aren't really devices better.
|
|
|
|
*/
|
1999-04-16 21:22:55 +00:00
|
|
|
return (0);
|
1997-07-21 07:57:50 +00:00
|
|
|
#endif /* SMP */
|
1993-06-12 14:58:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Attach routine - announce which it is, and wire into system
|
|
|
|
*/
|
|
|
|
int
|
1999-04-16 21:22:55 +00:00
|
|
|
npx_attach(dev)
|
|
|
|
device_t dev;
|
1993-06-12 14:58:17 +00:00
|
|
|
{
|
1999-04-16 21:22:55 +00:00
|
|
|
int flags;
|
1999-07-25 13:16:09 +00:00
|
|
|
|
|
|
|
if (resource_int_value("npx", 0, "flags", &flags) != 0)
|
|
|
|
flags = 0;
|
1998-10-22 05:58:45 +00:00
|
|
|
|
1999-09-21 10:51:47 +00:00
|
|
|
if (flags)
|
2000-01-25 21:39:20 +00:00
|
|
|
device_printf(dev, "flags 0x%x ", flags);
|
1999-04-16 21:22:55 +00:00
|
|
|
if (npx_irq13) {
|
2000-01-25 21:39:20 +00:00
|
|
|
device_printf(dev, "using IRQ 13 interface\n");
|
1999-04-16 21:22:55 +00:00
|
|
|
} else {
|
1995-05-30 08:16:23 +00:00
|
|
|
#if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE)
|
1999-07-25 13:16:09 +00:00
|
|
|
if (npx_ex16) {
|
|
|
|
if (!(flags & NPX_PREFER_EMULATOR))
|
2000-01-25 21:39:20 +00:00
|
|
|
device_printf(dev, "INT 16 interface\n");
|
1999-07-25 13:16:09 +00:00
|
|
|
else {
|
2000-01-25 21:39:20 +00:00
|
|
|
device_printf(dev, "FPU exists, but flags request "
|
1999-07-25 13:16:09 +00:00
|
|
|
"emulator\n");
|
|
|
|
hw_float = npx_exists = 0;
|
|
|
|
}
|
|
|
|
} else if (npx_exists) {
|
2000-01-25 21:39:20 +00:00
|
|
|
device_printf(dev, "error reporting broken; using 387 emulator\n");
|
1996-11-11 20:39:03 +00:00
|
|
|
hw_float = npx_exists = 0;
|
|
|
|
} else
|
2000-01-25 21:39:20 +00:00
|
|
|
device_printf(dev, "387 emulator\n");
|
1995-01-03 04:00:06 +00:00
|
|
|
#else
|
1999-07-25 13:16:09 +00:00
|
|
|
if (npx_ex16) {
|
2000-01-25 21:39:20 +00:00
|
|
|
device_printf(dev, "INT 16 interface\n");
|
1999-07-25 13:16:09 +00:00
|
|
|
if (flags & NPX_PREFER_EMULATOR) {
|
2000-01-25 21:39:20 +00:00
|
|
|
device_printf(dev, "emulator requested, but none compiled "
|
1999-07-25 13:16:09 +00:00
|
|
|
"into kernel, using FPU\n");
|
|
|
|
}
|
|
|
|
} else
|
2000-01-25 21:39:20 +00:00
|
|
|
device_printf(dev, "no 387 emulator in kernel and no FPU!\n");
|
1995-01-03 04:00:06 +00:00
|
|
|
#endif
|
1996-11-11 20:39:03 +00:00
|
|
|
}
|
1993-06-12 14:58:17 +00:00
|
|
|
npxinit(__INITIAL_NPXCW__);
|
1996-11-11 20:39:03 +00:00
|
|
|
|
1998-02-12 21:41:10 +00:00
|
|
|
#ifdef I586_CPU
|
1999-07-25 13:16:09 +00:00
|
|
|
if (cpu_class == CPUCLASS_586 && npx_ex16 && npx_exists &&
|
1998-02-12 21:41:10 +00:00
|
|
|
timezero("i586_bzero()", i586_bzero) <
|
|
|
|
timezero("bzero()", bzero) * 4 / 5) {
|
1999-04-16 21:22:55 +00:00
|
|
|
if (!(flags & NPX_DISABLE_I586_OPTIMIZED_BCOPY)) {
|
1996-11-11 20:39:03 +00:00
|
|
|
bcopy_vector = i586_bcopy;
|
|
|
|
ovbcopy_vector = i586_bcopy;
|
|
|
|
}
|
1999-04-16 21:22:55 +00:00
|
|
|
if (!(flags & NPX_DISABLE_I586_OPTIMIZED_BZERO))
|
1996-11-11 20:39:03 +00:00
|
|
|
bzero = i586_bzero;
|
1999-04-16 21:22:55 +00:00
|
|
|
if (!(flags & NPX_DISABLE_I586_OPTIMIZED_COPYIO)) {
|
1996-11-11 20:39:03 +00:00
|
|
|
copyin_vector = i586_copyin;
|
|
|
|
copyout_vector = i586_copyout;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
1999-04-16 21:22:55 +00:00
|
|
|
return (0); /* XXX unused */
|
1993-06-12 14:58:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize floating point unit.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
npxinit(control)
|
1995-01-03 04:00:06 +00:00
|
|
|
u_short control;
|
1993-06-12 14:58:17 +00:00
|
|
|
{
|
|
|
|
struct save87 dummy;
|
|
|
|
|
|
|
|
if (!npx_exists)
|
|
|
|
return;
|
|
|
|
/*
|
|
|
|
* fninit has the same h/w bugs as fnsave. Use the detoxified
|
1995-01-03 04:00:06 +00:00
|
|
|
* fnsave to throw away any junk in the fpu. npxsave() initializes
|
1993-06-12 14:58:17 +00:00
|
|
|
* the fpu and sets npxproc = NULL as important side effects.
|
|
|
|
*/
|
|
|
|
npxsave(&dummy);
|
|
|
|
stop_emulating();
|
|
|
|
fldcw(&control);
|
2001-01-10 04:43:51 +00:00
|
|
|
if (PCPU_GET(curpcb) != NULL)
|
|
|
|
fnsave(&PCPU_GET(curpcb)->pcb_savefpu);
|
1993-06-12 14:58:17 +00:00
|
|
|
start_emulating();
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Free coprocessor (if we have it).
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
npxexit(p)
|
|
|
|
struct proc *p;
|
|
|
|
{
|
|
|
|
|
2001-01-10 04:43:51 +00:00
|
|
|
if (p == PCPU_GET(npxproc))
|
|
|
|
npxsave(&PCPU_GET(curpcb)->pcb_savefpu);
|
1997-01-29 13:46:28 +00:00
|
|
|
#ifdef NPX_DEBUG
|
1994-11-14 14:59:06 +00:00
|
|
|
if (npx_exists) {
|
|
|
|
u_int masked_exceptions;
|
|
|
|
|
2001-01-10 04:43:51 +00:00
|
|
|
masked_exceptions = PCPU_GET(curpcb)->pcb_savefpu.sv_env.en_cw
|
2001-01-19 11:43:13 +00:00
|
|
|
& PCPU_GET(curpcb)->pcb_savefpu.sv_env.en_sw & 0x7f;
|
1994-11-14 14:59:06 +00:00
|
|
|
/*
|
1997-01-29 13:46:28 +00:00
|
|
|
* Log exceptions that would have trapped with the old
|
|
|
|
* control word (overflow, divide by 0, and invalid operand).
|
1994-11-14 14:59:06 +00:00
|
|
|
*/
|
|
|
|
if (masked_exceptions & 0x0d)
|
|
|
|
log(LOG_ERR,
|
|
|
|
"pid %d (%s) exited with masked floating point exceptions 0x%02x\n",
|
|
|
|
p->p_pid, p->p_comm, masked_exceptions);
|
1993-06-12 14:58:17 +00:00
|
|
|
}
|
1997-01-29 13:46:28 +00:00
|
|
|
#endif
|
1993-06-12 14:58:17 +00:00
|
|
|
}
|
|
|
|
|
1999-07-25 13:16:09 +00:00
|
|
|
/*
|
|
|
|
* The following mechanism is used to ensure that the FPE_... value
|
|
|
|
* that is passed as a trapcode to the signal handler of the user
|
|
|
|
* process does not have more than one bit set.
|
|
|
|
*
|
|
|
|
* Multiple bits may be set if the user process modifies the control
|
1999-07-26 05:47:31 +00:00
|
|
|
* word while a status word bit is already set. While this is a sign
|
1999-07-25 13:16:09 +00:00
|
|
|
* of bad coding, we have no choise than to narrow them down to one
|
|
|
|
* bit, since we must not send a trapcode that is not exactly one of
|
|
|
|
* the FPE_ macros.
|
|
|
|
*
|
1999-07-26 05:47:31 +00:00
|
|
|
* The mechanism has a static table with 127 entries. Each combination
|
1999-07-25 13:16:09 +00:00
|
|
|
* of the 7 FPU status word exception bits directly translates to a
|
|
|
|
* position in this table, where a single FPE_... value is stored.
|
|
|
|
* This FPE_... value stored there is considered the "most important"
|
1999-07-26 05:47:31 +00:00
|
|
|
* of the exception bits and will be sent as the signal code. The
|
1999-07-25 13:16:09 +00:00
|
|
|
* precedence of the bits is based upon Intel Document "Numerical
|
|
|
|
* Applications", Chapter "Special Computational Situations".
|
|
|
|
*
|
|
|
|
* The macro to choose one of these values does these steps: 1) Throw
|
1999-07-26 05:47:31 +00:00
|
|
|
* away status word bits that cannot be masked. 2) Throw away the bits
|
1999-07-25 13:16:09 +00:00
|
|
|
* currently masked in the control word, assuming the user isn't
|
1999-07-26 05:47:31 +00:00
|
|
|
* interested in them anymore. 3) Reinsert status word bit 7 (stack
|
1999-07-25 13:16:09 +00:00
|
|
|
* fault) if it is set, which cannot be masked but must be presered.
|
|
|
|
* 4) Use the remaining bits to point into the trapcode table.
|
|
|
|
*
|
|
|
|
* The 6 maskable bits in order of their preference, as stated in the
|
|
|
|
* above referenced Intel manual:
|
|
|
|
* 1 Invalid operation (FP_X_INV)
|
|
|
|
* 1a Stack underflow
|
|
|
|
* 1b Stack overflow
|
|
|
|
* 1c Operand of unsupported format
|
|
|
|
* 1d SNaN operand.
|
|
|
|
* 2 QNaN operand (not an exception, irrelavant here)
|
|
|
|
* 3 Any other invalid-operation not mentioned above or zero divide
|
|
|
|
* (FP_X_INV, FP_X_DZ)
|
|
|
|
* 4 Denormal operand (FP_X_DNML)
|
|
|
|
* 5 Numeric over/underflow (FP_X_OFL, FP_X_UFL)
|
1999-07-26 05:47:31 +00:00
|
|
|
* 6 Inexact result (FP_X_IMP)
|
|
|
|
*/
|
1999-07-25 13:16:09 +00:00
|
|
|
static char fpetable[128] = {
|
|
|
|
0,
|
1999-07-26 05:47:31 +00:00
|
|
|
FPE_FLTINV, /* 1 - INV */
|
|
|
|
FPE_FLTUND, /* 2 - DNML */
|
|
|
|
FPE_FLTINV, /* 3 - INV | DNML */
|
|
|
|
FPE_FLTDIV, /* 4 - DZ */
|
|
|
|
FPE_FLTINV, /* 5 - INV | DZ */
|
|
|
|
FPE_FLTDIV, /* 6 - DNML | DZ */
|
|
|
|
FPE_FLTINV, /* 7 - INV | DNML | DZ */
|
|
|
|
FPE_FLTOVF, /* 8 - OFL */
|
|
|
|
FPE_FLTINV, /* 9 - INV | OFL */
|
|
|
|
FPE_FLTUND, /* A - DNML | OFL */
|
|
|
|
FPE_FLTINV, /* B - INV | DNML | OFL */
|
|
|
|
FPE_FLTDIV, /* C - DZ | OFL */
|
|
|
|
FPE_FLTINV, /* D - INV | DZ | OFL */
|
|
|
|
FPE_FLTDIV, /* E - DNML | DZ | OFL */
|
|
|
|
FPE_FLTINV, /* F - INV | DNML | DZ | OFL */
|
|
|
|
FPE_FLTUND, /* 10 - UFL */
|
|
|
|
FPE_FLTINV, /* 11 - INV | UFL */
|
|
|
|
FPE_FLTUND, /* 12 - DNML | UFL */
|
|
|
|
FPE_FLTINV, /* 13 - INV | DNML | UFL */
|
|
|
|
FPE_FLTDIV, /* 14 - DZ | UFL */
|
|
|
|
FPE_FLTINV, /* 15 - INV | DZ | UFL */
|
|
|
|
FPE_FLTDIV, /* 16 - DNML | DZ | UFL */
|
|
|
|
FPE_FLTINV, /* 17 - INV | DNML | DZ | UFL */
|
|
|
|
FPE_FLTOVF, /* 18 - OFL | UFL */
|
|
|
|
FPE_FLTINV, /* 19 - INV | OFL | UFL */
|
|
|
|
FPE_FLTUND, /* 1A - DNML | OFL | UFL */
|
|
|
|
FPE_FLTINV, /* 1B - INV | DNML | OFL | UFL */
|
|
|
|
FPE_FLTDIV, /* 1C - DZ | OFL | UFL */
|
|
|
|
FPE_FLTINV, /* 1D - INV | DZ | OFL | UFL */
|
|
|
|
FPE_FLTDIV, /* 1E - DNML | DZ | OFL | UFL */
|
|
|
|
FPE_FLTINV, /* 1F - INV | DNML | DZ | OFL | UFL */
|
|
|
|
FPE_FLTRES, /* 20 - IMP */
|
|
|
|
FPE_FLTINV, /* 21 - INV | IMP */
|
|
|
|
FPE_FLTUND, /* 22 - DNML | IMP */
|
|
|
|
FPE_FLTINV, /* 23 - INV | DNML | IMP */
|
|
|
|
FPE_FLTDIV, /* 24 - DZ | IMP */
|
|
|
|
FPE_FLTINV, /* 25 - INV | DZ | IMP */
|
|
|
|
FPE_FLTDIV, /* 26 - DNML | DZ | IMP */
|
|
|
|
FPE_FLTINV, /* 27 - INV | DNML | DZ | IMP */
|
|
|
|
FPE_FLTOVF, /* 28 - OFL | IMP */
|
|
|
|
FPE_FLTINV, /* 29 - INV | OFL | IMP */
|
|
|
|
FPE_FLTUND, /* 2A - DNML | OFL | IMP */
|
|
|
|
FPE_FLTINV, /* 2B - INV | DNML | OFL | IMP */
|
|
|
|
FPE_FLTDIV, /* 2C - DZ | OFL | IMP */
|
|
|
|
FPE_FLTINV, /* 2D - INV | DZ | OFL | IMP */
|
|
|
|
FPE_FLTDIV, /* 2E - DNML | DZ | OFL | IMP */
|
|
|
|
FPE_FLTINV, /* 2F - INV | DNML | DZ | OFL | IMP */
|
|
|
|
FPE_FLTUND, /* 30 - UFL | IMP */
|
|
|
|
FPE_FLTINV, /* 31 - INV | UFL | IMP */
|
|
|
|
FPE_FLTUND, /* 32 - DNML | UFL | IMP */
|
|
|
|
FPE_FLTINV, /* 33 - INV | DNML | UFL | IMP */
|
|
|
|
FPE_FLTDIV, /* 34 - DZ | UFL | IMP */
|
|
|
|
FPE_FLTINV, /* 35 - INV | DZ | UFL | IMP */
|
|
|
|
FPE_FLTDIV, /* 36 - DNML | DZ | UFL | IMP */
|
|
|
|
FPE_FLTINV, /* 37 - INV | DNML | DZ | UFL | IMP */
|
|
|
|
FPE_FLTOVF, /* 38 - OFL | UFL | IMP */
|
|
|
|
FPE_FLTINV, /* 39 - INV | OFL | UFL | IMP */
|
|
|
|
FPE_FLTUND, /* 3A - DNML | OFL | UFL | IMP */
|
|
|
|
FPE_FLTINV, /* 3B - INV | DNML | OFL | UFL | IMP */
|
|
|
|
FPE_FLTDIV, /* 3C - DZ | OFL | UFL | IMP */
|
|
|
|
FPE_FLTINV, /* 3D - INV | DZ | OFL | UFL | IMP */
|
|
|
|
FPE_FLTDIV, /* 3E - DNML | DZ | OFL | UFL | IMP */
|
|
|
|
FPE_FLTINV, /* 3F - INV | DNML | DZ | OFL | UFL | IMP */
|
|
|
|
FPE_FLTSUB, /* 40 - STK */
|
|
|
|
FPE_FLTSUB, /* 41 - INV | STK */
|
|
|
|
FPE_FLTUND, /* 42 - DNML | STK */
|
|
|
|
FPE_FLTSUB, /* 43 - INV | DNML | STK */
|
|
|
|
FPE_FLTDIV, /* 44 - DZ | STK */
|
|
|
|
FPE_FLTSUB, /* 45 - INV | DZ | STK */
|
|
|
|
FPE_FLTDIV, /* 46 - DNML | DZ | STK */
|
|
|
|
FPE_FLTSUB, /* 47 - INV | DNML | DZ | STK */
|
|
|
|
FPE_FLTOVF, /* 48 - OFL | STK */
|
|
|
|
FPE_FLTSUB, /* 49 - INV | OFL | STK */
|
|
|
|
FPE_FLTUND, /* 4A - DNML | OFL | STK */
|
|
|
|
FPE_FLTSUB, /* 4B - INV | DNML | OFL | STK */
|
|
|
|
FPE_FLTDIV, /* 4C - DZ | OFL | STK */
|
|
|
|
FPE_FLTSUB, /* 4D - INV | DZ | OFL | STK */
|
|
|
|
FPE_FLTDIV, /* 4E - DNML | DZ | OFL | STK */
|
|
|
|
FPE_FLTSUB, /* 4F - INV | DNML | DZ | OFL | STK */
|
|
|
|
FPE_FLTUND, /* 50 - UFL | STK */
|
|
|
|
FPE_FLTSUB, /* 51 - INV | UFL | STK */
|
|
|
|
FPE_FLTUND, /* 52 - DNML | UFL | STK */
|
|
|
|
FPE_FLTSUB, /* 53 - INV | DNML | UFL | STK */
|
|
|
|
FPE_FLTDIV, /* 54 - DZ | UFL | STK */
|
|
|
|
FPE_FLTSUB, /* 55 - INV | DZ | UFL | STK */
|
|
|
|
FPE_FLTDIV, /* 56 - DNML | DZ | UFL | STK */
|
|
|
|
FPE_FLTSUB, /* 57 - INV | DNML | DZ | UFL | STK */
|
|
|
|
FPE_FLTOVF, /* 58 - OFL | UFL | STK */
|
|
|
|
FPE_FLTSUB, /* 59 - INV | OFL | UFL | STK */
|
|
|
|
FPE_FLTUND, /* 5A - DNML | OFL | UFL | STK */
|
|
|
|
FPE_FLTSUB, /* 5B - INV | DNML | OFL | UFL | STK */
|
|
|
|
FPE_FLTDIV, /* 5C - DZ | OFL | UFL | STK */
|
|
|
|
FPE_FLTSUB, /* 5D - INV | DZ | OFL | UFL | STK */
|
|
|
|
FPE_FLTDIV, /* 5E - DNML | DZ | OFL | UFL | STK */
|
|
|
|
FPE_FLTSUB, /* 5F - INV | DNML | DZ | OFL | UFL | STK */
|
|
|
|
FPE_FLTRES, /* 60 - IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 61 - INV | IMP | STK */
|
|
|
|
FPE_FLTUND, /* 62 - DNML | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 63 - INV | DNML | IMP | STK */
|
|
|
|
FPE_FLTDIV, /* 64 - DZ | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 65 - INV | DZ | IMP | STK */
|
|
|
|
FPE_FLTDIV, /* 66 - DNML | DZ | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 67 - INV | DNML | DZ | IMP | STK */
|
|
|
|
FPE_FLTOVF, /* 68 - OFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 69 - INV | OFL | IMP | STK */
|
|
|
|
FPE_FLTUND, /* 6A - DNML | OFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 6B - INV | DNML | OFL | IMP | STK */
|
|
|
|
FPE_FLTDIV, /* 6C - DZ | OFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 6D - INV | DZ | OFL | IMP | STK */
|
|
|
|
FPE_FLTDIV, /* 6E - DNML | DZ | OFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 6F - INV | DNML | DZ | OFL | IMP | STK */
|
|
|
|
FPE_FLTUND, /* 70 - UFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 71 - INV | UFL | IMP | STK */
|
|
|
|
FPE_FLTUND, /* 72 - DNML | UFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 73 - INV | DNML | UFL | IMP | STK */
|
|
|
|
FPE_FLTDIV, /* 74 - DZ | UFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 75 - INV | DZ | UFL | IMP | STK */
|
|
|
|
FPE_FLTDIV, /* 76 - DNML | DZ | UFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 77 - INV | DNML | DZ | UFL | IMP | STK */
|
|
|
|
FPE_FLTOVF, /* 78 - OFL | UFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 79 - INV | OFL | UFL | IMP | STK */
|
|
|
|
FPE_FLTUND, /* 7A - DNML | OFL | UFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 7B - INV | DNML | OFL | UFL | IMP | STK */
|
|
|
|
FPE_FLTDIV, /* 7C - DZ | OFL | UFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 7D - INV | DZ | OFL | UFL | IMP | STK */
|
|
|
|
FPE_FLTDIV, /* 7E - DNML | DZ | OFL | UFL | IMP | STK */
|
|
|
|
FPE_FLTSUB, /* 7F - INV | DNML | DZ | OFL | UFL | IMP | STK */
|
1999-07-25 13:16:09 +00:00
|
|
|
};
|
|
|
|
|
1993-06-12 14:58:17 +00:00
|
|
|
/*
|
1995-01-03 04:00:06 +00:00
|
|
|
* Preserve the FP status word, clear FP exceptions, then generate a SIGFPE.
|
|
|
|
*
|
|
|
|
* Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now
|
|
|
|
* depend on longjmp() restoring a usable state. Restoring the state
|
|
|
|
* or examining it might fail if we didn't clear exceptions.
|
|
|
|
*
|
1999-07-25 13:16:09 +00:00
|
|
|
* The error code chosen will be one of the FPE_... macros. It will be
|
|
|
|
* sent as the second argument to old BSD-style signal handlers and as
|
|
|
|
* "siginfo_t->si_code" (second argument) to SA_SIGINFO signal handlers.
|
1995-01-03 04:00:06 +00:00
|
|
|
*
|
|
|
|
* XXX the FP state is not preserved across signal handlers. So signal
|
|
|
|
* handlers cannot afford to do FP unless they preserve the state or
|
|
|
|
* longjmp() out. Both preserving the state and longjmp()ing may be
|
|
|
|
* destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable
|
|
|
|
* solution for signals other than SIGFPE.
|
1993-06-12 14:58:17 +00:00
|
|
|
*/
|
|
|
|
void
|
1999-04-16 21:22:55 +00:00
|
|
|
npx_intr(dummy)
|
|
|
|
void *dummy;
|
1993-06-12 14:58:17 +00:00
|
|
|
{
|
|
|
|
int code;
|
1999-07-26 05:47:31 +00:00
|
|
|
u_short control;
|
1995-09-19 18:55:37 +00:00
|
|
|
struct intrframe *frame;
|
1993-06-12 14:58:17 +00:00
|
|
|
|
Change and clean the mutex lock interface.
mtx_enter(lock, type) becomes:
mtx_lock(lock) for sleep locks (MTX_DEF-initialized locks)
mtx_lock_spin(lock) for spin locks (MTX_SPIN-initialized)
similarily, for releasing a lock, we now have:
mtx_unlock(lock) for MTX_DEF and mtx_unlock_spin(lock) for MTX_SPIN.
We change the caller interface for the two different types of locks
because the semantics are entirely different for each case, and this
makes it explicitly clear and, at the same time, it rids us of the
extra `type' argument.
The enter->lock and exit->unlock change has been made with the idea
that we're "locking data" and not "entering locked code" in mind.
Further, remove all additional "flags" previously passed to the
lock acquire/release routines with the exception of two:
MTX_QUIET and MTX_NOSWITCH
The functionality of these flags is preserved and they can be passed
to the lock/unlock routines by calling the corresponding wrappers:
mtx_{lock, unlock}_flags(lock, flag(s)) and
mtx_{lock, unlock}_spin_flags(lock, flag(s)) for MTX_DEF and MTX_SPIN
locks, respectively.
Re-inline some lock acq/rel code; in the sleep lock case, we only
inline the _obtain_lock()s in order to ensure that the inlined code
fits into a cache line. In the spin lock case, we inline recursion and
actually only perform a function call if we need to spin. This change
has been made with the idea that we generally tend to avoid spin locks
and that also the spin locks that we do have and are heavily used
(i.e. sched_lock) do recurse, and therefore in an effort to reduce
function call overhead for some architectures (such as alpha), we
inline recursion for this case.
Create a new malloc type for the witness code and retire from using
the M_DEV type. The new type is called M_WITNESS and is only declared
if WITNESS is enabled.
Begin cleaning up some machdep/mutex.h code - specifically updated the
"optimized" inlined code in alpha/mutex.h and wrote MTX_LOCK_SPIN
and MTX_UNLOCK_SPIN asm macros for the i386/mutex.h as we presently
need those.
Finally, caught up to the interface changes in all sys code.
Contributors: jake, jhb, jasone (in no particular order)
2001-02-09 06:11:45 +00:00
|
|
|
mtx_lock(&Giant);
|
2001-01-10 04:43:51 +00:00
|
|
|
if (PCPU_GET(npxproc) == NULL || !npx_exists) {
|
1995-01-03 04:00:06 +00:00
|
|
|
printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n",
|
2001-01-10 04:43:51 +00:00
|
|
|
PCPU_GET(npxproc), curproc, npx_exists);
|
1993-06-12 14:58:17 +00:00
|
|
|
panic("npxintr from nowhere");
|
|
|
|
}
|
2001-01-10 04:43:51 +00:00
|
|
|
if (PCPU_GET(npxproc) != curproc) {
|
1995-01-03 04:00:06 +00:00
|
|
|
printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n",
|
2001-01-10 04:43:51 +00:00
|
|
|
PCPU_GET(npxproc), curproc, npx_exists);
|
1993-06-12 14:58:17 +00:00
|
|
|
panic("npxintr from non-current process");
|
|
|
|
}
|
1995-01-03 04:00:06 +00:00
|
|
|
|
1995-02-17 19:38:13 +00:00
|
|
|
outb(0xf0, 0);
|
2001-01-10 04:43:51 +00:00
|
|
|
fnstsw(&PCPU_GET(curpcb)->pcb_savefpu.sv_ex_sw);
|
1999-07-26 05:47:31 +00:00
|
|
|
fnstcw(&control);
|
1995-01-03 04:00:06 +00:00
|
|
|
fnclex();
|
1993-06-12 14:58:17 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Pass exception to process.
|
|
|
|
*/
|
1999-04-16 21:22:55 +00:00
|
|
|
frame = (struct intrframe *)&dummy; /* XXX */
|
1997-08-21 06:33:04 +00:00
|
|
|
if ((ISPL(frame->if_cs) == SEL_UPL) || (frame->if_eflags & PSL_VM)) {
|
1993-06-12 14:58:17 +00:00
|
|
|
/*
|
|
|
|
* Interrupt is essentially a trap, so we can afford to call
|
|
|
|
* the SIGFPE handler (if any) as soon as the interrupt
|
|
|
|
* returns.
|
|
|
|
*
|
|
|
|
* XXX little or nothing is gained from this, and plenty is
|
|
|
|
* lost - the interrupt frame has to contain the trap frame
|
|
|
|
* (this is otherwise only necessary for the rescheduling trap
|
|
|
|
* in doreti, and the frame for that could easily be set up
|
|
|
|
* just before it is used).
|
|
|
|
*/
|
1999-05-11 16:29:21 +00:00
|
|
|
curproc->p_md.md_regs = INTR_TO_TRAPFRAME(frame);
|
1993-06-12 14:58:17 +00:00
|
|
|
/*
|
|
|
|
* Encode the appropriate code for detailed information on
|
|
|
|
* this exception.
|
|
|
|
*/
|
1999-07-26 05:47:31 +00:00
|
|
|
code =
|
2001-01-10 04:43:51 +00:00
|
|
|
fpetable[(PCPU_GET(curpcb)->pcb_savefpu.sv_ex_sw & ~control & 0x3f) |
|
|
|
|
(PCPU_GET(curpcb)->pcb_savefpu.sv_ex_sw & 0x40)];
|
1993-06-12 14:58:17 +00:00
|
|
|
trapsignal(curproc, SIGFPE, code);
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Nested interrupt. These losers occur when:
|
|
|
|
* o an IRQ13 is bogusly generated at a bogus time, e.g.:
|
|
|
|
* o immediately after an fnsave or frstor of an
|
|
|
|
* error state.
|
|
|
|
* o a couple of 386 instructions after
|
|
|
|
* "fstpl _memvar" causes a stack overflow.
|
|
|
|
* These are especially nasty when combined with a
|
|
|
|
* trace trap.
|
|
|
|
* o an IRQ13 occurs at the same time as another higher-
|
|
|
|
* priority interrupt.
|
|
|
|
*
|
|
|
|
* Treat them like a true async interrupt.
|
|
|
|
*/
|
1995-01-03 04:00:06 +00:00
|
|
|
psignal(curproc, SIGFPE);
|
1993-06-12 14:58:17 +00:00
|
|
|
}
|
Change and clean the mutex lock interface.
mtx_enter(lock, type) becomes:
mtx_lock(lock) for sleep locks (MTX_DEF-initialized locks)
mtx_lock_spin(lock) for spin locks (MTX_SPIN-initialized)
similarily, for releasing a lock, we now have:
mtx_unlock(lock) for MTX_DEF and mtx_unlock_spin(lock) for MTX_SPIN.
We change the caller interface for the two different types of locks
because the semantics are entirely different for each case, and this
makes it explicitly clear and, at the same time, it rids us of the
extra `type' argument.
The enter->lock and exit->unlock change has been made with the idea
that we're "locking data" and not "entering locked code" in mind.
Further, remove all additional "flags" previously passed to the
lock acquire/release routines with the exception of two:
MTX_QUIET and MTX_NOSWITCH
The functionality of these flags is preserved and they can be passed
to the lock/unlock routines by calling the corresponding wrappers:
mtx_{lock, unlock}_flags(lock, flag(s)) and
mtx_{lock, unlock}_spin_flags(lock, flag(s)) for MTX_DEF and MTX_SPIN
locks, respectively.
Re-inline some lock acq/rel code; in the sleep lock case, we only
inline the _obtain_lock()s in order to ensure that the inlined code
fits into a cache line. In the spin lock case, we inline recursion and
actually only perform a function call if we need to spin. This change
has been made with the idea that we generally tend to avoid spin locks
and that also the spin locks that we do have and are heavily used
(i.e. sched_lock) do recurse, and therefore in an effort to reduce
function call overhead for some architectures (such as alpha), we
inline recursion for this case.
Create a new malloc type for the witness code and retire from using
the M_DEV type. The new type is called M_WITNESS and is only declared
if WITNESS is enabled.
Begin cleaning up some machdep/mutex.h code - specifically updated the
"optimized" inlined code in alpha/mutex.h and wrote MTX_LOCK_SPIN
and MTX_UNLOCK_SPIN asm macros for the i386/mutex.h as we presently
need those.
Finally, caught up to the interface changes in all sys code.
Contributors: jake, jhb, jasone (in no particular order)
2001-02-09 06:11:45 +00:00
|
|
|
mtx_unlock(&Giant);
|
1993-06-12 14:58:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Implement device not available (DNA) exception
|
|
|
|
*
|
1995-01-03 04:00:06 +00:00
|
|
|
* It would be better to switch FP context here (if curproc != npxproc)
|
|
|
|
* and not necessarily for every context switch, but it is too hard to
|
|
|
|
* access foreign pcb's.
|
1993-06-12 14:58:17 +00:00
|
|
|
*/
|
|
|
|
int
|
|
|
|
npxdna()
|
|
|
|
{
|
2001-02-01 03:34:20 +00:00
|
|
|
int s;
|
|
|
|
|
1993-06-12 14:58:17 +00:00
|
|
|
if (!npx_exists)
|
|
|
|
return (0);
|
2001-01-10 04:43:51 +00:00
|
|
|
if (PCPU_GET(npxproc) != NULL) {
|
1995-01-03 04:00:06 +00:00
|
|
|
printf("npxdna: npxproc = %p, curproc = %p\n",
|
2001-01-10 04:43:51 +00:00
|
|
|
PCPU_GET(npxproc), curproc);
|
1993-06-12 14:58:17 +00:00
|
|
|
panic("npxdna");
|
|
|
|
}
|
2001-02-01 03:34:20 +00:00
|
|
|
s = save_intr();
|
|
|
|
disable_intr();
|
1993-06-12 14:58:17 +00:00
|
|
|
stop_emulating();
|
|
|
|
/*
|
|
|
|
* Record new context early in case frstor causes an IRQ13.
|
|
|
|
*/
|
2000-09-07 01:33:02 +00:00
|
|
|
PCPU_SET(npxproc, CURPROC);
|
2001-01-10 04:43:51 +00:00
|
|
|
PCPU_GET(curpcb)->pcb_savefpu.sv_ex_sw = 0;
|
1993-06-12 14:58:17 +00:00
|
|
|
/*
|
|
|
|
* The following frstor may cause an IRQ13 when the state being
|
|
|
|
* restored has a pending error. The error will appear to have been
|
|
|
|
* triggered by the current (npx) user instruction even when that
|
|
|
|
* instruction is a no-wait instruction that should not trigger an
|
|
|
|
* error (e.g., fnclex). On at least one 486 system all of the
|
|
|
|
* no-wait instructions are broken the same as frstor, so our
|
|
|
|
* treatment does not amplify the breakage. On at least one
|
|
|
|
* 386/Cyrix 387 system, fnclex works correctly while frstor and
|
|
|
|
* fnsave are broken, so our treatment breaks fnclex if it is the
|
|
|
|
* first FPU instruction after a context switch.
|
|
|
|
*/
|
2001-01-10 04:43:51 +00:00
|
|
|
frstor(&PCPU_GET(curpcb)->pcb_savefpu);
|
2001-02-01 03:34:20 +00:00
|
|
|
restore_intr(s);
|
1993-06-12 14:58:17 +00:00
|
|
|
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Wrapper for fnsave instruction to handle h/w bugs. If there is an error
|
|
|
|
* pending, then fnsave generates a bogus IRQ13 on some systems. Force
|
|
|
|
* any IRQ13 to be handled immediately, and then ignore it. This routine is
|
|
|
|
* often called at splhigh so it must not use many system services. In
|
|
|
|
* particular, it's much easier to install a special handler than to
|
|
|
|
* guarantee that it's safe to use npxintr() and its supporting code.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
npxsave(addr)
|
|
|
|
struct save87 *addr;
|
|
|
|
{
|
1997-07-21 07:57:50 +00:00
|
|
|
#ifdef SMP
|
|
|
|
|
|
|
|
stop_emulating();
|
|
|
|
fnsave(addr);
|
|
|
|
/* fnop(); */
|
|
|
|
start_emulating();
|
2000-09-07 01:33:02 +00:00
|
|
|
PCPU_SET(npxproc, NULL);
|
1997-07-21 07:57:50 +00:00
|
|
|
|
|
|
|
#else /* SMP */
|
|
|
|
|
2000-09-07 01:33:02 +00:00
|
|
|
int intrstate;
|
1993-06-12 14:58:17 +00:00
|
|
|
u_char icu1_mask;
|
|
|
|
u_char icu2_mask;
|
|
|
|
u_char old_icu1_mask;
|
|
|
|
u_char old_icu2_mask;
|
|
|
|
struct gate_descriptor save_idt_npxintr;
|
|
|
|
|
2000-09-07 01:33:02 +00:00
|
|
|
intrstate = save_intr();
|
1993-06-12 14:58:17 +00:00
|
|
|
disable_intr();
|
|
|
|
old_icu1_mask = inb(IO_ICU1 + 1);
|
|
|
|
old_icu2_mask = inb(IO_ICU2 + 1);
|
|
|
|
save_idt_npxintr = idt[npx_intrno];
|
New interrupt code from Bruce Evans. In additional to Bruce's attached
list of changes, I've made the following additional changes:
1) i386/include/ipl.h renamed to spl.h as the name conflicts with the
file of the same name in i386/isa/ipl.h.
2) changed all use of *mask (i.e. netmask, biomask, ttymask, etc) to
*_imask (net_imask, etc).
3) changed vestige of splnet use in if_is to splimp.
4) got rid of "impmask" completely (Bruce had gotten rid of netmask),
and are now using net_imask instead.
5) dozens of minor cruft to glue in Bruce's changes.
These require changes I made to config(8) as well, and thus it must
be rebuilt.
-DG
from Bruce Evans:
sio:
o No diff is supplied. Remove the define of setsofttty(). I hope
that is enough.
*.s:
o i386/isa/debug.h no longer exists. The event counters became too
much trouble to maintain. All function call entry and exception
entry counters can be recovered by using profiling kernel (the new
profiling supports all entry points; however, it is too slow to
leave enabled all the time; it also). Only BDBTRAP() from debug.h
is now used. That is moved to exception.s. It might be worth
preserving SHOW_BITS() and calling it from _mcount() (if enabled).
o T_ASTFLT is now only set just before calling trap().
o All exception handlers set SWI_AST_MASK in cpl as soon as possible
after entry and arrange for _doreti to restore it atomically with
exiting. It is not possible to set it atomically with entering
the kernel, so it must be checked against the user mode bits in
the trap frame before committing to using it. There is no place
to store the old value of cpl for syscalls or traps, so there are
some complications restoring it.
Profiling stuff (mostly in *.s):
o Changes to kern/subr_mcount.c, gcc and gprof are not supplied yet.
o All interesting labels `foo' are renamed `_foo' and all
uninteresting labels `_bar' are renamed `bar'. A small change
to gprof allows ignoring labels not starting with underscores.
o MCOUNT_LABEL() is to provide names for counters for times spent
in exception handlers.
o FAKE_MCOUNT() is a version of MCOUNT() suitable for exception
handlers. Its arg is the pc where the exception occurred. The
new mcount() pretends that this was a call from that pc to a
suitable MCOUNT_LABEL().
o MEXITCOUNT is to turn off any timer started by MCOUNT().
/usr/src/sys/i386/i386/exception.s:
o The non-BDB BPTTRAP() macros were doing a sti even when interrupts
were disabled when the trap occurred. The sti (fixed) sti is
actually a no-op unless you have my changes to machdep.c that make
the debugger trap gates interrupt gates, but fixing that would
make the ifdefs messier. ddb seems to be unharmed by both
interrupts always disabled and always enabled (I had the branch in
the fix back to front for some time :-().
o There is no known pushal bug.
o tf_err can be left as garbage for syscalls.
/usr/src/sys/i386/i386/locore.s:
o Fix and update BDE_DEBUGGER support.
o ENTRY(btext) before initialization was dangerous.
o Warm boot shot was longer than intended.
/usr/src/sys/i386/i386/machdep.c:
o DON'T APPLY ALL OF THIS DIFF. It's what I'm using, but may require
other changes.
Use the following:
o Remove aston() and setsoftclock().
Maybe use the following:
o No netisr.h.
o Spelling fix.
o Delay to read the Rebooting message.
o Fix for vm system unmapping a reduced area of memory
after bounds_check_with_label() reduces the size of
a physical i/o for a partition boundary. A similar
fix is required in kern_physio.c.
o Correct use of __CONCAT. It never worked here for non-
ANSI cpp's. Is it time to drop support for non-ANSI?
o gdt_segs init. 0xffffffffUL is bogus because ssd_limit
is not 32 bits. The replacement may have the same
value :-), but is more natural.
o physmem was one page too low. Confusing variable names.
Don't use the following:
o Better numbers of buffers. Each 8K page requires up to
16 buffer headers. On my system, this results in 5576
buffers containing [up to] 2854912 bytes of memory.
The usual allocation of about 384 buffers only holds
192K of disk if you use it on an fs with a block size
of 512.
o gdt changes for bdb.
o *TGT -> *IDT changes for bdb.
o #ifdefed changes for bdb.
/usr/src/sys/i386/i386/microtime.s:
o Use the correct asm macros. I think asm.h was copied from Mach
just for microtime and isn't used now. It certainly doesn't
belong in <sys>. Various macros are also duplicated in
sys/i386/boot.h and libc/i386/*.h.
o Don't switch to and from the IRR; it is guaranteed to be selected
(default after ICU init and explicitly selected in isa.c too, and
never changed until the old microtime clobbered it).
/usr/src/sys/i386/i386/support.s:
o Non-essential changes (none related to spls or profiling).
o Removed slow loads of %gs again. The LDT support may require
not relying on %gs, but loading it is not the way to fix it!
Some places (copyin ...) forgot to load it. Loading it clobbers
the user %gs. trap() still loads it after certain types of
faults so that fuword() etc can rely on it without loading it
explicitly. Exception handlers don't restore it. If we want
to preserve the user %gs, then the fastest method is to not
touch it except for context switches. Comparing with
VM_MAXUSER_ADDRESS and branching takes only 2 or 4 cycles on
a 486, while loading %gs takes 9 cycles and using it takes
another.
o Fixed a signed branch to unsigned.
/usr/src/sys/i386/i386/swtch.s:
o Move spl0() outside of idle loop.
o Remove cli/sti from idle loop. sw1 does a cli, and in the
unlikely event of an interrupt occurring and whichqs becoming
zero, sw1 will just jump back to _idle.
o There's no spl0() function in asm any more, so use splz().
o swtch() doesn't need to be superaligned, at least with the
new mcounting.
o Fixed a signed branch to unsigned.
o Removed astoff().
/usr/src/sys/i386/i386/trap.c:
o The decentralized extern decls were inconsistent, of course.
o Fixed typo MATH_EMULTATE in comments. */
o Removed unused variables.
o Old netmask is now impmask; print it instead. Perhaps we
should print some of the new masks.
o BTW, trap() should not print anything for normal debugger
traps.
/usr/src/sys/i386/include/asmacros.h:
o DON'T APPLY ALL OF THIS DIFF. Just use some of the null macros
as necessary.
/usr/src/sys/i386/include/cpu.h:
o CLKF_BASEPRI() changes since cpl == SWI_AST_MASK is now normal
while the kernel is running.
o Don't use var++ to set boolean variables. It fails after a mere
4G times :-) and is slower than storing a constant on [3-4]86s.
/usr/src/sys/i386/include/cpufunc.h:
o DON'T APPLY ALL OF THIS DIFF. You need mainly the include of
<machine/ipl.h>. Unfortunately, <machine/ipl.h> is needed by
almost everything for the inlines.
/usr/src/sys/i386/include/ipl.h:
o New file. Defines spl inlines and SWI macros and declares most
variables related to hard and soft interrupt masks.
/usr/src/sys/i386/isa/icu.h:
o Moved definitions to <machine/ipl.h>
/usr/src/sys/i386/isa/icu.s:
o Software interrupts (SWIs) and delayed hardware interrupts (HWIs)
are now handled uniformally, and dispatching them from splx() is
more like dispatching them from _doreti. The dispatcher is
essentially *(handler[ffs(ipending & ~cpl)]().
o More care (not quite enough) is taken to avoid unbounded nesting
of interrupts.
o The interface to softclock() is changed so that a trap frame is
not required.
o Fast interrupt handlers are now handled more uniformally.
Configuration is still too early (new handlers would require
bits in <machine/ipl.h> and functions to vector.s).
o splnnn() and splx() are no longer here; they are inline functions
(could be macros for other compilers). splz() is the nontrivial
part of the old splx().
/usr/src/sys/i386/isa/ipl.h
o New file. Supposed to have only bus-dependent stuff. Perhaps
the h/w masks should be declared here.
/usr/src/sys/i386/isa/isa.c:
o DON'T APPLY ALL OF THIS DIFF. You need only things involving
*mask and *MASK and comments about them. netmask is now a pure
software mask. It works like the softclock mask.
/usr/src/sys/i386/isa/vector.s:
o Reorganize AUTO_EOI* macros.
o Option FAST_INTR_HANDLER_USERS_ES for people who don't trust
fastintr handlers.
o fastintr handlers need to metamorphose into ordinary interrupt
handlers if their SWI bit has become set. Previously, sio had
unintended latency for handling output completions and input
of SLIP framing characters because this was not done.
/usr/src/sys/net/netisr.h:
o The machine-dependent stuff is now imported from <machine/ipl.h>.
/usr/src/sys/sys/systm.h
o DON'T APPLY ALL OF THIS DIFF. You need mainly the different
splx() prototype. The spl*() prototypes are duplicated as
inlines in <machine/ipl.h> but they need to be duplicated here
in case there are no inlines. I sent systm.h and cpufunc.h
to Garrett. We agree that spl0 should be replaced by splnone
and not the other way around like I've done.
/usr/src/sys/kern/kern_clock.c
o splsoftclock() now lowers cpl so the direct call to softclock()
works as intended.
o softclock() interface changed to avoid passing the whole frame
(some machines may need another change for profile_tick()).
o profiling renamed _profiling to avoid ANSI namespace pollution.
(I had to improve the mcount() interface and may as well fix it.)
The GUPROF variant doesn't actually reference profiling here,
but the 'U' in GUPROF should mean to select the microtimer
mcount() and not change the interface.
1994-04-02 07:00:53 +00:00
|
|
|
outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask));
|
|
|
|
outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8));
|
1993-06-12 14:58:17 +00:00
|
|
|
idt[npx_intrno] = npx_idt_probeintr;
|
2000-09-07 01:33:02 +00:00
|
|
|
write_eflags(intrstate);
|
1993-06-12 14:58:17 +00:00
|
|
|
stop_emulating();
|
|
|
|
fnsave(addr);
|
1995-01-03 04:00:06 +00:00
|
|
|
fnop();
|
1993-06-12 14:58:17 +00:00
|
|
|
start_emulating();
|
2000-09-07 01:33:02 +00:00
|
|
|
PCPU_SET(npxproc, NULL);
|
1993-06-12 14:58:17 +00:00
|
|
|
disable_intr();
|
|
|
|
icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */
|
|
|
|
icu2_mask = inb(IO_ICU2 + 1);
|
|
|
|
outb(IO_ICU1 + 1,
|
New interrupt code from Bruce Evans. In additional to Bruce's attached
list of changes, I've made the following additional changes:
1) i386/include/ipl.h renamed to spl.h as the name conflicts with the
file of the same name in i386/isa/ipl.h.
2) changed all use of *mask (i.e. netmask, biomask, ttymask, etc) to
*_imask (net_imask, etc).
3) changed vestige of splnet use in if_is to splimp.
4) got rid of "impmask" completely (Bruce had gotten rid of netmask),
and are now using net_imask instead.
5) dozens of minor cruft to glue in Bruce's changes.
These require changes I made to config(8) as well, and thus it must
be rebuilt.
-DG
from Bruce Evans:
sio:
o No diff is supplied. Remove the define of setsofttty(). I hope
that is enough.
*.s:
o i386/isa/debug.h no longer exists. The event counters became too
much trouble to maintain. All function call entry and exception
entry counters can be recovered by using profiling kernel (the new
profiling supports all entry points; however, it is too slow to
leave enabled all the time; it also). Only BDBTRAP() from debug.h
is now used. That is moved to exception.s. It might be worth
preserving SHOW_BITS() and calling it from _mcount() (if enabled).
o T_ASTFLT is now only set just before calling trap().
o All exception handlers set SWI_AST_MASK in cpl as soon as possible
after entry and arrange for _doreti to restore it atomically with
exiting. It is not possible to set it atomically with entering
the kernel, so it must be checked against the user mode bits in
the trap frame before committing to using it. There is no place
to store the old value of cpl for syscalls or traps, so there are
some complications restoring it.
Profiling stuff (mostly in *.s):
o Changes to kern/subr_mcount.c, gcc and gprof are not supplied yet.
o All interesting labels `foo' are renamed `_foo' and all
uninteresting labels `_bar' are renamed `bar'. A small change
to gprof allows ignoring labels not starting with underscores.
o MCOUNT_LABEL() is to provide names for counters for times spent
in exception handlers.
o FAKE_MCOUNT() is a version of MCOUNT() suitable for exception
handlers. Its arg is the pc where the exception occurred. The
new mcount() pretends that this was a call from that pc to a
suitable MCOUNT_LABEL().
o MEXITCOUNT is to turn off any timer started by MCOUNT().
/usr/src/sys/i386/i386/exception.s:
o The non-BDB BPTTRAP() macros were doing a sti even when interrupts
were disabled when the trap occurred. The sti (fixed) sti is
actually a no-op unless you have my changes to machdep.c that make
the debugger trap gates interrupt gates, but fixing that would
make the ifdefs messier. ddb seems to be unharmed by both
interrupts always disabled and always enabled (I had the branch in
the fix back to front for some time :-().
o There is no known pushal bug.
o tf_err can be left as garbage for syscalls.
/usr/src/sys/i386/i386/locore.s:
o Fix and update BDE_DEBUGGER support.
o ENTRY(btext) before initialization was dangerous.
o Warm boot shot was longer than intended.
/usr/src/sys/i386/i386/machdep.c:
o DON'T APPLY ALL OF THIS DIFF. It's what I'm using, but may require
other changes.
Use the following:
o Remove aston() and setsoftclock().
Maybe use the following:
o No netisr.h.
o Spelling fix.
o Delay to read the Rebooting message.
o Fix for vm system unmapping a reduced area of memory
after bounds_check_with_label() reduces the size of
a physical i/o for a partition boundary. A similar
fix is required in kern_physio.c.
o Correct use of __CONCAT. It never worked here for non-
ANSI cpp's. Is it time to drop support for non-ANSI?
o gdt_segs init. 0xffffffffUL is bogus because ssd_limit
is not 32 bits. The replacement may have the same
value :-), but is more natural.
o physmem was one page too low. Confusing variable names.
Don't use the following:
o Better numbers of buffers. Each 8K page requires up to
16 buffer headers. On my system, this results in 5576
buffers containing [up to] 2854912 bytes of memory.
The usual allocation of about 384 buffers only holds
192K of disk if you use it on an fs with a block size
of 512.
o gdt changes for bdb.
o *TGT -> *IDT changes for bdb.
o #ifdefed changes for bdb.
/usr/src/sys/i386/i386/microtime.s:
o Use the correct asm macros. I think asm.h was copied from Mach
just for microtime and isn't used now. It certainly doesn't
belong in <sys>. Various macros are also duplicated in
sys/i386/boot.h and libc/i386/*.h.
o Don't switch to and from the IRR; it is guaranteed to be selected
(default after ICU init and explicitly selected in isa.c too, and
never changed until the old microtime clobbered it).
/usr/src/sys/i386/i386/support.s:
o Non-essential changes (none related to spls or profiling).
o Removed slow loads of %gs again. The LDT support may require
not relying on %gs, but loading it is not the way to fix it!
Some places (copyin ...) forgot to load it. Loading it clobbers
the user %gs. trap() still loads it after certain types of
faults so that fuword() etc can rely on it without loading it
explicitly. Exception handlers don't restore it. If we want
to preserve the user %gs, then the fastest method is to not
touch it except for context switches. Comparing with
VM_MAXUSER_ADDRESS and branching takes only 2 or 4 cycles on
a 486, while loading %gs takes 9 cycles and using it takes
another.
o Fixed a signed branch to unsigned.
/usr/src/sys/i386/i386/swtch.s:
o Move spl0() outside of idle loop.
o Remove cli/sti from idle loop. sw1 does a cli, and in the
unlikely event of an interrupt occurring and whichqs becoming
zero, sw1 will just jump back to _idle.
o There's no spl0() function in asm any more, so use splz().
o swtch() doesn't need to be superaligned, at least with the
new mcounting.
o Fixed a signed branch to unsigned.
o Removed astoff().
/usr/src/sys/i386/i386/trap.c:
o The decentralized extern decls were inconsistent, of course.
o Fixed typo MATH_EMULTATE in comments. */
o Removed unused variables.
o Old netmask is now impmask; print it instead. Perhaps we
should print some of the new masks.
o BTW, trap() should not print anything for normal debugger
traps.
/usr/src/sys/i386/include/asmacros.h:
o DON'T APPLY ALL OF THIS DIFF. Just use some of the null macros
as necessary.
/usr/src/sys/i386/include/cpu.h:
o CLKF_BASEPRI() changes since cpl == SWI_AST_MASK is now normal
while the kernel is running.
o Don't use var++ to set boolean variables. It fails after a mere
4G times :-) and is slower than storing a constant on [3-4]86s.
/usr/src/sys/i386/include/cpufunc.h:
o DON'T APPLY ALL OF THIS DIFF. You need mainly the include of
<machine/ipl.h>. Unfortunately, <machine/ipl.h> is needed by
almost everything for the inlines.
/usr/src/sys/i386/include/ipl.h:
o New file. Defines spl inlines and SWI macros and declares most
variables related to hard and soft interrupt masks.
/usr/src/sys/i386/isa/icu.h:
o Moved definitions to <machine/ipl.h>
/usr/src/sys/i386/isa/icu.s:
o Software interrupts (SWIs) and delayed hardware interrupts (HWIs)
are now handled uniformally, and dispatching them from splx() is
more like dispatching them from _doreti. The dispatcher is
essentially *(handler[ffs(ipending & ~cpl)]().
o More care (not quite enough) is taken to avoid unbounded nesting
of interrupts.
o The interface to softclock() is changed so that a trap frame is
not required.
o Fast interrupt handlers are now handled more uniformally.
Configuration is still too early (new handlers would require
bits in <machine/ipl.h> and functions to vector.s).
o splnnn() and splx() are no longer here; they are inline functions
(could be macros for other compilers). splz() is the nontrivial
part of the old splx().
/usr/src/sys/i386/isa/ipl.h
o New file. Supposed to have only bus-dependent stuff. Perhaps
the h/w masks should be declared here.
/usr/src/sys/i386/isa/isa.c:
o DON'T APPLY ALL OF THIS DIFF. You need only things involving
*mask and *MASK and comments about them. netmask is now a pure
software mask. It works like the softclock mask.
/usr/src/sys/i386/isa/vector.s:
o Reorganize AUTO_EOI* macros.
o Option FAST_INTR_HANDLER_USERS_ES for people who don't trust
fastintr handlers.
o fastintr handlers need to metamorphose into ordinary interrupt
handlers if their SWI bit has become set. Previously, sio had
unintended latency for handling output completions and input
of SLIP framing characters because this was not done.
/usr/src/sys/net/netisr.h:
o The machine-dependent stuff is now imported from <machine/ipl.h>.
/usr/src/sys/sys/systm.h
o DON'T APPLY ALL OF THIS DIFF. You need mainly the different
splx() prototype. The spl*() prototypes are duplicated as
inlines in <machine/ipl.h> but they need to be duplicated here
in case there are no inlines. I sent systm.h and cpufunc.h
to Garrett. We agree that spl0 should be replaced by splnone
and not the other way around like I've done.
/usr/src/sys/kern/kern_clock.c
o splsoftclock() now lowers cpl so the direct call to softclock()
works as intended.
o softclock() interface changed to avoid passing the whole frame
(some machines may need another change for profile_tick()).
o profiling renamed _profiling to avoid ANSI namespace pollution.
(I had to improve the mcount() interface and may as well fix it.)
The GUPROF variant doesn't actually reference profiling here,
but the 'U' in GUPROF should mean to select the microtimer
mcount() and not change the interface.
1994-04-02 07:00:53 +00:00
|
|
|
(icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask));
|
1993-06-12 14:58:17 +00:00
|
|
|
outb(IO_ICU2 + 1,
|
New interrupt code from Bruce Evans. In additional to Bruce's attached
list of changes, I've made the following additional changes:
1) i386/include/ipl.h renamed to spl.h as the name conflicts with the
file of the same name in i386/isa/ipl.h.
2) changed all use of *mask (i.e. netmask, biomask, ttymask, etc) to
*_imask (net_imask, etc).
3) changed vestige of splnet use in if_is to splimp.
4) got rid of "impmask" completely (Bruce had gotten rid of netmask),
and are now using net_imask instead.
5) dozens of minor cruft to glue in Bruce's changes.
These require changes I made to config(8) as well, and thus it must
be rebuilt.
-DG
from Bruce Evans:
sio:
o No diff is supplied. Remove the define of setsofttty(). I hope
that is enough.
*.s:
o i386/isa/debug.h no longer exists. The event counters became too
much trouble to maintain. All function call entry and exception
entry counters can be recovered by using profiling kernel (the new
profiling supports all entry points; however, it is too slow to
leave enabled all the time; it also). Only BDBTRAP() from debug.h
is now used. That is moved to exception.s. It might be worth
preserving SHOW_BITS() and calling it from _mcount() (if enabled).
o T_ASTFLT is now only set just before calling trap().
o All exception handlers set SWI_AST_MASK in cpl as soon as possible
after entry and arrange for _doreti to restore it atomically with
exiting. It is not possible to set it atomically with entering
the kernel, so it must be checked against the user mode bits in
the trap frame before committing to using it. There is no place
to store the old value of cpl for syscalls or traps, so there are
some complications restoring it.
Profiling stuff (mostly in *.s):
o Changes to kern/subr_mcount.c, gcc and gprof are not supplied yet.
o All interesting labels `foo' are renamed `_foo' and all
uninteresting labels `_bar' are renamed `bar'. A small change
to gprof allows ignoring labels not starting with underscores.
o MCOUNT_LABEL() is to provide names for counters for times spent
in exception handlers.
o FAKE_MCOUNT() is a version of MCOUNT() suitable for exception
handlers. Its arg is the pc where the exception occurred. The
new mcount() pretends that this was a call from that pc to a
suitable MCOUNT_LABEL().
o MEXITCOUNT is to turn off any timer started by MCOUNT().
/usr/src/sys/i386/i386/exception.s:
o The non-BDB BPTTRAP() macros were doing a sti even when interrupts
were disabled when the trap occurred. The sti (fixed) sti is
actually a no-op unless you have my changes to machdep.c that make
the debugger trap gates interrupt gates, but fixing that would
make the ifdefs messier. ddb seems to be unharmed by both
interrupts always disabled and always enabled (I had the branch in
the fix back to front for some time :-().
o There is no known pushal bug.
o tf_err can be left as garbage for syscalls.
/usr/src/sys/i386/i386/locore.s:
o Fix and update BDE_DEBUGGER support.
o ENTRY(btext) before initialization was dangerous.
o Warm boot shot was longer than intended.
/usr/src/sys/i386/i386/machdep.c:
o DON'T APPLY ALL OF THIS DIFF. It's what I'm using, but may require
other changes.
Use the following:
o Remove aston() and setsoftclock().
Maybe use the following:
o No netisr.h.
o Spelling fix.
o Delay to read the Rebooting message.
o Fix for vm system unmapping a reduced area of memory
after bounds_check_with_label() reduces the size of
a physical i/o for a partition boundary. A similar
fix is required in kern_physio.c.
o Correct use of __CONCAT. It never worked here for non-
ANSI cpp's. Is it time to drop support for non-ANSI?
o gdt_segs init. 0xffffffffUL is bogus because ssd_limit
is not 32 bits. The replacement may have the same
value :-), but is more natural.
o physmem was one page too low. Confusing variable names.
Don't use the following:
o Better numbers of buffers. Each 8K page requires up to
16 buffer headers. On my system, this results in 5576
buffers containing [up to] 2854912 bytes of memory.
The usual allocation of about 384 buffers only holds
192K of disk if you use it on an fs with a block size
of 512.
o gdt changes for bdb.
o *TGT -> *IDT changes for bdb.
o #ifdefed changes for bdb.
/usr/src/sys/i386/i386/microtime.s:
o Use the correct asm macros. I think asm.h was copied from Mach
just for microtime and isn't used now. It certainly doesn't
belong in <sys>. Various macros are also duplicated in
sys/i386/boot.h and libc/i386/*.h.
o Don't switch to and from the IRR; it is guaranteed to be selected
(default after ICU init and explicitly selected in isa.c too, and
never changed until the old microtime clobbered it).
/usr/src/sys/i386/i386/support.s:
o Non-essential changes (none related to spls or profiling).
o Removed slow loads of %gs again. The LDT support may require
not relying on %gs, but loading it is not the way to fix it!
Some places (copyin ...) forgot to load it. Loading it clobbers
the user %gs. trap() still loads it after certain types of
faults so that fuword() etc can rely on it without loading it
explicitly. Exception handlers don't restore it. If we want
to preserve the user %gs, then the fastest method is to not
touch it except for context switches. Comparing with
VM_MAXUSER_ADDRESS and branching takes only 2 or 4 cycles on
a 486, while loading %gs takes 9 cycles and using it takes
another.
o Fixed a signed branch to unsigned.
/usr/src/sys/i386/i386/swtch.s:
o Move spl0() outside of idle loop.
o Remove cli/sti from idle loop. sw1 does a cli, and in the
unlikely event of an interrupt occurring and whichqs becoming
zero, sw1 will just jump back to _idle.
o There's no spl0() function in asm any more, so use splz().
o swtch() doesn't need to be superaligned, at least with the
new mcounting.
o Fixed a signed branch to unsigned.
o Removed astoff().
/usr/src/sys/i386/i386/trap.c:
o The decentralized extern decls were inconsistent, of course.
o Fixed typo MATH_EMULTATE in comments. */
o Removed unused variables.
o Old netmask is now impmask; print it instead. Perhaps we
should print some of the new masks.
o BTW, trap() should not print anything for normal debugger
traps.
/usr/src/sys/i386/include/asmacros.h:
o DON'T APPLY ALL OF THIS DIFF. Just use some of the null macros
as necessary.
/usr/src/sys/i386/include/cpu.h:
o CLKF_BASEPRI() changes since cpl == SWI_AST_MASK is now normal
while the kernel is running.
o Don't use var++ to set boolean variables. It fails after a mere
4G times :-) and is slower than storing a constant on [3-4]86s.
/usr/src/sys/i386/include/cpufunc.h:
o DON'T APPLY ALL OF THIS DIFF. You need mainly the include of
<machine/ipl.h>. Unfortunately, <machine/ipl.h> is needed by
almost everything for the inlines.
/usr/src/sys/i386/include/ipl.h:
o New file. Defines spl inlines and SWI macros and declares most
variables related to hard and soft interrupt masks.
/usr/src/sys/i386/isa/icu.h:
o Moved definitions to <machine/ipl.h>
/usr/src/sys/i386/isa/icu.s:
o Software interrupts (SWIs) and delayed hardware interrupts (HWIs)
are now handled uniformally, and dispatching them from splx() is
more like dispatching them from _doreti. The dispatcher is
essentially *(handler[ffs(ipending & ~cpl)]().
o More care (not quite enough) is taken to avoid unbounded nesting
of interrupts.
o The interface to softclock() is changed so that a trap frame is
not required.
o Fast interrupt handlers are now handled more uniformally.
Configuration is still too early (new handlers would require
bits in <machine/ipl.h> and functions to vector.s).
o splnnn() and splx() are no longer here; they are inline functions
(could be macros for other compilers). splz() is the nontrivial
part of the old splx().
/usr/src/sys/i386/isa/ipl.h
o New file. Supposed to have only bus-dependent stuff. Perhaps
the h/w masks should be declared here.
/usr/src/sys/i386/isa/isa.c:
o DON'T APPLY ALL OF THIS DIFF. You need only things involving
*mask and *MASK and comments about them. netmask is now a pure
software mask. It works like the softclock mask.
/usr/src/sys/i386/isa/vector.s:
o Reorganize AUTO_EOI* macros.
o Option FAST_INTR_HANDLER_USERS_ES for people who don't trust
fastintr handlers.
o fastintr handlers need to metamorphose into ordinary interrupt
handlers if their SWI bit has become set. Previously, sio had
unintended latency for handling output completions and input
of SLIP framing characters because this was not done.
/usr/src/sys/net/netisr.h:
o The machine-dependent stuff is now imported from <machine/ipl.h>.
/usr/src/sys/sys/systm.h
o DON'T APPLY ALL OF THIS DIFF. You need mainly the different
splx() prototype. The spl*() prototypes are duplicated as
inlines in <machine/ipl.h> but they need to be duplicated here
in case there are no inlines. I sent systm.h and cpufunc.h
to Garrett. We agree that spl0 should be replaced by splnone
and not the other way around like I've done.
/usr/src/sys/kern/kern_clock.c
o splsoftclock() now lowers cpl so the direct call to softclock()
works as intended.
o softclock() interface changed to avoid passing the whole frame
(some machines may need another change for profile_tick()).
o profiling renamed _profiling to avoid ANSI namespace pollution.
(I had to improve the mcount() interface and may as well fix it.)
The GUPROF variant doesn't actually reference profiling here,
but the 'U' in GUPROF should mean to select the microtimer
mcount() and not change the interface.
1994-04-02 07:00:53 +00:00
|
|
|
(icu2_mask & ~(npx0_imask >> 8))
|
|
|
|
| (old_icu2_mask & (npx0_imask >> 8)));
|
1993-06-12 14:58:17 +00:00
|
|
|
idt[npx_intrno] = save_idt_npxintr;
|
2000-09-07 01:33:02 +00:00
|
|
|
restore_intr(intrstate); /* back to previous state */
|
1997-07-21 07:57:50 +00:00
|
|
|
|
|
|
|
#endif /* SMP */
|
1993-06-12 14:58:17 +00:00
|
|
|
}
|
|
|
|
|
1998-02-12 21:41:10 +00:00
|
|
|
#ifdef I586_CPU
|
|
|
|
static long
|
|
|
|
timezero(funcname, func)
|
|
|
|
const char *funcname;
|
|
|
|
void (*func) __P((void *buf, size_t len));
|
|
|
|
|
|
|
|
{
|
|
|
|
void *buf;
|
|
|
|
#define BUFSIZE 1000000
|
|
|
|
long usec;
|
|
|
|
struct timeval finish, start;
|
|
|
|
|
|
|
|
buf = malloc(BUFSIZE, M_TEMP, M_NOWAIT);
|
|
|
|
if (buf == NULL)
|
|
|
|
return (BUFSIZE);
|
|
|
|
microtime(&start);
|
|
|
|
(*func)(buf, BUFSIZE);
|
|
|
|
microtime(&finish);
|
|
|
|
usec = 1000000 * (finish.tv_sec - start.tv_sec) +
|
|
|
|
finish.tv_usec - start.tv_usec;
|
|
|
|
if (usec <= 0)
|
|
|
|
usec = 1;
|
|
|
|
if (bootverbose)
|
|
|
|
printf("%s bandwidth = %ld bytes/sec\n",
|
1998-04-19 15:39:26 +00:00
|
|
|
funcname, (long)(BUFSIZE * (int64_t)1000000 / usec));
|
1998-02-12 21:41:10 +00:00
|
|
|
free(buf, M_TEMP);
|
|
|
|
return (usec);
|
|
|
|
}
|
|
|
|
#endif /* I586_CPU */
|
|
|
|
|
1999-04-16 21:22:55 +00:00
|
|
|
static device_method_t npx_methods[] = {
|
|
|
|
/* Device interface */
|
1999-08-22 19:52:51 +00:00
|
|
|
DEVMETHOD(device_identify, npx_identify),
|
1999-04-16 21:22:55 +00:00
|
|
|
DEVMETHOD(device_probe, npx_probe),
|
|
|
|
DEVMETHOD(device_attach, npx_attach),
|
|
|
|
DEVMETHOD(device_detach, bus_generic_detach),
|
|
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
|
|
DEVMETHOD(device_resume, bus_generic_resume),
|
|
|
|
|
|
|
|
{ 0, 0 }
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t npx_driver = {
|
|
|
|
"npx",
|
|
|
|
npx_methods,
|
|
|
|
1, /* no softc */
|
|
|
|
};
|
|
|
|
|
|
|
|
static devclass_t npx_devclass;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We prefer to attach to the root nexus so that the usual case (exception 16)
|
|
|
|
* doesn't describe the processor as being `on isa'.
|
|
|
|
*/
|
|
|
|
DRIVER_MODULE(npx, nexus, npx_driver, npx_devclass, 0, 0);
|
2000-05-04 23:57:32 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* This sucks up the legacy ISA support assignments from PNPBIOS.
|
|
|
|
*/
|
|
|
|
static struct isa_pnp_id npxisa_ids[] = {
|
|
|
|
{ 0x040cd041, "Legacy ISA coprocessor support" }, /* PNP0C04 */
|
|
|
|
{ 0 }
|
|
|
|
};
|
|
|
|
|
|
|
|
static int
|
|
|
|
npxisa_probe(device_t dev)
|
|
|
|
{
|
2000-06-23 08:19:50 +00:00
|
|
|
int result;
|
|
|
|
if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, npxisa_ids)) <= 0) {
|
|
|
|
device_quiet(dev);
|
|
|
|
}
|
|
|
|
return(result);
|
2000-05-04 23:57:32 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
npxisa_attach(device_t dev)
|
|
|
|
{
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static device_method_t npxisa_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, npxisa_probe),
|
|
|
|
DEVMETHOD(device_attach, npxisa_attach),
|
|
|
|
DEVMETHOD(device_detach, bus_generic_detach),
|
|
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
|
|
DEVMETHOD(device_resume, bus_generic_resume),
|
|
|
|
|
|
|
|
{ 0, 0 }
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t npxisa_driver = {
|
|
|
|
"npxisa",
|
|
|
|
npxisa_methods,
|
|
|
|
1, /* no softc */
|
|
|
|
};
|
|
|
|
|
|
|
|
static devclass_t npxisa_devclass;
|
|
|
|
|
|
|
|
DRIVER_MODULE(npxisa, isa, npxisa_driver, npxisa_devclass, 0, 0);
|
|
|
|
|