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freebsd-skq/sys/amd64/isa/npx.c

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Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*-
* Copyright (c) 1990 William Jolitz.
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
ALL: Removed patch kit headers and rcsid strings, add $Id$. isa.c: Removed old #ifdef notyet isa_configure code, since it will never be used, and I have done 90% of what it attempted to. Add conflict checking code that searchs back through the devtab's looking for any device that has already been found that may conflict with what we are about to probe. Checks are mode for I/O address, memory address, IRQ, and DRQ. This should stop the screwing up of any device that has alread been found by other device probes. Print out messages when we are not going to probe a device due to a conflict so the user knows WHY something was not found. For example: aha0 not probed due to irq conflict with ahb0 at 11 Now print out a message when a device is not found so the user knows that it was probed for, but could not be found. For example: ed1 not found at 0x320 For devices that have I/O address < 0x100 say that they are on the motherboard, not on isa! The 0x100 magic number is per ISA spec. It may seem funny that pc0 and sc0 report as being on the motherboard, but this is due to the fact that the I/O address used is that of the keyboard controller which IS on the motherboard. We really need to split the keyboard probe from the display probe. It is completly legal to build a pc with out one or the other, or even with out both! npx.c: Return -1 from the probe routine if we are using the Emulator so that the i/o addresses are not printed, this is the same trick used for 486's. Do not print the ``Errors reported via Exception 16'', and ``Errors reported via IRQ 13'' messages any more, since these just lead to more user confusion that anything. It still prints the message ``Error reporting broken, using 387 emulator'' so that the person is aware that there mother board is ill.
1993-10-13 15:59:30 +00:00
* from: @(#)npx.c 7.2 (Berkeley) 5/12/91
$Id$ -> $FreeBSD$
1999-08-28 01:08:13 +00:00
* $FreeBSD$
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
Make the debug options new-style. This also zaps a DPT option from lint; it wasn't referenced from anywhere.
1998-01-31 07:23:16 +00:00
#include "opt_debug_npx.h"
Don't include <isa/isavar.h> or compile code depending on it when isa is not configured. Including <isa/isavar.h> when it is not used is harmful as well as bogus, since it includes "isa_if.h" which is not generated when isa is not configured. This was fixed in 1999 but was broken by unconditionalizing PNPBIOS.
2002-01-30 12:41:12 +00:00
#include "opt_isa.h"
convert the math emulation to use the new-style options.
1996-01-04 19:51:50 +00:00
Change all #includes to follow the current Berkeley style. Some of these ``changes'' are actually not changes at all, but CVS sometimes has trouble telling the difference. This also includes support for second-directory compiles. This is not quite complete yet, as `config' doesn't yet do the right thing. You can still make it work trivially, however, by doing the following: rm /sys/compile mkdir /usr/obj/sys/compile ln -s M-. /sys/compile cd /sys/i386/conf config MYKERNEL cd ../../compile/MYKERNEL ln -s /sys @ rm machine ln -s @/i386/include machine make depend make
1994-08-13 03:50:34 +00:00
#include <sys/param.h>
#include <sys/systm.h>
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
#include <sys/bus.h>
Sorry, the last commit screwed up for me, this is the right one (I hope!) Please refer to the previous commit message about sysctl variables.
1995-10-28 13:07:28 +00:00
#include <sys/kernel.h>
Undo part of the tangle of having sys/lock.h and sys/mutex.h included in other "system" header files. Also help the deprecation of lockmgr.h by making it a sub-include of sys/lock.h and removing sys/lockmgr.h form kernel .c files. Sort sys/*.h includes where possible in affected files. OK'ed by: bde (with reservations)
2001-05-01 08:13:21 +00:00
#include <sys/lock.h>
Only use the i586-optimized copying and zeroing functions if they are actually faster (more than 20% faster for zeroing 1 MB at boot time). This fixes pessimized copying and zeroing on K6's and perhaps on other CPUs that are misclassified as i586's.
1998-02-12 21:41:10 +00:00
#include <sys/malloc.h>
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
#include <sys/module.h>
- Make npx_intr INTR_MPSAFE and move acquiring Giant into the function itself. - Remove a hack to allow acquiring Giant from the npx asm trap vector.
2001-01-20 02:30:58 +00:00
#include <sys/mutex.h>
Undo part of the tangle of having sys/lock.h and sys/mutex.h included in other "system" header files. Also help the deprecation of lockmgr.h by making it a sub-include of sys/lock.h and removing sys/lockmgr.h form kernel .c files. Sort sys/*.h includes where possible in affected files. OK'ed by: bde (with reservations)
2001-05-01 08:13:21 +00:00
#include <sys/mutex.h>
#include <sys/proc.h>
#include <sys/sysctl.h>
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
#include <machine/bus.h>
#include <sys/rman.h>
Disabled logging of masked exceptions on exit. Keep the side effect of saving the state (see rev.1.17).
1997-01-29 13:46:28 +00:00
#ifdef NPX_DEBUG
Log processes that exit with an masked npx exception that would trap with the current default exception (un)mask. There should be no such processes unless you change the mask. Someday the mask should be changed to the IEEE default of everything masked. The npx state gets saved so that it can be checked and this may have the side effect of fixing a bug that was reported for 1.1.5. (npx exceptions may sometimes leak across exits and clobber another process. I can't see how this can happen.) Get some missing/wrong declarations from headers now that the headers have them.
1994-11-14 14:59:06 +00:00
#include <sys/syslog.h>
Disabled logging of masked exceptions on exit. Keep the side effect of saving the state (see rev.1.17).
1997-01-29 13:46:28 +00:00
#endif
Log processes that exit with an masked npx exception that would trap with the current default exception (un)mask. There should be no such processes unless you change the mask. Someday the mask should be changed to the IEEE default of everything masked. The npx state gets saved so that it can be checked and this may have the side effect of fixing a bug that was reported for 1.1.5. (npx exceptions may sometimes leak across exits and clobber another process. I can't see how this can happen.) Get some missing/wrong declarations from headers now that the headers have them.
1994-11-14 14:59:06 +00:00
#include <sys/signalvar.h>
Throw away the complications in npxsave() and their infrastructure. npxsave() went to great lengths to excecute fnsave with interrupts enabled in case executing it froze the CPU. This case can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply spurious freezes. Anyway, the complications were usually no-ops because IRQ13 is not used on i486's and newer CPUs, and because SMPng broke them in rev.1.84. Forcible enabling of interrupts was changed to write_eflags(old_eflags), but since SMPng usually calls npxsave() from cpu_switch() with interrupts disabled, write_eflags() usually just kept interrupts disabled.
2001-05-20 20:04:40 +00:00
#include <sys/user.h>
Finished device configuration database work for all ISA devices (except `ze') and all SCSI devices (except that it's not done quite the way I want). New information added includes: - A text description of the device - A ``state''---unknown, unconfigured, idle, or busy - A generic parent device (with support in the m.i. code) - An interrupt mask type field (which will hopefully go away) so that . ``doconfig'' can be written This requires a new version of the `lsdev' program as well (next commit).
1994-10-23 21:28:03 +00:00
Don't include <machine/cputypes.h> or declare cputype/class interfaces in <machine/cpu.h>. Moved the declarations to <machine/cputypes.h>. Fixed style bugs in the moved code. Fixed everything that depended on the nested include. Don't include <machine/cpu.h> (in the changed files) unless something in it is used directly.
1997-10-28 11:43:57 +00:00
#include <machine/cputypes.h>
#include <machine/frame.h>
Added #include of <machine/md_var.h>. This will be needed when some declarations are moved from <machine/cpufunc.h> to better places.
1996-06-25 20:31:01 +00:00
#include <machine/md_var.h>
Include file updates.. <machine/spl.h> -> <machine/ipl.h>, add <machine/ipl.h> to those files that were depending on getting SWI_* implicitly via <machine/cpufunc.h>
1997-05-31 09:27:31 +00:00
#include <machine/pcb.h>
Don't include <machine/cputypes.h> or declare cputype/class interfaces in <machine/cpu.h>. Moved the declarations to <machine/cputypes.h>. Fixed style bugs in the moved code. Fixed everything that depended on the nested include. Don't include <machine/cpu.h> (in the changed files) unless something in it is used directly.
1997-10-28 11:43:57 +00:00
#include <machine/psl.h>
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
#include <machine/resource.h>
Change all #includes to follow the current Berkeley style. Some of these ``changes'' are actually not changes at all, but CVS sometimes has trouble telling the difference. This also includes support for second-directory compiles. This is not quite complete yet, as `config' doesn't yet do the right thing. You can still make it work trivially, however, by doing the following: rm /sys/compile mkdir /usr/obj/sys/compile ln -s M-. /sys/compile cd /sys/i386/conf config MYKERNEL cd ../../compile/MYKERNEL ln -s /sys @ rm machine ln -s @/i386/include machine make depend make
1994-08-13 03:50:34 +00:00
#include <machine/specialreg.h>
Don't include <machine/cputypes.h> or declare cputype/class interfaces in <machine/cpu.h>. Moved the declarations to <machine/cputypes.h>. Fixed style bugs in the moved code. Fixed everything that depended on the nested include. Don't include <machine/cpu.h> (in the changed files) unless something in it is used directly.
1997-10-28 11:43:57 +00:00
#include <machine/segments.h>
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
#include <machine/ucontext.h>
Finished device configuration database work for all ISA devices (except `ze') and all SCSI devices (except that it's not done quite the way I want). New information added includes: - A text description of the device - A ``state''---unknown, unconfigured, idle, or busy - A generic parent device (with support in the m.i. code) - An interrupt mask type field (which will hopefully go away) so that . ``doconfig'' can be written This requires a new version of the `lsdev' program as well (next commit).
1994-10-23 21:28:03 +00:00
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
#include <amd64/isa/intr_machdep.h>
Don't include <isa/isavar.h> or compile code depending on it when isa is not configured. Including <isa/isavar.h> when it is not used is harmful as well as bogus, since it includes "isa_if.h" which is not generated when isa is not configured. This was fixed in 1999 but was broken by unconditionalizing PNPBIOS.
2002-01-30 12:41:12 +00:00
#ifdef DEV_ISA
Add a little do-nothing ``slopsucker'' device which gives a home to PNP0c04 (legacy ISA coprocessor support). Tourist info.
2000-05-04 23:57:32 +00:00
#include <isa/isavar.h>
Don't include <isa/isavar.h> or compile code depending on it when isa is not configured. Including <isa/isavar.h> when it is not used is harmful as well as bogus, since it includes "isa_if.h" which is not generated when isa is not configured. This was fixed in 1999 but was broken by unconditionalizing PNPBIOS.
2002-01-30 12:41:12 +00:00
#endif
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
* 387 and 287 Numeric Coprocessor Extension (NPX) Driver.
*/
Hide inline assembly if lint is defined.
2002-10-20 17:30:30 +00:00
#if defined(__GNUC__) && !defined(lint)
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
#define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr)))
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
#define fnclex() __asm("fnclex")
#define fninit() __asm("fninit")
Finish supporting compiling with `gcc -ansi'. Fix missing `volatile's in __asm() statements while I'm here.
1998-04-15 18:58:09 +00:00
#define fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr)))
#define fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr)))
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
#define fxrstor(addr) __asm("fxrstor %0" : : "m" (*(addr)))
#define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \
: : "n" (CR0_TS) : "ax")
#define stop_emulating() __asm("clts")
#else /* not __GNUC__ */
Fixed some style bugs in the removal of __P(()). The main ones were not removing tabs before "__P((", and not outdenting continuation lines to preserve non-KNF lining up of code with parentheses. Switch to KNF formatting and/or rewrap the whole prototype in some cases.
2002-03-23 16:01:49 +00:00
void fldcw(caddr_t addr);
void fnclex(void);
void fninit(void);
void fnstcw(caddr_t addr);
void fnstsw(caddr_t addr);
void fxsave(caddr_t addr);
void fxrstor(caddr_t addr);
void start_emulating(void);
void stop_emulating(void);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
#endif /* __GNUC__ */
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
#define GET_FPU_CW(thread) ((thread)->td_pcb->pcb_save.sv_env.en_cw)
#define GET_FPU_SW(thread) ((thread)->td_pcb->pcb_save.sv_env.en_sw)
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
typedef u_char bool_t;
Fixed some style bugs in the removal of __P(()). The main ones were not removing tabs before "__P((", and not outdenting continuation lines to preserve non-KNF lining up of code with parentheses. Switch to KNF formatting and/or rewrap the whole prototype in some cases.
2002-03-23 16:01:49 +00:00
static int npx_attach(device_t dev);
static void npx_identify(driver_t *driver, device_t parent);
static int npx_probe(device_t dev);
Sorry, the last commit screwed up for me, this is the right one (I hope!) Please refer to the previous commit message about sysctl variables.
1995-10-28 13:07:28 +00:00
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
int hw_float = 1;
Sorry, the last commit screwed up for me, this is the right one (I hope!) Please refer to the previous commit message about sysctl variables.
1995-10-28 13:07:28 +00:00
SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint,
CTLFLAG_RD, &hw_float, 0,
"Floatingpoint instructions executed in hardware");
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
static struct savefpu npx_cleanstate;
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
static bool_t npx_cleanstate_ready;
Made the SMP case ignore the possibility of an INT13 interface. This eliminates all the APIC code, and thus several routines that would otherwise need to be made MP-safe. Reviewed by: Bruce Evans <bde@zeta.org.au>
1997-07-21 07:57:50 +00:00
Add an identify method to allow npx to arrange itself to be attached to the nexus without explicit code in the nexus to do so.
1999-08-22 19:52:51 +00:00
/*
* Identify routine. Create a connection point on our parent for probing.
*/
static void
npx_identify(driver, parent)
driver_t *driver;
device_t parent;
{
device_t child;
child = BUS_ADD_CHILD(parent, 0, "npx", 0);
if (child == NULL)
panic("npx_identify");
}
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
* Probe routine. Initialize cr0 to give correct behaviour for [f]wait
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
* whether the device exists or not (XXX should be elsewhere).
* Modify device struct if npx doesn't need to use interrupts.
* Return 0 if device exists.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
static int
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
npx_probe(dev)
device_t dev;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
* Partially reset the coprocessor, if any. Some BIOS's don't reset
* it after a warm boot.
*/
outb(0xf1, 0); /* full reset on some systems, NOP on others */
outb(0xf0, 0); /* clear BUSY# latch */
/*
* Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
* instructions. We must set the CR0_MP bit and use the CR0_TS
* bit to control the trap, because setting the CR0_EM bit does
* not cause WAIT instructions to trap. It's important to trap
* WAIT instructions - otherwise the "wait" variants of no-wait
* control instructions would degenerate to the "no-wait" variants
* after FP context switches but work correctly otherwise. It's
* particularly important to trap WAITs when there is no NPX -
* otherwise the "wait" variants would always degenerate.
*
* Try setting CR0_NE to get correct error reporting on 486DX's.
* Setting it should fail or do nothing on lesser processors.
*/
load_cr0(rcr0() | CR0_MP | CR0_NE);
/*
* But don't trap while we're probing.
*/
stop_emulating();
/*
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
* Finish resetting the coprocessor.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
fninit();
Made the SMP case ignore the possibility of an INT13 interface. This eliminates all the APIC code, and thus several routines that would otherwise need to be made MP-safe. Reviewed by: Bruce Evans <bde@zeta.org.au>
1997-07-21 07:57:50 +00:00
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
device_set_desc(dev, "math processor");
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
return (0);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
/*
* Attach routine - announce which it is, and wire into system
*/
Be consistent about "static" functions: if the function is marked static in its prototype, mark it static at the definition too. Inspired by: FlexeLint warning #512
2002-09-28 17:15:38 +00:00
static int
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
npx_attach(dev)
device_t dev;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
register_t s;
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
device_printf(dev, "INT 16 interface\n");
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
npxinit(__INITIAL_NPXCW__);
Replaced I586_OPTIMIZED_BCOPY and I586_OPTIMIZED_BZERO with boot-time negative-logic flags (flags 0x01 and 0x02 for npx0, defaulting to unset = on). This changes the default from off to on. The options have been in current for several months with no problems reported. Added a boot-time negative-logic flag for the old I5886_FAST_BCOPY option which went away too soon (flag 0x04 for npx0, defaulting to unset = on). Added a boot-time way to set the memory size (iosiz in config, iosize in userconfig for npx0). LINT: Removed old options. Documented npx0's flags and iosiz. options.i386: Removed old options. identcpu.c: Don't set the function pointers here. Setting them has to be delayed until after userconfig has had a chance to disable them and until after a good npx0 has been detected. machdep.c: Use npx0's iosize instead of MAXMEM if it is nonzero. support.s: Added vectors and glue code for copyin() and copyout(). Fixed ifdefs for i586_bzero(). Added ifdefs for i586_bcopy(). npx.c: Set the function pointers here. Clear hw_float when an npx exists but is too broken to use. Restored style from a year or three ago in npxattach().
1996-11-11 20:39:03 +00:00
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
if (npx_cleanstate_ready == 0) {
s = intr_disable();
stop_emulating();
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
fxsave(&npx_cleanstate);
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
start_emulating();
npx_cleanstate_ready = 1;
intr_restore(s);
}
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
return (0); /* XXX unused */
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
/*
* Initialize floating point unit.
*/
void
npxinit(control)
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
u_short control;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
static struct savefpu dummy;
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
register_t savecrit;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
* fninit has the same h/w bugs as fnsave. Use the detoxified
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
* fnsave to throw away any junk in the fpu. npxsave() initializes
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* the fpu and sets fpcurthread = NULL as important side effects.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
savecrit = intr_disable();
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
npxsave(&dummy);
stop_emulating();
Explicitly initialize the fpu when SSE is enabled since this no longer happens as a side effect of calling npxsave. Reviewed by: peter, bde
2001-10-15 20:18:06 +00:00
/* XXX npxsave() doesn't actually initialize the fpu in the SSE case. */
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
fninit();
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
fldcw(&control);
start_emulating();
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
intr_restore(savecrit);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
/*
* Free coprocessor (if we have it).
*/
void
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
npxexit(td)
struct thread *td;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
#ifdef NPX_DEBUG
u_int masked_exceptions;
#endif
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
register_t savecrit;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
savecrit = intr_disable();
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
if (curthread == PCPU_GET(fpcurthread))
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
npxsave(&PCPU_GET(curpcb)->pcb_save);
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
intr_restore(savecrit);
Disabled logging of masked exceptions on exit. Keep the side effect of saving the state (see rev.1.17).
1997-01-29 13:46:28 +00:00
#ifdef NPX_DEBUG
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
masked_exceptions = GET_FPU_CW(td) & GET_FPU_SW(td) & 0x7f;
/*
* Log exceptions that would have trapped with the old
* control word (overflow, divide by 0, and invalid operand).
*/
if (masked_exceptions & 0x0d)
log(LOG_ERR,
"pid %d (%s) exited with masked floating point exceptions 0x%02x\n",
td->td_proc->p_pid, td->td_proc->p_comm,
masked_exceptions);
Disabled logging of masked exceptions on exit. Keep the side effect of saving the state (see rev.1.17).
1997-01-29 13:46:28 +00:00
#endif
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
int
npxformat()
{
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
return (_MC_FPFMT_XMM);
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
}
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
/*
* The following mechanism is used to ensure that the FPE_... value
* that is passed as a trapcode to the signal handler of the user
* process does not have more than one bit set.
*
* Multiple bits may be set if the user process modifies the control
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* word while a status word bit is already set. While this is a sign
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* of bad coding, we have no choise than to narrow them down to one
* bit, since we must not send a trapcode that is not exactly one of
* the FPE_ macros.
*
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* The mechanism has a static table with 127 entries. Each combination
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* of the 7 FPU status word exception bits directly translates to a
* position in this table, where a single FPE_... value is stored.
* This FPE_... value stored there is considered the "most important"
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* of the exception bits and will be sent as the signal code. The
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* precedence of the bits is based upon Intel Document "Numerical
* Applications", Chapter "Special Computational Situations".
*
* The macro to choose one of these values does these steps: 1) Throw
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* away status word bits that cannot be masked. 2) Throw away the bits
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* currently masked in the control word, assuming the user isn't
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* interested in them anymore. 3) Reinsert status word bit 7 (stack
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* fault) if it is set, which cannot be masked but must be presered.
* 4) Use the remaining bits to point into the trapcode table.
*
* The 6 maskable bits in order of their preference, as stated in the
* above referenced Intel manual:
* 1 Invalid operation (FP_X_INV)
* 1a Stack underflow
* 1b Stack overflow
* 1c Operand of unsupported format
* 1d SNaN operand.
* 2 QNaN operand (not an exception, irrelavant here)
* 3 Any other invalid-operation not mentioned above or zero divide
* (FP_X_INV, FP_X_DZ)
* 4 Denormal operand (FP_X_DNML)
* 5 Numeric over/underflow (FP_X_OFL, FP_X_UFL)
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* 6 Inexact result (FP_X_IMP)
*/
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
static char fpetable[128] = {
0,
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
FPE_FLTINV, /* 1 - INV */
FPE_FLTUND, /* 2 - DNML */
FPE_FLTINV, /* 3 - INV | DNML */
FPE_FLTDIV, /* 4 - DZ */
FPE_FLTINV, /* 5 - INV | DZ */
FPE_FLTDIV, /* 6 - DNML | DZ */
FPE_FLTINV, /* 7 - INV | DNML | DZ */
FPE_FLTOVF, /* 8 - OFL */
FPE_FLTINV, /* 9 - INV | OFL */
FPE_FLTUND, /* A - DNML | OFL */
FPE_FLTINV, /* B - INV | DNML | OFL */
FPE_FLTDIV, /* C - DZ | OFL */
FPE_FLTINV, /* D - INV | DZ | OFL */
FPE_FLTDIV, /* E - DNML | DZ | OFL */
FPE_FLTINV, /* F - INV | DNML | DZ | OFL */
FPE_FLTUND, /* 10 - UFL */
FPE_FLTINV, /* 11 - INV | UFL */
FPE_FLTUND, /* 12 - DNML | UFL */
FPE_FLTINV, /* 13 - INV | DNML | UFL */
FPE_FLTDIV, /* 14 - DZ | UFL */
FPE_FLTINV, /* 15 - INV | DZ | UFL */
FPE_FLTDIV, /* 16 - DNML | DZ | UFL */
FPE_FLTINV, /* 17 - INV | DNML | DZ | UFL */
FPE_FLTOVF, /* 18 - OFL | UFL */
FPE_FLTINV, /* 19 - INV | OFL | UFL */
FPE_FLTUND, /* 1A - DNML | OFL | UFL */
FPE_FLTINV, /* 1B - INV | DNML | OFL | UFL */
FPE_FLTDIV, /* 1C - DZ | OFL | UFL */
FPE_FLTINV, /* 1D - INV | DZ | OFL | UFL */
FPE_FLTDIV, /* 1E - DNML | DZ | OFL | UFL */
FPE_FLTINV, /* 1F - INV | DNML | DZ | OFL | UFL */
FPE_FLTRES, /* 20 - IMP */
FPE_FLTINV, /* 21 - INV | IMP */
FPE_FLTUND, /* 22 - DNML | IMP */
FPE_FLTINV, /* 23 - INV | DNML | IMP */
FPE_FLTDIV, /* 24 - DZ | IMP */
FPE_FLTINV, /* 25 - INV | DZ | IMP */
FPE_FLTDIV, /* 26 - DNML | DZ | IMP */
FPE_FLTINV, /* 27 - INV | DNML | DZ | IMP */
FPE_FLTOVF, /* 28 - OFL | IMP */
FPE_FLTINV, /* 29 - INV | OFL | IMP */
FPE_FLTUND, /* 2A - DNML | OFL | IMP */
FPE_FLTINV, /* 2B - INV | DNML | OFL | IMP */
FPE_FLTDIV, /* 2C - DZ | OFL | IMP */
FPE_FLTINV, /* 2D - INV | DZ | OFL | IMP */
FPE_FLTDIV, /* 2E - DNML | DZ | OFL | IMP */
FPE_FLTINV, /* 2F - INV | DNML | DZ | OFL | IMP */
FPE_FLTUND, /* 30 - UFL | IMP */
FPE_FLTINV, /* 31 - INV | UFL | IMP */
FPE_FLTUND, /* 32 - DNML | UFL | IMP */
FPE_FLTINV, /* 33 - INV | DNML | UFL | IMP */
FPE_FLTDIV, /* 34 - DZ | UFL | IMP */
FPE_FLTINV, /* 35 - INV | DZ | UFL | IMP */
FPE_FLTDIV, /* 36 - DNML | DZ | UFL | IMP */
FPE_FLTINV, /* 37 - INV | DNML | DZ | UFL | IMP */
FPE_FLTOVF, /* 38 - OFL | UFL | IMP */
FPE_FLTINV, /* 39 - INV | OFL | UFL | IMP */
FPE_FLTUND, /* 3A - DNML | OFL | UFL | IMP */
FPE_FLTINV, /* 3B - INV | DNML | OFL | UFL | IMP */
FPE_FLTDIV, /* 3C - DZ | OFL | UFL | IMP */
FPE_FLTINV, /* 3D - INV | DZ | OFL | UFL | IMP */
FPE_FLTDIV, /* 3E - DNML | DZ | OFL | UFL | IMP */
FPE_FLTINV, /* 3F - INV | DNML | DZ | OFL | UFL | IMP */
FPE_FLTSUB, /* 40 - STK */
FPE_FLTSUB, /* 41 - INV | STK */
FPE_FLTUND, /* 42 - DNML | STK */
FPE_FLTSUB, /* 43 - INV | DNML | STK */
FPE_FLTDIV, /* 44 - DZ | STK */
FPE_FLTSUB, /* 45 - INV | DZ | STK */
FPE_FLTDIV, /* 46 - DNML | DZ | STK */
FPE_FLTSUB, /* 47 - INV | DNML | DZ | STK */
FPE_FLTOVF, /* 48 - OFL | STK */
FPE_FLTSUB, /* 49 - INV | OFL | STK */
FPE_FLTUND, /* 4A - DNML | OFL | STK */
FPE_FLTSUB, /* 4B - INV | DNML | OFL | STK */
FPE_FLTDIV, /* 4C - DZ | OFL | STK */
FPE_FLTSUB, /* 4D - INV | DZ | OFL | STK */
FPE_FLTDIV, /* 4E - DNML | DZ | OFL | STK */
FPE_FLTSUB, /* 4F - INV | DNML | DZ | OFL | STK */
FPE_FLTUND, /* 50 - UFL | STK */
FPE_FLTSUB, /* 51 - INV | UFL | STK */
FPE_FLTUND, /* 52 - DNML | UFL | STK */
FPE_FLTSUB, /* 53 - INV | DNML | UFL | STK */
FPE_FLTDIV, /* 54 - DZ | UFL | STK */
FPE_FLTSUB, /* 55 - INV | DZ | UFL | STK */
FPE_FLTDIV, /* 56 - DNML | DZ | UFL | STK */
FPE_FLTSUB, /* 57 - INV | DNML | DZ | UFL | STK */
FPE_FLTOVF, /* 58 - OFL | UFL | STK */
FPE_FLTSUB, /* 59 - INV | OFL | UFL | STK */
FPE_FLTUND, /* 5A - DNML | OFL | UFL | STK */
FPE_FLTSUB, /* 5B - INV | DNML | OFL | UFL | STK */
FPE_FLTDIV, /* 5C - DZ | OFL | UFL | STK */
FPE_FLTSUB, /* 5D - INV | DZ | OFL | UFL | STK */
FPE_FLTDIV, /* 5E - DNML | DZ | OFL | UFL | STK */
FPE_FLTSUB, /* 5F - INV | DNML | DZ | OFL | UFL | STK */
FPE_FLTRES, /* 60 - IMP | STK */
FPE_FLTSUB, /* 61 - INV | IMP | STK */
FPE_FLTUND, /* 62 - DNML | IMP | STK */
FPE_FLTSUB, /* 63 - INV | DNML | IMP | STK */
FPE_FLTDIV, /* 64 - DZ | IMP | STK */
FPE_FLTSUB, /* 65 - INV | DZ | IMP | STK */
FPE_FLTDIV, /* 66 - DNML | DZ | IMP | STK */
FPE_FLTSUB, /* 67 - INV | DNML | DZ | IMP | STK */
FPE_FLTOVF, /* 68 - OFL | IMP | STK */
FPE_FLTSUB, /* 69 - INV | OFL | IMP | STK */
FPE_FLTUND, /* 6A - DNML | OFL | IMP | STK */
FPE_FLTSUB, /* 6B - INV | DNML | OFL | IMP | STK */
FPE_FLTDIV, /* 6C - DZ | OFL | IMP | STK */
FPE_FLTSUB, /* 6D - INV | DZ | OFL | IMP | STK */
FPE_FLTDIV, /* 6E - DNML | DZ | OFL | IMP | STK */
FPE_FLTSUB, /* 6F - INV | DNML | DZ | OFL | IMP | STK */
FPE_FLTUND, /* 70 - UFL | IMP | STK */
FPE_FLTSUB, /* 71 - INV | UFL | IMP | STK */
FPE_FLTUND, /* 72 - DNML | UFL | IMP | STK */
FPE_FLTSUB, /* 73 - INV | DNML | UFL | IMP | STK */
FPE_FLTDIV, /* 74 - DZ | UFL | IMP | STK */
FPE_FLTSUB, /* 75 - INV | DZ | UFL | IMP | STK */
FPE_FLTDIV, /* 76 - DNML | DZ | UFL | IMP | STK */
FPE_FLTSUB, /* 77 - INV | DNML | DZ | UFL | IMP | STK */
FPE_FLTOVF, /* 78 - OFL | UFL | IMP | STK */
FPE_FLTSUB, /* 79 - INV | OFL | UFL | IMP | STK */
FPE_FLTUND, /* 7A - DNML | OFL | UFL | IMP | STK */
FPE_FLTSUB, /* 7B - INV | DNML | OFL | UFL | IMP | STK */
FPE_FLTDIV, /* 7C - DZ | OFL | UFL | IMP | STK */
FPE_FLTSUB, /* 7D - INV | DZ | OFL | UFL | IMP | STK */
FPE_FLTDIV, /* 7E - DNML | DZ | OFL | UFL | IMP | STK */
FPE_FLTSUB, /* 7F - INV | DNML | DZ | OFL | UFL | IMP | STK */
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
};
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
* Preserve the FP status word, clear FP exceptions, then generate a SIGFPE.
*
* Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now
* depend on longjmp() restoring a usable state. Restoring the state
* or examining it might fail if we didn't clear exceptions.
*
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* The error code chosen will be one of the FPE_... macros. It will be
* sent as the second argument to old BSD-style signal handlers and as
* "siginfo_t->si_code" (second argument) to SA_SIGINFO signal handlers.
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
*
* XXX the FP state is not preserved across signal handlers. So signal
* handlers cannot afford to do FP unless they preserve the state or
* longjmp() out. Both preserving the state and longjmp()ing may be
* destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable
* solution for signals other than SIGFPE.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
int
npxtrap()
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
register_t savecrit;
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
u_short control, status;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
savecrit = intr_disable();
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
* Interrupt handling (for another interrupt) may have pushed the
* state to memory. Fetch the relevant parts of the state from
* wherever they are.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
if (PCPU_GET(fpcurthread) != curthread) {
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
control = GET_FPU_CW(curthread);
status = GET_FPU_SW(curthread);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
} else {
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
fnstcw(&control);
fnstsw(&status);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
if (PCPU_GET(fpcurthread) == curthread)
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
fnclex();
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
intr_restore(savecrit);
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
return (fpetable[status & ((~control & 0x3f) | 0x40)]);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
/*
* Implement device not available (DNA) exception
*
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* It would be better to switch FP context here (if curthread != fpcurthread)
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
* and not necessarily for every context switch, but it is too hard to
* access foreign pcb's.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
static int err_count = 0;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
int
npxdna()
{
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
struct pcb *pcb;
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
register_t s;
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
u_short control;
Implement preemptive scheduling of hardware interrupt threads. - If possible, context switch to the thread directly in sched_ithd(), rather than triggering a delayed ast reschedule. - Disable interrupts while restoring fpu state in the trap handler, in order to ensure that we are not preempted in the middle, which could cause migration to another cpu. Reviewed by: peter Tested by: peter (alpha)
2001-02-01 03:34:20 +00:00
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
if (PCPU_GET(fpcurthread) == curthread) {
printf("npxdna: fpcurthread == curthread %d times\n",
++err_count);
stop_emulating();
return (1);
}
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
if (PCPU_GET(fpcurthread) != NULL) {
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
printf("npxdna: fpcurthread = %p (%d), curthread = %p (%d)\n",
PCPU_GET(fpcurthread),
PCPU_GET(fpcurthread)->td_proc->p_pid,
curthread, curthread->td_proc->p_pid);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
panic("npxdna");
}
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
s = intr_disable();
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
stop_emulating();
/*
* Record new context early in case frstor causes an IRQ13.
*/
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
PCPU_SET(fpcurthread, curthread);
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
pcb = PCPU_GET(curpcb);
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
if ((pcb->pcb_flags & PCB_NPXINITDONE) == 0) {
/*
* This is the first time this thread has used the FPU or
* the PCB doesn't contain a clean FPU state. Explicitly
* initialize the FPU and load the default control word.
*/
fninit();
control = __INITIAL_NPXCW__;
fldcw(&control);
pcb->pcb_flags |= PCB_NPXINITDONE;
} else {
/*
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
* The following frstor may cause a trap when the state
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
* being restored has a pending error. The error will
* appear to have been triggered by the current (npx) user
* instruction even when that instruction is a no-wait
* instruction that should not trigger an error (e.g.,
* instructions are broken the same as frstor, so our
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
* treatment does not amplify the breakage.
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
*/
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
fxrstor(&pcb->pcb_save);
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
}
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
intr_restore(s);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
return (1);
}
/*
Throw away the complications in npxsave() and their infrastructure. npxsave() went to great lengths to excecute fnsave with interrupts enabled in case executing it froze the CPU. This case can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply spurious freezes. Anyway, the complications were usually no-ops because IRQ13 is not used on i486's and newer CPUs, and because SMPng broke them in rev.1.84. Forcible enabling of interrupts was changed to write_eflags(old_eflags), but since SMPng usually calls npxsave() from cpu_switch() with interrupts disabled, write_eflags() usually just kept interrupts disabled.
2001-05-20 20:04:40 +00:00
* Wrapper for fnsave instruction, partly to handle hardware bugs. When npx
* exceptions are reported via IRQ13, spurious IRQ13's may be triggered by
* no-wait npx instructions. See the Intel application note AP-578 for
* details. This doesn't cause any additional complications here. IRQ13's
* are inherently asynchronous unless the CPU is frozen to deliver them --
* one that started in userland may be delivered many instructions later,
* after the process has entered the kernel. It may even be delivered after
* the fnsave here completes. A spurious IRQ13 for the fnsave is handled in
* the same way as a very-late-arriving non-spurious IRQ13 from user mode:
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* it is normally ignored at first because we set fpcurthread to NULL; it is
Throw away the complications in npxsave() and their infrastructure. npxsave() went to great lengths to excecute fnsave with interrupts enabled in case executing it froze the CPU. This case can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply spurious freezes. Anyway, the complications were usually no-ops because IRQ13 is not used on i486's and newer CPUs, and because SMPng broke them in rev.1.84. Forcible enabling of interrupts was changed to write_eflags(old_eflags), but since SMPng usually calls npxsave() from cpu_switch() with interrupts disabled, write_eflags() usually just kept interrupts disabled.
2001-05-20 20:04:40 +00:00
* normally retriggered in npxdna() after return to user mode.
*
* npxsave() must be called with interrupts disabled, so that it clears
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* fpcurthread atomically with saving the state. We require callers to do the
Throw away the complications in npxsave() and their infrastructure. npxsave() went to great lengths to excecute fnsave with interrupts enabled in case executing it froze the CPU. This case can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply spurious freezes. Anyway, the complications were usually no-ops because IRQ13 is not used on i486's and newer CPUs, and because SMPng broke them in rev.1.84. Forcible enabling of interrupts was changed to write_eflags(old_eflags), but since SMPng usually calls npxsave() from cpu_switch() with interrupts disabled, write_eflags() usually just kept interrupts disabled.
2001-05-20 20:04:40 +00:00
* disabling, since most callers need to disable interrupts anyway to call
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* npxsave() atomically with checking fpcurthread.
Throw away the complications in npxsave() and their infrastructure. npxsave() went to great lengths to excecute fnsave with interrupts enabled in case executing it froze the CPU. This case can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply spurious freezes. Anyway, the complications were usually no-ops because IRQ13 is not used on i486's and newer CPUs, and because SMPng broke them in rev.1.84. Forcible enabling of interrupts was changed to write_eflags(old_eflags), but since SMPng usually calls npxsave() from cpu_switch() with interrupts disabled, write_eflags() usually just kept interrupts disabled.
2001-05-20 20:04:40 +00:00
*
* A previous version of npxsave() went to great lengths to excecute fnsave
* with interrupts enabled in case executing it froze the CPU. This case
* can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply
* spurious freezes.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
void
npxsave(addr)
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
struct savefpu *addr;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Made the SMP case ignore the possibility of an INT13 interface. This eliminates all the APIC code, and thus several routines that would otherwise need to be made MP-safe. Reviewed by: Bruce Evans <bde@zeta.org.au>
1997-07-21 07:57:50 +00:00
stop_emulating();
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
fxsave(addr);
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
Made the SMP case ignore the possibility of an INT13 interface. This eliminates all the APIC code, and thus several routines that would otherwise need to be made MP-safe. Reviewed by: Bruce Evans <bde@zeta.org.au>
1997-07-21 07:57:50 +00:00
start_emulating();
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
PCPU_SET(fpcurthread, NULL);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
/*
* This should be called with interrupts disabled and only when the owning
* FPU thread is non-null.
*/
void
npxdrop()
{
struct thread *td;
td = PCPU_GET(fpcurthread);
PCPU_SET(fpcurthread, NULL);
td->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
start_emulating();
}
/*
* Get the state of the FPU without dropping ownership (if possible).
* It returns the FPU ownership status.
*/
int
npxgetregs(td, addr)
struct thread *td;
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
struct savefpu *addr;
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
{
register_t s;
if ((td->td_pcb->pcb_flags & PCB_NPXINITDONE) == 0) {
if (npx_cleanstate_ready)
bcopy(&npx_cleanstate, addr, sizeof(npx_cleanstate));
else
bzero(addr, sizeof(*addr));
return (_MC_FPOWNED_NONE);
}
s = intr_disable();
- In npxgetregs() use the td argument to save the fpu state from and not curthread. Nothing currently depends on this behavior. - Clean up an extra newline. Obtained from: bde
2003-04-01 00:16:32 +00:00
if (td == PCPU_GET(fpcurthread)) {
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
fxsave(addr);
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
intr_restore(s);
return (_MC_FPOWNED_FPU);
} else {
intr_restore(s);
bcopy(&td->td_pcb->pcb_save, addr, sizeof(*addr));
return (_MC_FPOWNED_PCB);
}
}
/*
* Set the state of the FPU.
*/
void
npxsetregs(td, addr)
struct thread *td;
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
struct savefpu *addr;
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
{
register_t s;
s = intr_disable();
- In npxsetregs don't set the floating point if td == fpcurthread not if curthread == fpcurthread. This is important when we're saving the fp state for a thread other than curthread as in from set_mcontext.
2003-03-31 00:32:43 +00:00
if (td == PCPU_GET(fpcurthread)) {
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
fxrstor(addr);
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
intr_restore(s);
} else {
intr_restore(s);
bcopy(addr, &td->td_pcb->pcb_save, sizeof(*addr));
}
Finish fixing the 5.x FPU code for dealing with signal handlers. Obtained from: bde
2002-10-25 19:12:16 +00:00
curthread->td_pcb->pcb_flags |= PCB_NPXINITDONE;
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
}
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
static device_method_t npx_methods[] = {
/* Device interface */
Add an identify method to allow npx to arrange itself to be attached to the nexus without explicit code in the nexus to do so.
1999-08-22 19:52:51 +00:00
DEVMETHOD(device_identify, npx_identify),
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
DEVMETHOD(device_probe, npx_probe),
DEVMETHOD(device_attach, npx_attach),
DEVMETHOD(device_detach, bus_generic_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
{ 0, 0 }
};
static driver_t npx_driver = {
"npx",
npx_methods,
1, /* no softc */
};
static devclass_t npx_devclass;
/*
* We prefer to attach to the root nexus so that the usual case (exception 16)
* doesn't describe the processor as being `on isa'.
*/
DRIVER_MODULE(npx, nexus, npx_driver, npx_devclass, 0, 0);
Add a little do-nothing ``slopsucker'' device which gives a home to PNP0c04 (legacy ISA coprocessor support). Tourist info.
2000-05-04 23:57:32 +00:00
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
2003-05-01 01:05:25 +00:00
#ifdef DEV_ISA
Add a little do-nothing ``slopsucker'' device which gives a home to PNP0c04 (legacy ISA coprocessor support). Tourist info.
2000-05-04 23:57:32 +00:00
/*
Add ACPI attachments.
2001-08-30 09:17:03 +00:00
* This sucks up the legacy ISA support assignments from PNPBIOS/ACPI.
Add a little do-nothing ``slopsucker'' device which gives a home to PNP0c04 (legacy ISA coprocessor support). Tourist info.
2000-05-04 23:57:32 +00:00
*/
static struct isa_pnp_id npxisa_ids[] = {
{ 0x040cd041, "Legacy ISA coprocessor support" }, /* PNP0C04 */
{ 0 }
};
static int
npxisa_probe(device_t dev)
{
Make the PnP 'slopsucker' quiet in the !bootverbose case - the real NPX probe happens much earlier, and may come to very different conclusions about the system's NPX setup.
2000-06-23 08:19:50 +00:00
int result;
if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, npxisa_ids)) <= 0) {
device_quiet(dev);
}
return(result);
Add a little do-nothing ``slopsucker'' device which gives a home to PNP0c04 (legacy ISA coprocessor support). Tourist info.
2000-05-04 23:57:32 +00:00
}
static int
npxisa_attach(device_t dev)
{
return (0);
}
static device_method_t npxisa_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, npxisa_probe),
DEVMETHOD(device_attach, npxisa_attach),
DEVMETHOD(device_detach, bus_generic_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
{ 0, 0 }
};
static driver_t npxisa_driver = {
"npxisa",
npxisa_methods,
1, /* no softc */
};
static devclass_t npxisa_devclass;
DRIVER_MODULE(npxisa, isa, npxisa_driver, npxisa_devclass, 0, 0);
Add ACPI attachments.
2001-08-30 09:17:03 +00:00
DRIVER_MODULE(npxisa, acpi, npxisa_driver, npxisa_devclass, 0, 0);
Don't include <isa/isavar.h> or compile code depending on it when isa is not configured. Including <isa/isavar.h> when it is not used is harmful as well as bogus, since it includes "isa_if.h" which is not generated when isa is not configured. This was fixed in 1999 but was broken by unconditionalizing PNPBIOS.
2002-01-30 12:41:12 +00:00
#endif /* DEV_ISA */
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