2010-11-28 06:20:41 +00:00
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/***********************license start***************
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2012-03-11 04:14:00 +00:00
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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2010-11-28 06:20:41 +00:00
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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2012-03-11 04:14:00 +00:00
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* * Neither the name of Cavium Inc. nor the names of
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2010-11-28 06:20:41 +00:00
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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2012-03-11 04:14:00 +00:00
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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2010-11-28 06:20:41 +00:00
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Functions for SRIO initialization, configuration,
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* and monitoring.
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*
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* <hr>$Revision: 41586 $<hr>
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*/
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#include <asm/octeon/cvmx.h>
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#include <asm/octeon/cvmx-config.h>
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#include <asm/octeon/cvmx-clock.h>
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#include <asm/octeon/cvmx-helper.h>
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2012-03-11 04:14:00 +00:00
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#include <asm/octeon/cvmx-qlm.h>
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2010-11-28 06:20:41 +00:00
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#include <asm/octeon/cvmx-srio.h>
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#include <asm/octeon/cvmx-pip-defs.h>
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#include <asm/octeon/cvmx-sriox-defs.h>
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#include <asm/octeon/cvmx-sriomaintx-defs.h>
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#include <asm/octeon/cvmx-dpi-defs.h>
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#else
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2010-11-28 08:18:16 +00:00
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#if !defined(__FreeBSD__) || !defined(_KERNEL)
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2010-11-28 06:20:41 +00:00
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#include "executive-config.h"
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#include "cvmx-config.h"
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#ifdef CVMX_ENABLE_PKO_FUNCTIONS
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#include "cvmx.h"
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#include "cvmx-helper.h"
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2010-11-28 08:18:16 +00:00
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#include "cvmx-srio.h"
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#endif
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2012-03-11 04:14:00 +00:00
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#include "cvmx-qlm.h"
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2010-11-28 08:18:16 +00:00
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#else
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#include "cvmx.h"
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#include "cvmx-helper.h"
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2012-03-11 06:17:49 +00:00
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#include "cvmx-qlm.h"
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2010-11-28 06:20:41 +00:00
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#include "cvmx-srio.h"
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#endif
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#endif
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#ifdef CVMX_ENABLE_PKO_FUNCTIONS
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/**
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* @INTERNAL
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* Probe a SRIO interface and determine the number of ports
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* connected to it. The SRIO interface should still be down
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* after this call.
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*
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* @param interface Interface to probe
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*
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* @return Number of ports on the interface. Zero to disable.
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*/
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int __cvmx_helper_srio_probe(int interface)
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{
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cvmx_sriox_status_reg_t srio0_status_reg;
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cvmx_sriox_status_reg_t srio1_status_reg;
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2012-03-11 04:14:00 +00:00
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if (!octeon_has_feature(OCTEON_FEATURE_SRIO))
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2010-11-28 06:20:41 +00:00
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return 0;
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2012-03-11 04:14:00 +00:00
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/* Read MIO_QLMX_CFG CSRs to find SRIO status. */
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if (OCTEON_IS_MODEL(OCTEON_CN66XX))
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{
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int status = cvmx_qlm_get_status(0);
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int srio_port = interface - 4;
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switch(srio_port)
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{
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case 0: /* 1x4 lane */
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if (status == 4)
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return 2;
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break;
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case 2: /* 2x2 lane */
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if (status == 5)
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return 2;
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break;
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case 1: /* 4x1 long/short */
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case 3: /* 4x1 long/short */
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if (status == 6)
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return 2;
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break;
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}
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return 0;
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}
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2010-11-28 06:20:41 +00:00
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srio0_status_reg.u64 = cvmx_read_csr(CVMX_SRIOX_STATUS_REG(0));
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srio1_status_reg.u64 = cvmx_read_csr(CVMX_SRIOX_STATUS_REG(1));
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if (srio0_status_reg.s.srio || srio1_status_reg.s.srio)
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return 2;
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else
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return 0;
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}
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/**
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* @INTERNAL
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* Bringup and enable SRIO interface. After this call packet
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* I/O should be fully functional. This is called with IPD
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* enabled but PKO disabled.
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*
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* @param interface Interface to bring up
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*
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* @return Zero on success, negative on failure
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*/
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int __cvmx_helper_srio_enable(int interface)
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{
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int num_ports = cvmx_helper_ports_on_interface(interface);
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int index;
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cvmx_sriomaintx_core_enables_t sriomaintx_core_enables;
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cvmx_sriox_imsg_ctrl_t sriox_imsg_ctrl;
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2012-03-11 04:14:00 +00:00
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cvmx_sriox_status_reg_t srio_status_reg;
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2010-11-28 06:20:41 +00:00
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cvmx_dpi_ctl_t dpi_ctl;
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2012-03-11 04:14:00 +00:00
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int srio_port = interface - 4;
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2010-11-28 06:20:41 +00:00
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/* All SRIO ports have a cvmx_srio_rx_message_header_t header
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on them that must be skipped by IPD */
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for (index=0; index<num_ports; index++)
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{
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cvmx_pip_prt_cfgx_t port_config;
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cvmx_sriox_omsg_portx_t sriox_omsg_portx;
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cvmx_sriox_omsg_sp_mrx_t sriox_omsg_sp_mrx;
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cvmx_sriox_omsg_fmp_mrx_t sriox_omsg_fmp_mrx;
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cvmx_sriox_omsg_nmp_mrx_t sriox_omsg_nmp_mrx;
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int ipd_port = cvmx_helper_get_ipd_port(interface, index);
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port_config.u64 = cvmx_read_csr(CVMX_PIP_PRT_CFGX(ipd_port));
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/* Only change the skip if the user hasn't already set it */
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if (!port_config.s.skip)
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{
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port_config.s.skip = sizeof(cvmx_srio_rx_message_header_t);
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cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port), port_config.u64);
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}
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/* Enable TX with PKO */
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2012-03-11 04:14:00 +00:00
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sriox_omsg_portx.u64 = cvmx_read_csr(CVMX_SRIOX_OMSG_PORTX(index, srio_port));
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sriox_omsg_portx.s.port = (srio_port) * 2 + index;
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2010-11-28 06:20:41 +00:00
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sriox_omsg_portx.s.enable = 1;
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2012-03-11 04:14:00 +00:00
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cvmx_write_csr(CVMX_SRIOX_OMSG_PORTX(index, srio_port), sriox_omsg_portx.u64);
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2010-11-28 06:20:41 +00:00
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/* Allow OMSG controller to send regardless of the state of any other
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controller. Allow messages to different IDs and MBOXes to go in
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parallel */
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sriox_omsg_sp_mrx.u64 = 0;
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sriox_omsg_sp_mrx.s.xmbox_sp = 1;
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sriox_omsg_sp_mrx.s.ctlr_sp = 1;
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sriox_omsg_sp_mrx.s.ctlr_fmp = 1;
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sriox_omsg_sp_mrx.s.ctlr_nmp = 1;
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sriox_omsg_sp_mrx.s.id_sp = 1;
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sriox_omsg_sp_mrx.s.id_fmp = 1;
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sriox_omsg_sp_mrx.s.id_nmp = 1;
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sriox_omsg_sp_mrx.s.mbox_sp = 1;
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sriox_omsg_sp_mrx.s.mbox_fmp = 1;
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sriox_omsg_sp_mrx.s.mbox_nmp = 1;
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sriox_omsg_sp_mrx.s.all_psd = 1;
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2012-03-11 04:14:00 +00:00
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cvmx_write_csr(CVMX_SRIOX_OMSG_SP_MRX(index, srio_port), sriox_omsg_sp_mrx.u64);
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2010-11-28 06:20:41 +00:00
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/* Allow OMSG controller to send regardless of the state of any other
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controller. Allow messages to different IDs and MBOXes to go in
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parallel */
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sriox_omsg_fmp_mrx.u64 = 0;
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sriox_omsg_fmp_mrx.s.ctlr_sp = 1;
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sriox_omsg_fmp_mrx.s.ctlr_fmp = 1;
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sriox_omsg_fmp_mrx.s.ctlr_nmp = 1;
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sriox_omsg_fmp_mrx.s.id_sp = 1;
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sriox_omsg_fmp_mrx.s.id_fmp = 1;
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sriox_omsg_fmp_mrx.s.id_nmp = 1;
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sriox_omsg_fmp_mrx.s.mbox_sp = 1;
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sriox_omsg_fmp_mrx.s.mbox_fmp = 1;
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sriox_omsg_fmp_mrx.s.mbox_nmp = 1;
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sriox_omsg_fmp_mrx.s.all_psd = 1;
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2012-03-11 04:14:00 +00:00
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cvmx_write_csr(CVMX_SRIOX_OMSG_FMP_MRX(index, srio_port), sriox_omsg_fmp_mrx.u64);
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2010-11-28 06:20:41 +00:00
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/* Once the first part of a message is accepted, always acept the rest
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of the message */
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sriox_omsg_nmp_mrx.u64 = 0;
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sriox_omsg_nmp_mrx.s.all_sp = 1;
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sriox_omsg_nmp_mrx.s.all_fmp = 1;
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sriox_omsg_nmp_mrx.s.all_nmp = 1;
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2012-03-11 04:14:00 +00:00
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cvmx_write_csr(CVMX_SRIOX_OMSG_NMP_MRX(index, srio_port), sriox_omsg_nmp_mrx.u64);
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2010-11-28 06:20:41 +00:00
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}
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/* Choose the receive controller based on the mailbox */
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2012-03-11 04:14:00 +00:00
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sriox_imsg_ctrl.u64 = cvmx_read_csr(CVMX_SRIOX_IMSG_CTRL(srio_port));
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2010-11-28 06:20:41 +00:00
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sriox_imsg_ctrl.s.prt_sel = 0;
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sriox_imsg_ctrl.s.mbox = 0xa;
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2012-03-11 04:14:00 +00:00
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cvmx_write_csr(CVMX_SRIOX_IMSG_CTRL(srio_port), sriox_imsg_ctrl.u64);
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2010-11-28 06:20:41 +00:00
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/* DPI must be enabled for us to RX messages */
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dpi_ctl.u64 = cvmx_read_csr(CVMX_DPI_CTL);
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dpi_ctl.s.clk = 1;
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dpi_ctl.s.en = 1;
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cvmx_write_csr(CVMX_DPI_CTL, dpi_ctl.u64);
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2012-03-11 04:14:00 +00:00
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/* Make sure register access is allowed */
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srio_status_reg.u64 = cvmx_read_csr(CVMX_SRIOX_STATUS_REG(srio_port));
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if (!srio_status_reg.s.access)
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return 0;
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2010-11-28 06:20:41 +00:00
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/* Enable RX */
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2012-03-11 04:14:00 +00:00
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if (!cvmx_srio_config_read32(srio_port, 0, -1, 0, 0,
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CVMX_SRIOMAINTX_CORE_ENABLES(srio_port), &sriomaintx_core_enables.u32))
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2010-11-28 06:20:41 +00:00
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{
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sriomaintx_core_enables.s.imsg0 = 1;
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sriomaintx_core_enables.s.imsg1 = 1;
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2012-03-11 04:14:00 +00:00
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cvmx_srio_config_write32(srio_port, 0, -1, 0, 0,
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CVMX_SRIOMAINTX_CORE_ENABLES(srio_port), sriomaintx_core_enables.u32);
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2010-11-28 06:20:41 +00:00
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}
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return 0;
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}
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/**
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* @INTERNAL
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* Return the link state of an IPD/PKO port as returned by SRIO link status.
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*
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* @param ipd_port IPD/PKO port to query
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*
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* @return Link state
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*/
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cvmx_helper_link_info_t __cvmx_helper_srio_link_get(int ipd_port)
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{
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int interface = cvmx_helper_get_interface_num(ipd_port);
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int srio_port = interface - 4;
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cvmx_helper_link_info_t result;
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cvmx_sriox_status_reg_t srio_status_reg;
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cvmx_sriomaintx_port_0_err_stat_t sriomaintx_port_0_err_stat;
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cvmx_sriomaintx_port_0_ctl_t sriomaintx_port_0_ctl;
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cvmx_sriomaintx_port_0_ctl2_t sriomaintx_port_0_ctl2;
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result.u64 = 0;
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/* Make sure register access is allowed */
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srio_status_reg.u64 = cvmx_read_csr(CVMX_SRIOX_STATUS_REG(srio_port));
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if (!srio_status_reg.s.access)
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return result;
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/* Read the port link status */
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if (cvmx_srio_config_read32(srio_port, 0, -1, 0, 0,
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CVMX_SRIOMAINTX_PORT_0_ERR_STAT(srio_port),
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&sriomaintx_port_0_err_stat.u32))
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return result;
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/* Return if link is down */
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if (!sriomaintx_port_0_err_stat.s.pt_ok)
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return result;
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/* Read the port link width and speed */
|
|
|
|
if (cvmx_srio_config_read32(srio_port, 0, -1, 0, 0,
|
|
|
|
CVMX_SRIOMAINTX_PORT_0_CTL(srio_port),
|
|
|
|
&sriomaintx_port_0_ctl.u32))
|
|
|
|
return result;
|
|
|
|
if (cvmx_srio_config_read32(srio_port, 0, -1, 0, 0,
|
|
|
|
CVMX_SRIOMAINTX_PORT_0_CTL2(srio_port),
|
|
|
|
&sriomaintx_port_0_ctl2.u32))
|
|
|
|
return result;
|
|
|
|
|
|
|
|
/* Link is up */
|
|
|
|
result.s.full_duplex = 1;
|
|
|
|
result.s.link_up = 1;
|
|
|
|
switch (sriomaintx_port_0_ctl2.s.sel_baud)
|
|
|
|
{
|
|
|
|
case 1:
|
|
|
|
result.s.speed = 1250;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
result.s.speed = 2500;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
result.s.speed = 3125;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
result.s.speed = 5000;
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
result.s.speed = 6250;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
result.s.speed = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
switch (sriomaintx_port_0_ctl.s.it_width)
|
|
|
|
{
|
|
|
|
case 2: /* Four lanes */
|
|
|
|
result.s.speed += 40000;
|
|
|
|
break;
|
|
|
|
case 3: /* Two lanes */
|
|
|
|
result.s.speed += 20000;
|
|
|
|
break;
|
|
|
|
default: /* One lane */
|
|
|
|
result.s.speed += 10000;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @INTERNAL
|
|
|
|
* Configure an IPD/PKO port for the specified link state. This
|
|
|
|
* function does not influence auto negotiation at the PHY level.
|
|
|
|
* The passed link state must always match the link state returned
|
|
|
|
* by cvmx_helper_link_get(). It is normally best to use
|
|
|
|
* cvmx_helper_link_autoconf() instead.
|
|
|
|
*
|
|
|
|
* @param ipd_port IPD/PKO port to configure
|
|
|
|
* @param link_info The new link state
|
|
|
|
*
|
|
|
|
* @return Zero on success, negative on failure
|
|
|
|
*/
|
|
|
|
int __cvmx_helper_srio_link_set(int ipd_port, cvmx_helper_link_info_t link_info)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* CVMX_ENABLE_PKO_FUNCTIONS */
|
|
|
|
|