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freebsd-skq/sys/dev/pci/pci_pci.c

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Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
/*-
* Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
* Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
* Copyright (c) 2000 BSDi
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
Use __FBSDID(). Also some minor style cleanups.
2003-08-24 17:55:58 +00:00
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
/*
* PCI:PCI bridge support.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
Add some missing <sys/module.h> includes which are masked by the one on death-row in <sys/kernel.h>
2004-05-30 17:57:46 +00:00
#include <sys/module.h>
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
#include <sys/bus.h>
Properly account for prefetchable memory when a request is being made. We allow the request to go through if it matches either a prefetchable or a non-prefetchable part of the bridge. We do not check to make sure it is the right kind of memory because most drivers to not yet properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not entirely sure it does it right). RF_PREFETCHABLE was invented for cardbus, so hasn't been properly documented yet. This is still overridable by hw.pci.allow_unsupported_io_ranges, but the need for that is greatly reduced, especially for the nvida driver. Approved by: re Reviewed by: jhb and many testers Submitted by: Matt Emmerton (although this has been reworked somewhat)
2002-12-03 08:34:20 +00:00
#include <machine/bus.h>
#include <sys/rman.h>
Convert kernel compile option PCI_ALLOW_UNSUPPORTED_IO_RANGE to a loader tunable hw.pci.allow_unsupported_io_range. Submitted by: Hiten Pandya <hiten@angelica.unixdaemons.com> Approved by: re (murray)
2002-11-13 09:42:25 +00:00
#include <sys/sysctl.h>
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
#include <machine/resource.h>
Prefer new location of pci include files (which have only been in the tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
2003-08-22 06:42:59 +00:00
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcib_private.h>
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
#include "pcib_if.h"
static int pcib_probe(device_t dev);
static device_method_t pcib_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, pcib_probe),
DEVMETHOD(device_attach, pcib_attach),
Add a detach for pci bridge and pci bus drivers. This allows one to theoretically unload pci bridges or pci drivers. It will also allow detach to work if one needed to detach a subtree. This is inspired by looking at the p4 commits from bms to his 5.4 tree, but I didn't look at the final results.
2005-04-29 06:22:41 +00:00
DEVMETHOD(device_detach, bus_generic_detach),
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
/* Bus interface */
DEVMETHOD(bus_print_child, bus_generic_print_child),
DEVMETHOD(bus_read_ivar, pcib_read_ivar),
DEVMETHOD(bus_write_ivar, pcib_write_ivar),
DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
/* pcib interface */
DEVMETHOD(pcib_maxslots, pcib_maxslots),
DEVMETHOD(pcib_read_config, pcib_read_config),
DEVMETHOD(pcib_write_config, pcib_write_config),
DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt),
{ 0, 0 }
};
static driver_t pcib_driver = {
"pcib",
pcib_methods,
sizeof(struct pcib_softc),
};
Export a few symbols as globals to allow subclassing of this driver. In OOP speak, you would mark these as 'protected' members. Specifically: - Make the pcib_softc struct public so it can be used by subclasses. - Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(), and pcib_{read,write}_config() globals that can be used by subclasses. - Make the pcib devclass a global variable. - Move most of the pcib_attach() function into a global pcib_attach_common() function that can be called by the attach routines of subclasses. Tested on: i386, alpha, sparc64, ia64
2002-08-26 15:57:08 +00:00
devclass_t pcib_devclass;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0);
/*
* Generic device interface
*/
static int
pcib_probe(device_t dev)
{
if ((pci_get_class(dev) == PCIC_BRIDGE) &&
(pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
device_set_desc(dev, "PCI-PCI bridge");
return(-10000);
}
return(ENXIO);
}
Export a few symbols as globals to allow subclassing of this driver. In OOP speak, you would mark these as 'protected' members. Specifically: - Make the pcib_softc struct public so it can be used by subclasses. - Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(), and pcib_{read,write}_config() globals that can be used by subclasses. - Make the pcib devclass a global variable. - Move most of the pcib_attach() function into a global pcib_attach_common() function that can be called by the attach routines of subclasses. Tested on: i386, alpha, sparc64, ia64
2002-08-26 15:57:08 +00:00
void
pcib_attach_common(device_t dev)
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
{
struct pcib_softc *sc;
Prefer the uintXX_t to the u_intXX_t names.
2003-08-22 03:11:53 +00:00
uint8_t iolow;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
sc = device_get_softc(dev);
sc->dev = dev;
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
/*
* Get current bridge configuration.
*/
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
sc->command = pci_read_config(dev, PCIR_COMMAND, 1);
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1);
sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2);
sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1);
/*
* Determine current I/O decode.
*/
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
if (sc->command & PCIM_CMD_PORTEN) {
iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1);
if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
sc->iobase = PCI_PPBIOBASE(pci_read_config(dev, PCIR_IOBASEH_1, 2),
pci_read_config(dev, PCIR_IOBASEL_1, 1));
} else {
sc->iobase = PCI_PPBIOBASE(0, pci_read_config(dev, PCIR_IOBASEL_1, 1));
}
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1);
if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
sc->iolimit = PCI_PPBIOLIMIT(pci_read_config(dev, PCIR_IOLIMITH_1, 2),
pci_read_config(dev, PCIR_IOLIMITL_1, 1));
} else {
sc->iolimit = PCI_PPBIOLIMIT(0, pci_read_config(dev, PCIR_IOLIMITL_1, 1));
}
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
}
/*
* Determine current memory decode.
*/
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
if (sc->command & PCIM_CMD_MEMEN) {
sc->membase = PCI_PPBMEMBASE(0, pci_read_config(dev, PCIR_MEMBASE_1, 2));
sc->memlimit = PCI_PPBMEMLIMIT(0, pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
sc->pmembase = PCI_PPBMEMBASE((pci_addr_t)pci_read_config(dev, PCIR_PMBASEH_1, 4),
pci_read_config(dev, PCIR_PMBASEL_1, 2));
sc->pmemlimit = PCI_PPBMEMLIMIT((pci_addr_t)pci_read_config(dev, PCIR_PMLIMITH_1, 4),
pci_read_config(dev, PCIR_PMLIMITL_1, 2));
}
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
/*
* Quirk handling.
*/
switch (pci_get_devid(dev)) {
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
case 0x12258086: /* Intel 82454KX/GX (Orion) */
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
{
Prefer the uintXX_t to the u_intXX_t names.
2003-08-22 03:11:53 +00:00
uint8_t supbus;
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
supbus = pci_read_config(dev, 0x41, 1);
if (supbus != 0xff) {
sc->secbus = supbus + 1;
sc->subbus = supbus + 1;
}
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
break;
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
}
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
/*
* The i82380FB mobile docking controller is a PCI-PCI bridge,
* and it is a subtractive bridge. However, the ProgIf is wrong
* so the normal setting of PCIB_SUBTRACTIVE bit doesn't
* happen. There's also a Toshiba bridge that behaves this
* way.
*/
case 0x124b8086: /* Intel 82380FB Mobile */
case 0x060513d7: /* Toshiba ???? */
sc->flags |= PCIB_SUBTRACTIVE;
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
break;
}
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
/*
* Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
* but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM,
* BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
* This means they act as if they were subtractively decoding
* bridges and pass all transactions. Mark them and real ProgIf 1
* parts as subtractive.
*/
if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 ||
pci_read_config(dev, PCIR_PROGIF, 1) == 1)
sc->flags |= PCIB_SUBTRACTIVE;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
if (bootverbose) {
device_printf(dev, " secondary bus %d\n", sc->secbus);
device_printf(dev, " subordinate bus %d\n", sc->subbus);
device_printf(dev, " I/O decode 0x%x-0x%x\n", sc->iobase, sc->iolimit);
device_printf(dev, " memory decode 0x%x-0x%x\n", sc->membase, sc->memlimit);
device_printf(dev, " prefetched decode 0x%x-0x%x\n", sc->pmembase, sc->pmemlimit);
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
if (sc->flags & PCIB_SUBTRACTIVE)
device_printf(dev, " Subtractively decoded bridge.\n");
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
}
/*
* XXX If the secondary bus number is zero, we should assign a bus number
* since the BIOS hasn't, then initialise the bridge.
*/
/*
* XXX If the subordinate bus number is less than the secondary bus number,
* we should pick a better value. One sensible alternative would be to
* pick 255; the only tradeoff here is that configuration transactions
* would be more widely routed than absolutely necessary.
*/
Export a few symbols as globals to allow subclassing of this driver. In OOP speak, you would mark these as 'protected' members. Specifically: - Make the pcib_softc struct public so it can be used by subclasses. - Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(), and pcib_{read,write}_config() globals that can be used by subclasses. - Make the pcib devclass a global variable. - Move most of the pcib_attach() function into a global pcib_attach_common() function that can be called by the attach routines of subclasses. Tested on: i386, alpha, sparc64, ia64
2002-08-26 15:57:08 +00:00
}
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
Export pcib_attach() as a "protected" for use in subclasses of the PCI-PCI bridge driver.
2002-09-06 22:14:00 +00:00
int
Export a few symbols as globals to allow subclassing of this driver. In OOP speak, you would mark these as 'protected' members. Specifically: - Make the pcib_softc struct public so it can be used by subclasses. - Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(), and pcib_{read,write}_config() globals that can be used by subclasses. - Make the pcib devclass a global variable. - Move most of the pcib_attach() function into a global pcib_attach_common() function that can be called by the attach routines of subclasses. Tested on: i386, alpha, sparc64, ia64
2002-08-26 15:57:08 +00:00
pcib_attach(device_t dev)
{
struct pcib_softc *sc;
device_t child;
pcib_attach_common(dev);
sc = device_get_softc(dev);
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
if (sc->secbus != 0) {
Prefer the physical bus number of the PCI bus as the unit of the pciX device created.
2002-09-06 16:09:07 +00:00
child = device_add_child(dev, "pci", sc->secbus);
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
if (child != NULL)
return(bus_generic_attach(dev));
}
/* no secondary bus; we should have fixed this */
return(0);
}
Export a few symbols as globals to allow subclassing of this driver. In OOP speak, you would mark these as 'protected' members. Specifically: - Make the pcib_softc struct public so it can be used by subclasses. - Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(), and pcib_{read,write}_config() globals that can be used by subclasses. - Make the pcib devclass a global variable. - Move most of the pcib_attach() function into a global pcib_attach_common() function that can be called by the attach routines of subclasses. Tested on: i386, alpha, sparc64, ia64
2002-08-26 15:57:08 +00:00
int
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
{
struct pcib_softc *sc = device_get_softc(dev);
switch (which) {
case PCIB_IVAR_BUS:
*result = sc->secbus;
return(0);
}
return(ENOENT);
}
Export a few symbols as globals to allow subclassing of this driver. In OOP speak, you would mark these as 'protected' members. Specifically: - Make the pcib_softc struct public so it can be used by subclasses. - Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(), and pcib_{read,write}_config() globals that can be used by subclasses. - Make the pcib devclass a global variable. - Move most of the pcib_attach() function into a global pcib_attach_common() function that can be called by the attach routines of subclasses. Tested on: i386, alpha, sparc64, ia64
2002-08-26 15:57:08 +00:00
int
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
{
struct pcib_softc *sc = device_get_softc(dev);
switch (which) {
case PCIB_IVAR_BUS:
sc->secbus = value;
break;
}
return(ENOENT);
}
Properly account for prefetchable memory when a request is being made. We allow the request to go through if it matches either a prefetchable or a non-prefetchable part of the bridge. We do not check to make sure it is the right kind of memory because most drivers to not yet properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not entirely sure it does it right). RF_PREFETCHABLE was invented for cardbus, so hasn't been properly documented yet. This is still overridable by hw.pci.allow_unsupported_io_ranges, but the need for that is greatly reduced, especially for the nvida driver. Approved by: re Reviewed by: jhb and many testers Submitted by: Matt Emmerton (although this has been reworked somewhat)
2002-12-03 08:34:20 +00:00
/*
* Is the prefetch window open (eg, can we allocate memory in it?)
*/
static int
pcib_is_prefetch_open(struct pcib_softc *sc)
{
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
Properly account for prefetchable memory when a request is being made. We allow the request to go through if it matches either a prefetchable or a non-prefetchable part of the bridge. We do not check to make sure it is the right kind of memory because most drivers to not yet properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not entirely sure it does it right). RF_PREFETCHABLE was invented for cardbus, so hasn't been properly documented yet. This is still overridable by hw.pci.allow_unsupported_io_ranges, but the need for that is greatly reduced, especially for the nvida driver. Approved by: re Reviewed by: jhb and many testers Submitted by: Matt Emmerton (although this has been reworked somewhat)
2002-12-03 08:34:20 +00:00
}
/*
* Is the nonprefetch window open (eg, can we allocate memory in it?)
*/
static int
pcib_is_nonprefetch_open(struct pcib_softc *sc)
{
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
return (sc->membase > 0 && sc->membase < sc->memlimit);
Properly account for prefetchable memory when a request is being made. We allow the request to go through if it matches either a prefetchable or a non-prefetchable part of the bridge. We do not check to make sure it is the right kind of memory because most drivers to not yet properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not entirely sure it does it right). RF_PREFETCHABLE was invented for cardbus, so hasn't been properly documented yet. This is still overridable by hw.pci.allow_unsupported_io_ranges, but the need for that is greatly reduced, especially for the nvida driver. Approved by: re Reviewed by: jhb and many testers Submitted by: Matt Emmerton (although this has been reworked somewhat)
2002-12-03 08:34:20 +00:00
}
/*
* Is the io window open (eg, can we allocate ports in it?)
*/
static int
pcib_is_io_open(struct pcib_softc *sc)
{
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
return (sc->iobase > 0 && sc->iobase < sc->iolimit);
Properly account for prefetchable memory when a request is being made. We allow the request to go through if it matches either a prefetchable or a non-prefetchable part of the bridge. We do not check to make sure it is the right kind of memory because most drivers to not yet properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not entirely sure it does it right). RF_PREFETCHABLE was invented for cardbus, so hasn't been properly documented yet. This is still overridable by hw.pci.allow_unsupported_io_ranges, but the need for that is greatly reduced, especially for the nvida driver. Approved by: re Reviewed by: jhb and many testers Submitted by: Matt Emmerton (although this has been reworked somewhat)
2002-12-03 08:34:20 +00:00
}
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
/*
* We have to trap resource allocation requests and ensure that the bridge
* is set up to, or capable of handling them.
*/
Export a few symbols as globals to allow subclassing of this driver. In OOP speak, you would mark these as 'protected' members. Specifically: - Make the pcib_softc struct public so it can be used by subclasses. - Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(), and pcib_{read,write}_config() globals that can be used by subclasses. - Make the pcib devclass a global variable. - Move most of the pcib_attach() function into a global pcib_attach_common() function that can be called by the attach routines of subclasses. Tested on: i386, alpha, sparc64, ia64
2002-08-26 15:57:08 +00:00
struct resource *
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
For the I/O port case, we need to set ok to 1 if we have what looks like a valid range. We already do this in the memory case (although the code there is somewhat different than the I/o case because we have to deal with different kinds of memory). Since most laptops don't have non-subtractive bridges, this wasn't seen in practice. Evidentally the Compaq R3000 hits this problem with PC Cards. Some minor style fixes while I'm here. Submitted by: Jung-uk Kim
2005-02-18 17:35:03 +00:00
u_long start, u_long end, u_long count, u_int flags)
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
{
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
struct pcib_softc *sc = device_get_softc(dev);
int ok;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
/*
* Fail the allocation for this range if it's not supported.
*/
switch (type) {
case SYS_RES_IOPORT:
Properly account for prefetchable memory when a request is being made. We allow the request to go through if it matches either a prefetchable or a non-prefetchable part of the bridge. We do not check to make sure it is the right kind of memory because most drivers to not yet properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not entirely sure it does it right). RF_PREFETCHABLE was invented for cardbus, so hasn't been properly documented yet. This is still overridable by hw.pci.allow_unsupported_io_ranges, but the need for that is greatly reduced, especially for the nvida driver. Approved by: re Reviewed by: jhb and many testers Submitted by: Matt Emmerton (although this has been reworked somewhat)
2002-12-03 08:34:20 +00:00
ok = 0;
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
if (!pcib_is_io_open(sc))
break;
ok = (start >= sc->iobase && end <= sc->iolimit);
In pcib_alloc_resource() check if the resource allocation request is for the VGA I/O or memory ranges, when it's not within the default ranges decoded by the bridge. When allocation for VGA addresses is attempted, check that the bridge has the VGA Enable bit set before allowing it. As such, newbusified VGA drivers can allocate their resources when the VGA adapter is behind a PCI-to-PCI bridge. Reviewed by: imp@, jhb@
2005-04-29 02:15:40 +00:00
/*
* Make sure we allow access to VGA I/O addresses when the
* bridge has the "VGA Enable" bit set.
*/
if (!ok && pci_is_vga_ioport_range(start, end))
ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
if (!ok) {
if (start < sc->iobase)
start = sc->iobase;
if (end > sc->iolimit)
end = sc->iolimit;
For the I/O port case, we need to set ok to 1 if we have what looks like a valid range. We already do this in the memory case (although the code there is somewhat different than the I/o case because we have to deal with different kinds of memory). Since most laptops don't have non-subtractive bridges, this wasn't seen in practice. Evidentally the Compaq R3000 hits this problem with PC Cards. Some minor style fixes while I'm here. Submitted by: Jung-uk Kim
2005-02-18 17:35:03 +00:00
if (start < end)
ok = 1;
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
}
Convert kernel compile option PCI_ALLOW_UNSUPPORTED_IO_RANGE to a loader tunable hw.pci.allow_unsupported_io_range. Submitted by: Hiten Pandya <hiten@angelica.unixdaemons.com> Approved by: re (murray)
2002-11-13 09:42:25 +00:00
} else {
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
ok = 1;
Omnibus PCI commit: o Save and restore bars for suspend/resume as well as for D3->D0 transitions. o preallocate resources that the PCI devices use to avoid resource conflicts o lazy allocation of resources not allocated by the BIOS. o set unattached drivers to state D3. Set power state to D0 before probe/attach. Right now there's two special cases for this (display and memory devices) that need work in other areas of the tree. Please report any bugs to me.
2004-04-09 15:44:34 +00:00
#if 1
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
if (start < sc->iobase && end > sc->iolimit) {
start = sc->iobase;
end = sc->iolimit;
}
It appears that the changes in the resources allocated is causing much pain and suffering. Attempt to back it out by removing the 'if the requested range is larger than the window, clip to the window' code. This is a band-aide until the issues are better understood and the issues with the lazy allocation patches are resolved.
2004-01-17 21:54:04 +00:00
#endif
Convert kernel compile option PCI_ALLOW_UNSUPPORTED_IO_RANGE to a loader tunable hw.pci.allow_unsupported_io_range. Submitted by: Hiten Pandya <hiten@angelica.unixdaemons.com> Approved by: re (murray)
2002-11-13 09:42:25 +00:00
}
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
if (end < start) {
For the I/O port case, we need to set ok to 1 if we have what looks like a valid range. We already do this in the memory case (although the code there is somewhat different than the I/o case because we have to deal with different kinds of memory). Since most laptops don't have non-subtractive bridges, this wasn't seen in practice. Evidentally the Compaq R3000 hits this problem with PC Cards. Some minor style fixes while I'm here. Submitted by: Jung-uk Kim
2005-02-18 17:35:03 +00:00
device_printf(dev, "ioport: end (%lx) < start (%lx)\n",
end, start);
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
start = 0;
end = 0;
ok = 0;
}
if (!ok) {
For the I/O port case, we need to set ok to 1 if we have what looks like a valid range. We already do this in the memory case (although the code there is somewhat different than the I/o case because we have to deal with different kinds of memory). Since most laptops don't have non-subtractive bridges, this wasn't seen in practice. Evidentally the Compaq R3000 hits this problem with PC Cards. Some minor style fixes while I'm here. Submitted by: Jung-uk Kim
2005-02-18 17:35:03 +00:00
device_printf(dev, "%s requested unsupported I/O "
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
"range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n",
device_get_nameunit(child), start, end,
sc->iobase, sc->iolimit);
return (NULL);
}
if (bootverbose)
For the I/O port case, we need to set ok to 1 if we have what looks like a valid range. We already do this in the memory case (although the code there is somewhat different than the I/o case because we have to deal with different kinds of memory). Since most laptops don't have non-subtractive bridges, this wasn't seen in practice. Evidentally the Compaq R3000 hits this problem with PC Cards. Some minor style fixes while I'm here. Submitted by: Jung-uk Kim
2005-02-18 17:35:03 +00:00
device_printf(dev,
"%s requested I/O range 0x%lx-0x%lx: in range\n",
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
device_get_nameunit(child), start, end);
break;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
case SYS_RES_MEMORY:
Properly account for prefetchable memory when a request is being made. We allow the request to go through if it matches either a prefetchable or a non-prefetchable part of the bridge. We do not check to make sure it is the right kind of memory because most drivers to not yet properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not entirely sure it does it right). RF_PREFETCHABLE was invented for cardbus, so hasn't been properly documented yet. This is still overridable by hw.pci.allow_unsupported_io_ranges, but the need for that is greatly reduced, especially for the nvida driver. Approved by: re Reviewed by: jhb and many testers Submitted by: Matt Emmerton (although this has been reworked somewhat)
2002-12-03 08:34:20 +00:00
ok = 0;
if (pcib_is_nonprefetch_open(sc))
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
ok = ok || (start >= sc->membase && end <= sc->memlimit);
Properly account for prefetchable memory when a request is being made. We allow the request to go through if it matches either a prefetchable or a non-prefetchable part of the bridge. We do not check to make sure it is the right kind of memory because most drivers to not yet properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not entirely sure it does it right). RF_PREFETCHABLE was invented for cardbus, so hasn't been properly documented yet. This is still overridable by hw.pci.allow_unsupported_io_ranges, but the need for that is greatly reduced, especially for the nvida driver. Approved by: re Reviewed by: jhb and many testers Submitted by: Matt Emmerton (although this has been reworked somewhat)
2002-12-03 08:34:20 +00:00
if (pcib_is_prefetch_open(sc))
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
In pcib_alloc_resource() check if the resource allocation request is for the VGA I/O or memory ranges, when it's not within the default ranges decoded by the bridge. When allocation for VGA addresses is attempted, check that the bridge has the VGA Enable bit set before allowing it. As such, newbusified VGA drivers can allocate their resources when the VGA adapter is behind a PCI-to-PCI bridge. Reviewed by: imp@, jhb@
2005-04-29 02:15:40 +00:00
/*
* Make sure we allow access to VGA memory addresses when the
* bridge has the "VGA Enable" bit set.
*/
if (!ok && pci_is_vga_memory_range(start, end))
ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
if (!ok) {
ok = 1;
if (flags & RF_PREFETCHABLE) {
if (pcib_is_prefetch_open(sc)) {
if (start < sc->pmembase)
start = sc->pmembase;
if (end > sc->pmemlimit)
end = sc->pmemlimit;
} else {
ok = 0;
}
} else { /* non-prefetchable */
if (pcib_is_nonprefetch_open(sc)) {
if (start < sc->membase)
start = sc->membase;
if (end > sc->memlimit)
end = sc->memlimit;
} else {
ok = 0;
}
}
Properly account for prefetchable memory when a request is being made. We allow the request to go through if it matches either a prefetchable or a non-prefetchable part of the bridge. We do not check to make sure it is the right kind of memory because most drivers to not yet properly set RF_PREFETCHABLE (only cardbus seems to do so, and I'm not entirely sure it does it right). RF_PREFETCHABLE was invented for cardbus, so hasn't been properly documented yet. This is still overridable by hw.pci.allow_unsupported_io_ranges, but the need for that is greatly reduced, especially for the nvida driver. Approved by: re Reviewed by: jhb and many testers Submitted by: Matt Emmerton (although this has been reworked somewhat)
2002-12-03 08:34:20 +00:00
}
} else if (!ok) {
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
ok = 1; /* subtractive bridge: always ok */
Omnibus PCI commit: o Save and restore bars for suspend/resume as well as for D3->D0 transitions. o preallocate resources that the PCI devices use to avoid resource conflicts o lazy allocation of resources not allocated by the BIOS. o set unattached drivers to state D3. Set power state to D0 before probe/attach. Right now there's two special cases for this (display and memory devices) that need work in other areas of the tree. Please report any bugs to me.
2004-04-09 15:44:34 +00:00
#if 1
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
if (pcib_is_nonprefetch_open(sc)) {
if (start < sc->membase && end > sc->memlimit) {
start = sc->membase;
end = sc->memlimit;
}
}
if (pcib_is_prefetch_open(sc)) {
if (start < sc->pmembase && end > sc->pmemlimit) {
start = sc->pmembase;
end = sc->pmemlimit;
}
}
It appears that the changes in the resources allocated is causing much pain and suffering. Attempt to back it out by removing the 'if the requested range is larger than the window, clip to the window' code. This is a band-aide until the issues are better understood and the issues with the lazy allocation patches are resolved.
2004-01-17 21:54:04 +00:00
#endif
Convert kernel compile option PCI_ALLOW_UNSUPPORTED_IO_RANGE to a loader tunable hw.pci.allow_unsupported_io_range. Submitted by: Hiten Pandya <hiten@angelica.unixdaemons.com> Approved by: re (murray)
2002-11-13 09:42:25 +00:00
}
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
if (end < start) {
For the I/O port case, we need to set ok to 1 if we have what looks like a valid range. We already do this in the memory case (although the code there is somewhat different than the I/o case because we have to deal with different kinds of memory). Since most laptops don't have non-subtractive bridges, this wasn't seen in practice. Evidentally the Compaq R3000 hits this problem with PC Cards. Some minor style fixes while I'm here. Submitted by: Jung-uk Kim
2005-02-18 17:35:03 +00:00
device_printf(dev, "memory: end (%lx) < start (%lx)\n",
end, start);
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
start = 0;
end = 0;
ok = 0;
}
if (!ok && bootverbose)
device_printf(dev,
For the I/O port case, we need to set ok to 1 if we have what looks like a valid range. We already do this in the memory case (although the code there is somewhat different than the I/o case because we have to deal with different kinds of memory). Since most laptops don't have non-subtractive bridges, this wasn't seen in practice. Evidentally the Compaq R3000 hits this problem with PC Cards. Some minor style fixes while I'm here. Submitted by: Jung-uk Kim
2005-02-18 17:35:03 +00:00
"%s requested unsupported memory range "
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
"0x%lx-0x%lx (decoding 0x%x-0x%x, 0x%x-0x%x)\n",
device_get_nameunit(child), start, end,
sc->membase, sc->memlimit, sc->pmembase,
sc->pmemlimit);
if (!ok)
return (NULL);
if (bootverbose)
For the I/O port case, we need to set ok to 1 if we have what looks like a valid range. We already do this in the memory case (although the code there is somewhat different than the I/o case because we have to deal with different kinds of memory). Since most laptops don't have non-subtractive bridges, this wasn't seen in practice. Evidentally the Compaq R3000 hits this problem with PC Cards. Some minor style fixes while I'm here. Submitted by: Jung-uk Kim
2005-02-18 17:35:03 +00:00
device_printf(dev,"%s requested memory range "
"0x%lx-0x%lx: good\n",
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
device_get_nameunit(child), start, end);
break;
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
default:
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
break;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
}
Add support for subtractive decoding bridges. These bridges pass all signals to addresses to the child busses. Typically, ProgIf of 1 means a subtractive bridge. However, Intel has a whole lot of ones with a ProgIf of 80 that are also subtractive. We cope with these bridges too. This eliminates hw.pci.allow_unsupported_io_range because that had almost the same effect as these patches (almost means 'buggy'). Remove the bogus checks for ISA bus locations: these cycles aren't special and are only passed by transparent bridges. We allow any range to succeed. If the range is a superset of the range that's decoded, trim the resource to that range. Otherwise, pass the range unchanged. This will change the location that PC Card and CardBus cards are attached. This might bogusly cause some overlapping allocation that wasn't present before, but the overlapping fixes need to be in the pci level. There's also a few formatting changes here.
2004-01-11 06:52:31 +00:00
/*
* Bridge is OK decoding this resource, so pass it up.
*/
For the I/O port case, we need to set ok to 1 if we have what looks like a valid range. We already do this in the memory case (although the code there is somewhat different than the I/o case because we have to deal with different kinds of memory). Since most laptops don't have non-subtractive bridges, this wasn't seen in practice. Evidentally the Compaq R3000 hits this problem with PC Cards. Some minor style fixes while I'm here. Submitted by: Jung-uk Kim
2005-02-18 17:35:03 +00:00
return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
count, flags));
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
}
/*
* PCIB interface.
*/
Export a few symbols as globals to allow subclassing of this driver. In OOP speak, you would mark these as 'protected' members. Specifically: - Make the pcib_softc struct public so it can be used by subclasses. - Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(), and pcib_{read,write}_config() globals that can be used by subclasses. - Make the pcib devclass a global variable. - Move most of the pcib_attach() function into a global pcib_attach_common() function that can be called by the attach routines of subclasses. Tested on: i386, alpha, sparc64, ia64
2002-08-26 15:57:08 +00:00
int
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
pcib_maxslots(device_t dev)
{
- We have access to our own device_t here, so use pci_read_config rather than finding our parent pcib and using its PCI_READ_CONFIG method. - Fix the defines for the 32-bit I/O decode registers, and properly process the 16-bit versions. Now we will correctly check that I/O resources behind the bridge are going to be decoded. - Bring the quirk for the Orion PCI:PCI bridge in here (since it seems to want to set the secondary/supplementary bus numbers). - Use PCI_SLOTMAX rather than a magic number.
2000-12-12 13:20:35 +00:00
return(PCI_SLOTMAX);
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
}
/*
* Since we are a child of a PCI bus, its parent must support the pcib interface.
*/
Prefer the uintXX_t to the u_intXX_t names.
2003-08-22 03:11:53 +00:00
uint32_t
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
pcib_read_config(device_t dev, int b, int s, int f, int reg, int width)
{
return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width));
}
Export a few symbols as globals to allow subclassing of this driver. In OOP speak, you would mark these as 'protected' members. Specifically: - Make the pcib_softc struct public so it can be used by subclasses. - Make pcib_{read,write}_ivar(), pcib_alloc_resource(), pcib_maxslots(), and pcib_{read,write}_config() globals that can be used by subclasses. - Make the pcib devclass a global variable. - Move most of the pcib_attach() function into a global pcib_attach_common() function that can be called by the attach routines of subclasses. Tested on: i386, alpha, sparc64, ia64
2002-08-26 15:57:08 +00:00
void
Prefer the uintXX_t to the u_intXX_t names.
2003-08-22 03:11:53 +00:00
pcib_write_config(device_t dev, int b, int s, int f, int reg, uint32_t val, int width)
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
{
PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width);
}
/*
* Route an interrupt across a PCI bridge.
*/
Make the base pcib_route_interrupt method available to other pci-pci bridge sub-classes. This allows the powerpc kernel to build again. Forgotten by: benno Spotted by: grehan
2003-01-14 11:37:56 +00:00
int
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
pcib_route_interrupt(device_t pcib, device_t dev, int pin)
{
device_t bus;
int parent_intpin;
int intnum;
/*
*
* The PCI standard defines a swizzle of the child-side device/intpin to
* the parent-side intpin as follows.
*
* device = device on child bus
* child_intpin = intpin on child bus slot (0-3)
* parent_intpin = intpin on parent bus slot (0-3)
*
* parent_intpin = (device + child_intpin) % 4
*/
Calculate routed interrupts using the slot number from the device and not that of the bridge. Approved by: re (jhb)
2003-05-22 17:45:26 +00:00
parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
/*
* Our parent is a PCI bus. Its parent must export the pcib interface
* which includes the ability to route interrupts.
*/
bus = device_get_parent(pcib);
intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1);
Trim a few things from the dmesg output and stick them under bootverbose to cut down on the clutter including PCI interrupt routing, MTRR, pcibios, etc. Discussed with: USENIX Cabal
2004-07-01 07:46:29 +00:00
if (PCI_INTERRUPT_VALID(intnum) && bootverbose) {
Make the printf messages when routing interrupts more consistent in the various PCI bridge drivers.
2002-09-05 17:08:35 +00:00
device_printf(pcib, "slot %d INT%c is routed to irq %d\n",
pci_get_slot(dev), 'A' + pin - 1, intnum);
Don't claim to have routed an interrupt when the method actually returned an error.
2002-02-12 01:28:49 +00:00
}
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
return(intnum);
}
Add a function host_pcib_get_bnsno() that attempts to determine the bus number of the child bus of a host to PCI bridge by reading from proprietary configuration registers in the host to PCI bridge devices. Approved by: re
2002-11-22 17:50:47 +00:00
/*
* Try to read the bus number of a host-PCI bridge using appropriate config
* registers.
*/
int
host_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func,
Prefer the uintXX_t to the u_intXX_t names.
2003-08-22 03:11:53 +00:00
uint8_t *busnum)
Add a function host_pcib_get_bnsno() that attempts to determine the bus number of the child bus of a host to PCI bridge by reading from proprietary configuration registers in the host to PCI bridge devices. Approved by: re
2002-11-22 17:50:47 +00:00
{
Prefer the uintXX_t to the u_intXX_t names.
2003-08-22 03:11:53 +00:00
uint32_t id;
Add a function host_pcib_get_bnsno() that attempts to determine the bus number of the child bus of a host to PCI bridge by reading from proprietary configuration registers in the host to PCI bridge devices. Approved by: re
2002-11-22 17:50:47 +00:00
id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4);
Fix a couple of bugs in host_pcib_get_busno(): - If a PCI device is not present, then a 32-bit read_config() is going to return 0xffffffff not 0xffff. - For the 82454NX chipset, the MIOC that we read the bus numbers of the various host-PCI bridges from is at function (slot) 0x10 not 0x0. Approved by: re (rwatson)
2002-11-25 21:53:14 +00:00
if (id == 0xffffffff)
Add a function host_pcib_get_bnsno() that attempts to determine the bus number of the child bus of a host to PCI bridge by reading from proprietary configuration registers in the host to PCI bridge devices. Approved by: re
2002-11-22 17:50:47 +00:00
return (0);
switch (id) {
case 0x12258086:
/* Intel 824?? */
/* XXX This is a guess */
/* *busnum = read_config(bus, slot, func, 0x41, 1); */
*busnum = bus;
break;
case 0x84c48086:
/* Intel 82454KX/GX (Orion) */
*busnum = read_config(bus, slot, func, 0x4a, 1);
break;
case 0x84ca8086:
/*
* For the 450nx chipset, there is a whole bundle of
* things pretending to be host bridges. The MIOC will
* be seen first and isn't really a pci bridge (the
* actual busses are attached to the PXB's). We need to
* read the registers of the MIOC to figure out the
* bus numbers for the PXB channels.
*
* Since the MIOC doesn't have a pci bus attached, we
* pretend it wasn't there.
*/
return (0);
case 0x84cb8086:
switch (slot) {
case 0x12:
/* Intel 82454NX PXB#0, Bus#A */
Fix a couple of bugs in host_pcib_get_busno(): - If a PCI device is not present, then a 32-bit read_config() is going to return 0xffffffff not 0xffff. - For the 82454NX chipset, the MIOC that we read the bus numbers of the various host-PCI bridges from is at function (slot) 0x10 not 0x0. Approved by: re (rwatson)
2002-11-25 21:53:14 +00:00
*busnum = read_config(bus, 0x10, func, 0xd0, 1);
Add a function host_pcib_get_bnsno() that attempts to determine the bus number of the child bus of a host to PCI bridge by reading from proprietary configuration registers in the host to PCI bridge devices. Approved by: re
2002-11-22 17:50:47 +00:00
break;
case 0x13:
/* Intel 82454NX PXB#0, Bus#B */
Fix a couple of bugs in host_pcib_get_busno(): - If a PCI device is not present, then a 32-bit read_config() is going to return 0xffffffff not 0xffff. - For the 82454NX chipset, the MIOC that we read the bus numbers of the various host-PCI bridges from is at function (slot) 0x10 not 0x0. Approved by: re (rwatson)
2002-11-25 21:53:14 +00:00
*busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1;
Add a function host_pcib_get_bnsno() that attempts to determine the bus number of the child bus of a host to PCI bridge by reading from proprietary configuration registers in the host to PCI bridge devices. Approved by: re
2002-11-22 17:50:47 +00:00
break;
case 0x14:
/* Intel 82454NX PXB#1, Bus#A */
Fix a couple of bugs in host_pcib_get_busno(): - If a PCI device is not present, then a 32-bit read_config() is going to return 0xffffffff not 0xffff. - For the 82454NX chipset, the MIOC that we read the bus numbers of the various host-PCI bridges from is at function (slot) 0x10 not 0x0. Approved by: re (rwatson)
2002-11-25 21:53:14 +00:00
*busnum = read_config(bus, 0x10, func, 0xd3, 1);
Add a function host_pcib_get_bnsno() that attempts to determine the bus number of the child bus of a host to PCI bridge by reading from proprietary configuration registers in the host to PCI bridge devices. Approved by: re
2002-11-22 17:50:47 +00:00
break;
case 0x15:
/* Intel 82454NX PXB#1, Bus#B */
Fix a couple of bugs in host_pcib_get_busno(): - If a PCI device is not present, then a 32-bit read_config() is going to return 0xffffffff not 0xffff. - For the 82454NX chipset, the MIOC that we read the bus numbers of the various host-PCI bridges from is at function (slot) 0x10 not 0x0. Approved by: re (rwatson)
2002-11-25 21:53:14 +00:00
*busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1;
Add a function host_pcib_get_bnsno() that attempts to determine the bus number of the child bus of a host to PCI bridge by reading from proprietary configuration registers in the host to PCI bridge devices. Approved by: re
2002-11-22 17:50:47 +00:00
break;
}
break;
/* ServerWorks -- vendor 0x1166 */
case 0x00051166:
case 0x00061166:
case 0x00081166:
case 0x00091166:
case 0x00101166:
case 0x00111166:
case 0x00171166:
case 0x01011166:
case 0x010f1014:
case 0x02011166:
case 0x03021014:
*busnum = read_config(bus, slot, func, 0x44, 1);
break;
Add code to read the primary PCI bus number out of the Compaq/HP 6010 hotplug Host to PCI bridge. This is only needed for the non-ACPI case as the BIOS includes a proper _BBN method in ACPI.
2005-03-25 14:18:50 +00:00
/* Compaq/HP -- vendor 0x0e11 */
case 0x60100e11:
*busnum = read_config(bus, slot, func, 0xc8, 1);
break;
Add a function host_pcib_get_bnsno() that attempts to determine the bus number of the child bus of a host to PCI bridge by reading from proprietary configuration registers in the host to PCI bridge devices. Approved by: re
2002-11-22 17:50:47 +00:00
default:
/* Don't know how to read bus number. */
return 0;
}
return 1;
}
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