2008-04-02 22:00:36 +00:00
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/******************************************************************************
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2007-05-04 00:00:12 +00:00
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2010-01-26 22:32:22 +00:00
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Copyright (c) 2001-2010, Intel Corporation
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2007-05-04 00:00:12 +00:00
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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2008-04-02 22:00:36 +00:00
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******************************************************************************/
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/*$FreeBSD$*/
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2007-05-04 00:00:12 +00:00
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2007-05-16 00:14:23 +00:00
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#include "e1000_api.h"
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2007-05-04 00:00:12 +00:00
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static u8 e1000_calculate_checksum(u8 *buffer, u32 length);
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/**
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* e1000_calculate_checksum - Calculate checksum for buffer
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2007-05-16 00:14:23 +00:00
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* @buffer: pointer to EEPROM
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* @length: size of EEPROM to calculate a checksum for
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2007-05-04 00:00:12 +00:00
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*
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* Calculates the checksum for some buffer on a specified length. The
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* checksum calculated is returned.
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**/
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2007-11-20 21:41:22 +00:00
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static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
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2007-05-04 00:00:12 +00:00
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{
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u32 i;
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u8 sum = 0;
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DEBUGFUNC("e1000_calculate_checksum");
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if (!buffer)
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return 0;
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for (i = 0; i < length; i++)
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sum += buffer[i];
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return (u8) (0 - sum);
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}
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/**
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* e1000_mng_enable_host_if_generic - Checks host interface is enabled
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2007-05-16 00:14:23 +00:00
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* @hw: pointer to the HW structure
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2007-05-04 00:00:12 +00:00
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*
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* Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
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*
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2008-02-29 21:50:11 +00:00
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* This function checks whether the HOST IF is enabled for command operation
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2007-05-04 00:00:12 +00:00
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* and also checks whether the previous command is completed. It busy waits
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* in case of previous command is not completed.
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**/
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2008-11-26 23:57:23 +00:00
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s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)
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2007-05-04 00:00:12 +00:00
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{
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u32 hicr;
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s32 ret_val = E1000_SUCCESS;
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2010-01-26 22:32:22 +00:00
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u8 i;
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2007-05-04 00:00:12 +00:00
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DEBUGFUNC("e1000_mng_enable_host_if_generic");
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Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
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if (!(hw->mac.arc_subsystem_valid)) {
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DEBUGOUT("ARC subsystem not valid.\n");
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ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
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goto out;
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}
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2007-05-04 00:00:12 +00:00
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/* Check that the host interface is enabled. */
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hicr = E1000_READ_REG(hw, E1000_HICR);
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if ((hicr & E1000_HICR_EN) == 0) {
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DEBUGOUT("E1000_HOST_EN bit disabled.\n");
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ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
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goto out;
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}
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/* check the previous command is completed */
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for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
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hicr = E1000_READ_REG(hw, E1000_HICR);
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if (!(hicr & E1000_HICR_C))
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break;
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msec_delay_irq(1);
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}
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if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
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DEBUGOUT("Previous command timeout failed .\n");
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ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
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goto out;
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}
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out:
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return ret_val;
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}
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/**
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2008-02-29 21:50:11 +00:00
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* e1000_check_mng_mode_generic - Generic check management mode
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2007-05-16 00:14:23 +00:00
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* @hw: pointer to the HW structure
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2007-05-04 00:00:12 +00:00
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*
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2008-04-02 22:00:36 +00:00
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* Reads the firmware semaphore register and returns TRUE (>0) if
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* manageability is enabled, else FALSE (0).
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2007-05-04 00:00:12 +00:00
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**/
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2007-11-20 21:41:22 +00:00
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bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
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2007-05-04 00:00:12 +00:00
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{
|
2010-01-26 22:32:22 +00:00
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u32 fwsm = E1000_READ_REG(hw, E1000_FWSM);
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2007-05-04 00:00:12 +00:00
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DEBUGFUNC("e1000_check_mng_mode_generic");
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2008-11-26 23:57:23 +00:00
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return (fwsm & E1000_FWSM_MODE_MASK) ==
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(E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
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2007-05-04 00:00:12 +00:00
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}
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/**
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2009-12-08 01:07:44 +00:00
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* e1000_enable_tx_pkt_filtering_generic - Enable packet filtering on Tx
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2007-05-16 00:14:23 +00:00
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* @hw: pointer to the HW structure
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2007-05-04 00:00:12 +00:00
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*
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* Enables packet filtering on transmit packets if manageability is enabled
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* and host interface is enabled.
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**/
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2007-11-20 21:41:22 +00:00
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bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
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2007-05-04 00:00:12 +00:00
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{
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struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
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u32 *buffer = (u32 *)&hw->mng_cookie;
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u32 offset;
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s32 ret_val, hdr_csum, csum;
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u8 i, len;
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DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic");
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2010-01-26 22:32:22 +00:00
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hw->mac.tx_pkt_filtering = TRUE;
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2007-05-04 00:00:12 +00:00
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/* No manageability, no filtering */
|
2008-04-02 22:00:36 +00:00
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if (!hw->mac.ops.check_mng_mode(hw)) {
|
2010-01-26 22:32:22 +00:00
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hw->mac.tx_pkt_filtering = FALSE;
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2007-05-04 00:00:12 +00:00
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goto out;
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}
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2007-11-20 21:41:22 +00:00
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/*
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* If we can't read from the host interface for whatever
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2007-05-04 00:00:12 +00:00
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* reason, disable filtering.
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*/
|
2008-04-02 22:00:36 +00:00
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ret_val = hw->mac.ops.mng_enable_host_if(hw);
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2007-05-04 00:00:12 +00:00
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|
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if (ret_val != E1000_SUCCESS) {
|
2010-01-26 22:32:22 +00:00
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hw->mac.tx_pkt_filtering = FALSE;
|
2007-05-04 00:00:12 +00:00
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goto out;
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}
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/* Read in the header. Length and offset are in dwords. */
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len = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
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offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
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2009-12-08 01:07:44 +00:00
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for (i = 0; i < len; i++)
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*(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF,
|
2008-02-29 21:50:11 +00:00
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offset + i);
|
2007-05-04 00:00:12 +00:00
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hdr_csum = hdr->checksum;
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hdr->checksum = 0;
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csum = e1000_calculate_checksum((u8 *)hdr,
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E1000_MNG_DHCP_COOKIE_LENGTH);
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2007-11-20 21:41:22 +00:00
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/*
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* If either the checksums or signature don't match, then
|
2007-05-04 00:00:12 +00:00
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* the cookie area isn't considered valid, in which case we
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* take the safe route of assuming Tx filtering is enabled.
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*/
|
2010-01-26 22:32:22 +00:00
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if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) {
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hw->mac.tx_pkt_filtering = TRUE;
|
2007-05-04 00:00:12 +00:00
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goto out;
|
2010-01-26 22:32:22 +00:00
|
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|
}
|
2007-05-04 00:00:12 +00:00
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|
|
/* Cookie area is valid, make the final check for filtering. */
|
2010-01-26 22:32:22 +00:00
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|
if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING)) {
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|
hw->mac.tx_pkt_filtering = FALSE;
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goto out;
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}
|
2007-05-04 00:00:12 +00:00
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out:
|
2010-01-26 22:32:22 +00:00
|
|
|
return hw->mac.tx_pkt_filtering;
|
2007-05-04 00:00:12 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* e1000_mng_write_dhcp_info_generic - Writes DHCP info to host interface
|
2007-05-16 00:14:23 +00:00
|
|
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* @hw: pointer to the HW structure
|
|
|
|
* @buffer: pointer to the host interface
|
|
|
|
* @length: size of the buffer
|
2007-05-04 00:00:12 +00:00
|
|
|
*
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|
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|
* Writes the DHCP information to the host interface.
|
|
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|
**/
|
2008-11-26 23:57:23 +00:00
|
|
|
s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw, u8 *buffer,
|
2007-11-20 21:41:22 +00:00
|
|
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u16 length)
|
2007-05-04 00:00:12 +00:00
|
|
|
{
|
|
|
|
struct e1000_host_mng_command_header hdr;
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|
|
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s32 ret_val;
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u32 hicr;
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|
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DEBUGFUNC("e1000_mng_write_dhcp_info_generic");
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|
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|
hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
|
|
|
|
hdr.command_length = length;
|
|
|
|
hdr.reserved1 = 0;
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|
|
|
hdr.reserved2 = 0;
|
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|
|
hdr.checksum = 0;
|
|
|
|
|
|
|
|
/* Enable the host interface */
|
2008-04-02 22:00:36 +00:00
|
|
|
ret_val = hw->mac.ops.mng_enable_host_if(hw);
|
2007-05-04 00:00:12 +00:00
|
|
|
if (ret_val)
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|
goto out;
|
|
|
|
|
|
|
|
/* Populate the host interface with the contents of "buffer". */
|
2008-04-02 22:00:36 +00:00
|
|
|
ret_val = hw->mac.ops.mng_host_if_write(hw, buffer, length,
|
2007-05-04 00:00:12 +00:00
|
|
|
sizeof(hdr), &(hdr.checksum));
|
|
|
|
if (ret_val)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
/* Write the manageability command header */
|
2008-04-02 22:00:36 +00:00
|
|
|
ret_val = hw->mac.ops.mng_write_cmd_header(hw, &hdr);
|
2007-05-04 00:00:12 +00:00
|
|
|
if (ret_val)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
/* Tell the ARC a new command is pending. */
|
|
|
|
hicr = E1000_READ_REG(hw, E1000_HICR);
|
|
|
|
E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
|
|
|
|
|
|
|
|
out:
|
|
|
|
return ret_val;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* e1000_mng_write_cmd_header_generic - Writes manageability command header
|
2007-05-16 00:14:23 +00:00
|
|
|
* @hw: pointer to the HW structure
|
|
|
|
* @hdr: pointer to the host interface command header
|
2007-05-04 00:00:12 +00:00
|
|
|
*
|
|
|
|
* Writes the command header after does the checksum calculation.
|
|
|
|
**/
|
2008-11-26 23:57:23 +00:00
|
|
|
s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
|
|
|
|
struct e1000_host_mng_command_header *hdr)
|
2007-05-04 00:00:12 +00:00
|
|
|
{
|
|
|
|
u16 i, length = sizeof(struct e1000_host_mng_command_header);
|
|
|
|
|
|
|
|
DEBUGFUNC("e1000_mng_write_cmd_header_generic");
|
|
|
|
|
|
|
|
/* Write the whole command header structure with new checksum. */
|
|
|
|
|
|
|
|
hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length);
|
|
|
|
|
|
|
|
length >>= 2;
|
|
|
|
/* Write the relevant command block into the ram area. */
|
|
|
|
for (i = 0; i < length; i++) {
|
2007-11-20 21:41:22 +00:00
|
|
|
E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
|
|
|
|
*((u32 *) hdr + i));
|
2007-05-04 00:00:12 +00:00
|
|
|
E1000_WRITE_FLUSH(hw);
|
|
|
|
}
|
|
|
|
|
|
|
|
return E1000_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2008-02-29 21:50:11 +00:00
|
|
|
* e1000_mng_host_if_write_generic - Write to the manageability host interface
|
2007-05-16 00:14:23 +00:00
|
|
|
* @hw: pointer to the HW structure
|
|
|
|
* @buffer: pointer to the host interface buffer
|
|
|
|
* @length: size of the buffer
|
|
|
|
* @offset: location in the buffer to write to
|
|
|
|
* @sum: sum of the data (not checksum)
|
2007-05-04 00:00:12 +00:00
|
|
|
*
|
|
|
|
* This function writes the buffer content at the offset given on the host if.
|
|
|
|
* It also does alignment considerations to do the writes in most efficient
|
|
|
|
* way. Also fills up the sum of the buffer in *buffer parameter.
|
|
|
|
**/
|
2008-11-26 23:57:23 +00:00
|
|
|
s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
|
2007-11-20 21:41:22 +00:00
|
|
|
u16 length, u16 offset, u8 *sum)
|
2007-05-04 00:00:12 +00:00
|
|
|
{
|
|
|
|
u8 *tmp;
|
|
|
|
u8 *bufptr = buffer;
|
|
|
|
u32 data = 0;
|
|
|
|
s32 ret_val = E1000_SUCCESS;
|
|
|
|
u16 remaining, i, j, prev_bytes;
|
|
|
|
|
|
|
|
DEBUGFUNC("e1000_mng_host_if_write_generic");
|
|
|
|
|
|
|
|
/* sum = only sum of the data and it is not checksum */
|
|
|
|
|
|
|
|
if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) {
|
|
|
|
ret_val = -E1000_ERR_PARAM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
tmp = (u8 *)&data;
|
|
|
|
prev_bytes = offset & 0x3;
|
|
|
|
offset >>= 2;
|
|
|
|
|
|
|
|
if (prev_bytes) {
|
|
|
|
data = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset);
|
|
|
|
for (j = prev_bytes; j < sizeof(u32); j++) {
|
|
|
|
*(tmp + j) = *bufptr++;
|
|
|
|
*sum += *(tmp + j);
|
|
|
|
}
|
|
|
|
E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset, data);
|
|
|
|
length -= j - prev_bytes;
|
|
|
|
offset++;
|
|
|
|
}
|
|
|
|
|
|
|
|
remaining = length & 0x3;
|
|
|
|
length -= remaining;
|
|
|
|
|
|
|
|
/* Calculate length in DWORDs */
|
|
|
|
length >>= 2;
|
|
|
|
|
2007-11-20 21:41:22 +00:00
|
|
|
/*
|
|
|
|
* The device driver writes the relevant command block into the
|
|
|
|
* ram area.
|
|
|
|
*/
|
2007-05-04 00:00:12 +00:00
|
|
|
for (i = 0; i < length; i++) {
|
|
|
|
for (j = 0; j < sizeof(u32); j++) {
|
|
|
|
*(tmp + j) = *bufptr++;
|
|
|
|
*sum += *(tmp + j);
|
|
|
|
}
|
|
|
|
|
2008-11-26 23:57:23 +00:00
|
|
|
E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,
|
|
|
|
data);
|
2007-05-04 00:00:12 +00:00
|
|
|
}
|
|
|
|
if (remaining) {
|
|
|
|
for (j = 0; j < sizeof(u32); j++) {
|
|
|
|
if (j < remaining)
|
|
|
|
*(tmp + j) = *bufptr++;
|
|
|
|
else
|
|
|
|
*(tmp + j) = 0;
|
|
|
|
|
|
|
|
*sum += *(tmp + j);
|
|
|
|
}
|
|
|
|
E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i, data);
|
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
|
|
|
return ret_val;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2010-01-26 22:32:22 +00:00
|
|
|
* e1000_enable_mng_pass_thru - Check if management passthrough is needed
|
2007-05-16 00:14:23 +00:00
|
|
|
* @hw: pointer to the HW structure
|
2007-05-04 00:00:12 +00:00
|
|
|
*
|
2010-01-26 22:32:22 +00:00
|
|
|
* Verifies the hardware needs to leave interface enabled so that frames can
|
|
|
|
* be directed to and from the management interface.
|
2007-05-04 00:00:12 +00:00
|
|
|
**/
|
2007-11-20 21:41:22 +00:00
|
|
|
bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
|
2007-05-04 00:00:12 +00:00
|
|
|
{
|
|
|
|
u32 manc;
|
|
|
|
u32 fwsm, factps;
|
2007-11-20 21:41:22 +00:00
|
|
|
bool ret_val = FALSE;
|
2007-05-04 00:00:12 +00:00
|
|
|
|
|
|
|
DEBUGFUNC("e1000_enable_mng_pass_thru");
|
|
|
|
|
|
|
|
if (!hw->mac.asf_firmware_present)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
manc = E1000_READ_REG(hw, E1000_MANC);
|
|
|
|
|
2010-01-26 22:32:22 +00:00
|
|
|
if (!(manc & E1000_MANC_RCV_TCO_EN))
|
2007-05-04 00:00:12 +00:00
|
|
|
goto out;
|
|
|
|
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
if (hw->mac.has_fwsm) {
|
2007-05-04 00:00:12 +00:00
|
|
|
fwsm = E1000_READ_REG(hw, E1000_FWSM);
|
|
|
|
factps = E1000_READ_REG(hw, E1000_FACTPS);
|
|
|
|
|
|
|
|
if (!(factps & E1000_FACTPS_MNGCG) &&
|
|
|
|
((fwsm & E1000_FWSM_MODE_MASK) ==
|
|
|
|
(e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) {
|
|
|
|
ret_val = TRUE;
|
|
|
|
goto out;
|
|
|
|
}
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
} else if ((hw->mac.type == e1000_82574) ||
|
|
|
|
(hw->mac.type == e1000_82583)) {
|
|
|
|
u16 data;
|
|
|
|
|
|
|
|
factps = E1000_READ_REG(hw, E1000_FACTPS);
|
|
|
|
e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
|
|
|
|
|
|
|
|
if (!(factps & E1000_FACTPS_MNGCG) &&
|
|
|
|
((data & E1000_NVM_INIT_CTRL2_MNGM) ==
|
|
|
|
(e1000_mng_mode_pt << 13))) {
|
2007-05-04 00:00:12 +00:00
|
|
|
ret_val = TRUE;
|
|
|
|
goto out;
|
|
|
|
}
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
} else if ((manc & E1000_MANC_SMBUS_EN) &&
|
|
|
|
!(manc & E1000_MANC_ASF_EN)) {
|
|
|
|
ret_val = TRUE;
|
|
|
|
goto out;
|
2007-11-20 21:41:22 +00:00
|
|
|
}
|
2007-05-04 00:00:12 +00:00
|
|
|
|
|
|
|
out:
|
|
|
|
return ret_val;
|
|
|
|
}
|
|
|
|
|