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freebsd-skq/sys/i386/isa/npx.c

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Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*-
* Copyright (c) 1990 William Jolitz.
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
ALL: Removed patch kit headers and rcsid strings, add $Id$. isa.c: Removed old #ifdef notyet isa_configure code, since it will never be used, and I have done 90% of what it attempted to. Add conflict checking code that searchs back through the devtab's looking for any device that has already been found that may conflict with what we are about to probe. Checks are mode for I/O address, memory address, IRQ, and DRQ. This should stop the screwing up of any device that has alread been found by other device probes. Print out messages when we are not going to probe a device due to a conflict so the user knows WHY something was not found. For example: aha0 not probed due to irq conflict with ahb0 at 11 Now print out a message when a device is not found so the user knows that it was probed for, but could not be found. For example: ed1 not found at 0x320 For devices that have I/O address < 0x100 say that they are on the motherboard, not on isa! The 0x100 magic number is per ISA spec. It may seem funny that pc0 and sc0 report as being on the motherboard, but this is due to the fact that the I/O address used is that of the keyboard controller which IS on the motherboard. We really need to split the keyboard probe from the display probe. It is completly legal to build a pc with out one or the other, or even with out both! npx.c: Return -1 from the probe routine if we are using the Emulator so that the i/o addresses are not printed, this is the same trick used for 486's. Do not print the ``Errors reported via Exception 16'', and ``Errors reported via IRQ 13'' messages any more, since these just lead to more user confusion that anything. It still prints the message ``Error reporting broken, using 387 emulator'' so that the person is aware that there mother board is ill.
1993-10-13 15:59:30 +00:00
* from: @(#)npx.c 7.2 (Berkeley) 5/12/91
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
Use __FBSDID().
2003-06-02 16:32:55 +00:00
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
#include "opt_cpu.h"
Don't include <isa/isavar.h> or compile code depending on it when isa is not configured. Including <isa/isavar.h> when it is not used is harmful as well as bogus, since it includes "isa_if.h" which is not generated when isa is not configured. This was fixed in 1999 but was broken by unconditionalizing PNPBIOS.
2002-01-30 12:41:12 +00:00
#include "opt_isa.h"
MFpc98: all changes in sys/pc98/pc98/npx.c related to FPU_ERROR_BROKEN. - 1.58 (2000/09/01; author: kato) Fixed FPU_ERROR_BROKEN code. It had old-isa code. - 1.33 (1998/03/09; author: kato) Make FPU_ERROR_BROKEN a new-style option. - 1.7 (1996/10/09; author: asami) Make sure FPU is recognized for non-Intel CPUs. The log for rev.1.7 should have said something like: Added FPU_ERROR_BROKEN option. This forces a successful probe for exception 16, so that hardware with a broken FPU error signal can sort of work.
2001-10-21 05:18:30 +00:00
#include "opt_npx.h"
convert the math emulation to use the new-style options.
1996-01-04 19:51:50 +00:00
Change all #includes to follow the current Berkeley style. Some of these ``changes'' are actually not changes at all, but CVS sometimes has trouble telling the difference. This also includes support for second-directory compiles. This is not quite complete yet, as `config' doesn't yet do the right thing. You can still make it work trivially, however, by doing the following: rm /sys/compile mkdir /usr/obj/sys/compile ln -s M-. /sys/compile cd /sys/i386/conf config MYKERNEL cd ../../compile/MYKERNEL ln -s /sys @ rm machine ln -s @/i386/include machine make depend make
1994-08-13 03:50:34 +00:00
#include <sys/param.h>
#include <sys/systm.h>
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
#include <sys/bus.h>
Sorry, the last commit screwed up for me, this is the right one (I hope!) Please refer to the previous commit message about sysctl variables.
1995-10-28 13:07:28 +00:00
#include <sys/kernel.h>
Undo part of the tangle of having sys/lock.h and sys/mutex.h included in other "system" header files. Also help the deprecation of lockmgr.h by making it a sub-include of sys/lock.h and removing sys/lockmgr.h form kernel .c files. Sort sys/*.h includes where possible in affected files. OK'ed by: bde (with reservations)
2001-05-01 08:13:21 +00:00
#include <sys/lock.h>
Only use the i586-optimized copying and zeroing functions if they are actually faster (more than 20% faster for zeroing 1 MB at boot time). This fixes pessimized copying and zeroing on K6's and perhaps on other CPUs that are misclassified as i586's.
1998-02-12 21:41:10 +00:00
#include <sys/malloc.h>
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
#include <sys/module.h>
- Make npx_intr INTR_MPSAFE and move acquiring Giant into the function itself. - Remove a hack to allow acquiring Giant from the npx asm trap vector.
2001-01-20 02:30:58 +00:00
#include <sys/mutex.h>
Undo part of the tangle of having sys/lock.h and sys/mutex.h included in other "system" header files. Also help the deprecation of lockmgr.h by making it a sub-include of sys/lock.h and removing sys/lockmgr.h form kernel .c files. Sort sys/*.h includes where possible in affected files. OK'ed by: bde (with reservations)
2001-05-01 08:13:21 +00:00
#include <sys/mutex.h>
#include <sys/proc.h>
New APIC support code: - The apic interrupt entry points have been rewritten so that each entry point can serve 32 different vectors. When the entry is executed, it uses one of the 32-bit ISR registers to determine which vector in its assigned range was triggered. Thus, the apic code can support 159 different interrupt vectors with only 5 entry points. - We now always to disable the local APIC to work around an errata in certain PPros and then re-enable it again if we decide to use the APICs to route interrupts. - We no longer map IO APICs or local APICs using special page table entries. Instead, we just use pmap_mapdev(). We also no longer export the virtual address of the local APIC as a global symbol to the rest of the system, but only in local_apic.c. To aid this, the APIC ID of each CPU is exported as a per-CPU variable. - Interrupt sources are provided for each intpin on each IO APIC. Currently, each source is given a unique interrupt vector meaning that PCI interrupts are not shared on most machines with an I/O APIC. That mapping for interrupt sources to interrupt vectors is up to the APIC enumerator driver however. - We no longer probe to see if we need to use mixed mode to route IRQ 0, instead we always use mixed mode to route IRQ 0 for now. This can be disabled via the 'NO_MIXED_MODE' kernel option. - The npx(4) driver now always probes to see if a built-in FPU is present since this test can now be performed with the new APIC code. However, an SMP kernel will panic if there is more than one CPU and a built-in FPU is not found. - PCI interrupts are now properly routed when using APICs to route interrupts, so remove the hack to psuedo-route interrupts when the intpin register was read. - The apic.h header was moved to apicreg.h and a new apicvar.h header that declares the APIs used by the new APIC code was added.
2003-11-03 21:53:38 +00:00
#include <sys/smp.h>
Undo part of the tangle of having sys/lock.h and sys/mutex.h included in other "system" header files. Also help the deprecation of lockmgr.h by making it a sub-include of sys/lock.h and removing sys/lockmgr.h form kernel .c files. Sort sys/*.h includes where possible in affected files. OK'ed by: bde (with reservations)
2001-05-01 08:13:21 +00:00
#include <sys/sysctl.h>
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
#include <machine/bus.h>
#include <sys/rman.h>
Disabled logging of masked exceptions on exit. Keep the side effect of saving the state (see rev.1.17).
1997-01-29 13:46:28 +00:00
#ifdef NPX_DEBUG
Log processes that exit with an masked npx exception that would trap with the current default exception (un)mask. There should be no such processes unless you change the mask. Someday the mask should be changed to the IEEE default of everything masked. The npx state gets saved so that it can be checked and this may have the side effect of fixing a bug that was reported for 1.1.5. (npx exceptions may sometimes leak across exits and clobber another process. I can't see how this can happen.) Get some missing/wrong declarations from headers now that the headers have them.
1994-11-14 14:59:06 +00:00
#include <sys/syslog.h>
Disabled logging of masked exceptions on exit. Keep the side effect of saving the state (see rev.1.17).
1997-01-29 13:46:28 +00:00
#endif
Log processes that exit with an masked npx exception that would trap with the current default exception (un)mask. There should be no such processes unless you change the mask. Someday the mask should be changed to the IEEE default of everything masked. The npx state gets saved so that it can be checked and this may have the side effect of fixing a bug that was reported for 1.1.5. (npx exceptions may sometimes leak across exits and clobber another process. I can't see how this can happen.) Get some missing/wrong declarations from headers now that the headers have them.
1994-11-14 14:59:06 +00:00
#include <sys/signalvar.h>
Finished device configuration database work for all ISA devices (except `ze') and all SCSI devices (except that it's not done quite the way I want). New information added includes: - A text description of the device - A ``state''---unknown, unconfigured, idle, or busy - A generic parent device (with support in the m.i. code) - An interrupt mask type field (which will hopefully go away) so that . ``doconfig'' can be written This requires a new version of the `lsdev' program as well (next commit).
1994-10-23 21:28:03 +00:00
Make the necessary changes so that an ELF kernel can be built. I have successfully built, booted, and run a number of different ELF kernel configurations, including GENERIC. LINT also builds and links cleanly, though I have not tried to boot it. The impact on developers is virtually nil, except for two things. All linker sets that might possibly be present in the kernel must be listed in "sys/i386/i386/setdefs.h". And all C symbols that are also referenced from assembly language code must be listed in "sys/i386/include/asnames.h". It so happens that failure to do these things will have no impact on the a.out kernel. But it will break the build of the ELF kernel. The ELF bootloader works, but it is not ready to commit quite yet.
1997-04-22 06:55:47 +00:00
#include <machine/asmacros.h>
Don't include <machine/cputypes.h> or declare cputype/class interfaces in <machine/cpu.h>. Moved the declarations to <machine/cputypes.h>. Fixed style bugs in the moved code. Fixed everything that depended on the nested include. Don't include <machine/cpu.h> (in the changed files) unless something in it is used directly.
1997-10-28 11:43:57 +00:00
#include <machine/cputypes.h>
#include <machine/frame.h>
Added #include of <machine/md_var.h>. This will be needed when some declarations are moved from <machine/cpufunc.h> to better places.
1996-06-25 20:31:01 +00:00
#include <machine/md_var.h>
Include file updates.. <machine/spl.h> -> <machine/ipl.h>, add <machine/ipl.h> to those files that were depending on getting SWI_* implicitly via <machine/cpufunc.h>
1997-05-31 09:27:31 +00:00
#include <machine/pcb.h>
Don't include <machine/cputypes.h> or declare cputype/class interfaces in <machine/cpu.h>. Moved the declarations to <machine/cputypes.h>. Fixed style bugs in the moved code. Fixed everything that depended on the nested include. Don't include <machine/cpu.h> (in the changed files) unless something in it is used directly.
1997-10-28 11:43:57 +00:00
#include <machine/psl.h>
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
#include <machine/resource.h>
Change all #includes to follow the current Berkeley style. Some of these ``changes'' are actually not changes at all, but CVS sometimes has trouble telling the difference. This also includes support for second-directory compiles. This is not quite complete yet, as `config' doesn't yet do the right thing. You can still make it work trivially, however, by doing the following: rm /sys/compile mkdir /usr/obj/sys/compile ln -s M-. /sys/compile cd /sys/i386/conf config MYKERNEL cd ../../compile/MYKERNEL ln -s /sys @ rm machine ln -s @/i386/include machine make depend make
1994-08-13 03:50:34 +00:00
#include <machine/specialreg.h>
Don't include <machine/cputypes.h> or declare cputype/class interfaces in <machine/cpu.h>. Moved the declarations to <machine/cputypes.h>. Fixed style bugs in the moved code. Fixed everything that depended on the nested include. Don't include <machine/cpu.h> (in the changed files) unless something in it is used directly.
1997-10-28 11:43:57 +00:00
#include <machine/segments.h>
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
#include <machine/ucontext.h>
Finished device configuration database work for all ISA devices (except `ze') and all SCSI devices (except that it's not done quite the way I want). New information added includes: - A text description of the device - A ``state''---unknown, unconfigured, idle, or busy - A generic parent device (with support in the m.i. code) - An interrupt mask type field (which will hopefully go away) so that . ``doconfig'' can be written This requires a new version of the `lsdev' program as well (next commit).
1994-10-23 21:28:03 +00:00
New APIC support code: - The apic interrupt entry points have been rewritten so that each entry point can serve 32 different vectors. When the entry is executed, it uses one of the 32-bit ISR registers to determine which vector in its assigned range was triggered. Thus, the apic code can support 159 different interrupt vectors with only 5 entry points. - We now always to disable the local APIC to work around an errata in certain PPros and then re-enable it again if we decide to use the APICs to route interrupts. - We no longer map IO APICs or local APICs using special page table entries. Instead, we just use pmap_mapdev(). We also no longer export the virtual address of the local APIC as a global symbol to the rest of the system, but only in local_apic.c. To aid this, the APIC ID of each CPU is exported as a per-CPU variable. - Interrupt sources are provided for each intpin on each IO APIC. Currently, each source is given a unique interrupt vector meaning that PCI interrupts are not shared on most machines with an I/O APIC. That mapping for interrupt sources to interrupt vectors is up to the APIC enumerator driver however. - We no longer probe to see if we need to use mixed mode to route IRQ 0, instead we always use mixed mode to route IRQ 0 for now. This can be disabled via the 'NO_MIXED_MODE' kernel option. - The npx(4) driver now always probes to see if a built-in FPU is present since this test can now be performed with the new APIC code. However, an SMP kernel will panic if there is more than one CPU and a built-in FPU is not found. - PCI interrupts are now properly routed when using APICs to route interrupts, so remove the hack to psuedo-route interrupts when the intpin register was read. - The apic.h header was moved to apicreg.h and a new apicvar.h header that declares the APIs used by the new APIC code was added.
2003-11-03 21:53:38 +00:00
#include <machine/intr_machdep.h>
Don't include <isa/isavar.h> or compile code depending on it when isa is not configured. Including <isa/isavar.h> when it is not used is harmful as well as bogus, since it includes "isa_if.h" which is not generated when isa is not configured. This was fixed in 1999 but was broken by unconditionalizing PNPBIOS.
2002-01-30 12:41:12 +00:00
#ifdef DEV_ISA
Add a little do-nothing ``slopsucker'' device which gives a home to PNP0c04 (legacy ISA coprocessor support). Tourist info.
2000-05-04 23:57:32 +00:00
#include <isa/isavar.h>
Don't include <isa/isavar.h> or compile code depending on it when isa is not configured. Including <isa/isavar.h> when it is not used is harmful as well as bogus, since it includes "isa_if.h" which is not generated when isa is not configured. This was fixed in 1999 but was broken by unconditionalizing PNPBIOS.
2002-01-30 12:41:12 +00:00
#endif
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
Remove the CPU_ENABLE_SSE option from the i386 and pc98 architectures, as they are already default for I686_CPU for almost 3 years, and CPU_DISABLE_SSE always disables it. On the other hand, CPU_ENABLE_SSE does not work for I486_CPU and I586_CPU. This commit has: - Removed the option from conf/options.* - Removed the option and comments from MD NOTES files - Simplified the CPU_ENABLE_SSE ifdef's so they don't deal with CPU_ENABLE_SSE from kernel configuration. (*) For most users, this commit should be largely no-op. If you used to place CPU_ENABLE_SSE into your kernel configuration for some reason, it is time to remove it. (*) The ifdef's of CPU_ENABLE_SSE are not removed at this point, since we need to change it to !defined(CPU_DISABLE_SSE) && defined(I686_CPU), not just !defined(CPU_DISABLE_SSE), if we really want to do so. Discussed on: -arch Approved by: re (scottl)
2005-07-02 20:06:44 +00:00
#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
Automatically enable CPU_ENABLE_SSE (detect and enable SSE instructions) if compiling with I686_CPU as a target. CPU_DISABLE_SSE will prevent this from happening and will guarantee the code is not compiled in. I am still not happy with this, but gcc is now generating code that uses these instructions if you set CPUTYPE to p3/p4 or athlon-4/mp/xp or higher.
2002-09-07 07:02:12 +00:00
#define CPU_ENABLE_SSE
#endif
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
* 387 and 287 Numeric Coprocessor Extension (NPX) Driver.
*/
Replaced I586_OPTIMIZED_BCOPY and I586_OPTIMIZED_BZERO with boot-time negative-logic flags (flags 0x01 and 0x02 for npx0, defaulting to unset = on). This changes the default from off to on. The options have been in current for several months with no problems reported. Added a boot-time negative-logic flag for the old I5886_FAST_BCOPY option which went away too soon (flag 0x04 for npx0, defaulting to unset = on). Added a boot-time way to set the memory size (iosiz in config, iosize in userconfig for npx0). LINT: Removed old options. Documented npx0's flags and iosiz. options.i386: Removed old options. identcpu.c: Don't set the function pointers here. Setting them has to be delayed until after userconfig has had a chance to disable them and until after a good npx0 has been detected. machdep.c: Use npx0's iosize instead of MAXMEM if it is nonzero. support.s: Added vectors and glue code for copyin() and copyout(). Fixed ifdefs for i586_bzero(). Added ifdefs for i586_bcopy(). npx.c: Set the function pointers here. Clear hw_float when an npx exists but is too broken to use. Restored style from a year or three ago in npxattach().
1996-11-11 20:39:03 +00:00
/* Configuration flags. */
#define NPX_DISABLE_I586_OPTIMIZED_BCOPY (1 << 0)
#define NPX_DISABLE_I586_OPTIMIZED_BZERO (1 << 1)
#define NPX_DISABLE_I586_OPTIMIZED_COPYIO (1 << 2)
netchild's mega-patch to isolate compiler dependencies into a central place. This moves the dependency on GCC's and other compiler's features into the central sys/cdefs.h file, while the individual source files can then refer to #ifdef __COMPILER_FEATURE_FOO where they by now used to refer to #if __GNUC__ > 3.1415 && __BARC__ <= 42. By now, GCC and ICC (the Intel compiler) have been actively tested on IA32 platforms by netchild. Extension to other compilers is supposed to be possible, of course. Submitted by: netchild Reviewed by: various developers on arch@, some time ago
2005-03-02 21:33:29 +00:00
#if defined(__GNUCLIKE_ASM) && !defined(lint)
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
#define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr)))
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
#define fnclex() __asm("fnclex")
#define fninit() __asm("fninit")
Finish supporting compiling with `gcc -ansi'. Fix missing `volatile's in __asm() statements while I'm here.
1998-04-15 18:58:09 +00:00
#define fnsave(addr) __asm __volatile("fnsave %0" : "=m" (*(addr)))
#define fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr)))
#define fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr)))
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
#define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop")
#define frstor(addr) __asm("frstor %0" : : "m" (*(addr)))
Dont compile in SSE fxsave/fxrstor instructions if CPU_ENABLE_SSE isn't active.
2001-08-23 01:03:56 +00:00
#ifdef CPU_ENABLE_SSE
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
#define fxrstor(addr) __asm("fxrstor %0" : : "m" (*(addr)))
#define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
Initialize the mxcsr properly, so the initial value in a process isn't just the value that was left over from some other application.
2005-03-17 22:21:36 +00:00
#define ldmxcsr(__csr) __asm __volatile("ldmxcsr %0" : : "m" (__csr))
Dont compile in SSE fxsave/fxrstor instructions if CPU_ENABLE_SSE isn't active.
2001-08-23 01:03:56 +00:00
#endif
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \
: : "n" (CR0_TS) : "ax")
#define stop_emulating() __asm("clts")
netchild's mega-patch to isolate compiler dependencies into a central place. This moves the dependency on GCC's and other compiler's features into the central sys/cdefs.h file, while the individual source files can then refer to #ifdef __COMPILER_FEATURE_FOO where they by now used to refer to #if __GNUC__ > 3.1415 && __BARC__ <= 42. By now, GCC and ICC (the Intel compiler) have been actively tested on IA32 platforms by netchild. Extension to other compilers is supposed to be possible, of course. Submitted by: netchild Reviewed by: various developers on arch@, some time ago
2005-03-02 21:33:29 +00:00
#else /* !(__GNUCLIKE_ASM && !lint) */
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
Fixed some style bugs in the removal of __P(()). The main ones were not removing tabs before "__P((", and not outdenting continuation lines to preserve non-KNF lining up of code with parentheses. Switch to KNF formatting and/or rewrap the whole prototype in some cases.
2002-03-23 16:01:49 +00:00
void fldcw(caddr_t addr);
void fnclex(void);
void fninit(void);
void fnsave(caddr_t addr);
void fnstcw(caddr_t addr);
void fnstsw(caddr_t addr);
void fp_divide_by_0(void);
void frstor(caddr_t addr);
Dont compile in SSE fxsave/fxrstor instructions if CPU_ENABLE_SSE isn't active.
2001-08-23 01:03:56 +00:00
#ifdef CPU_ENABLE_SSE
Fixed some style bugs in the removal of __P(()). The main ones were not removing tabs before "__P((", and not outdenting continuation lines to preserve non-KNF lining up of code with parentheses. Switch to KNF formatting and/or rewrap the whole prototype in some cases.
2002-03-23 16:01:49 +00:00
void fxsave(caddr_t addr);
void fxrstor(caddr_t addr);
Dont compile in SSE fxsave/fxrstor instructions if CPU_ENABLE_SSE isn't active.
2001-08-23 01:03:56 +00:00
#endif
Fixed some style bugs in the removal of __P(()). The main ones were not removing tabs before "__P((", and not outdenting continuation lines to preserve non-KNF lining up of code with parentheses. Switch to KNF formatting and/or rewrap the whole prototype in some cases.
2002-03-23 16:01:49 +00:00
void start_emulating(void);
void stop_emulating(void);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
netchild's mega-patch to isolate compiler dependencies into a central place. This moves the dependency on GCC's and other compiler's features into the central sys/cdefs.h file, while the individual source files can then refer to #ifdef __COMPILER_FEATURE_FOO where they by now used to refer to #if __GNUC__ > 3.1415 && __BARC__ <= 42. By now, GCC and ICC (the Intel compiler) have been actively tested on IA32 platforms by netchild. Extension to other compilers is supposed to be possible, of course. Submitted by: netchild Reviewed by: various developers on arch@, some time ago
2005-03-02 21:33:29 +00:00
#endif /* __GNUCLIKE_ASM && !lint */
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
#ifdef CPU_ENABLE_SSE
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
#define GET_FPU_CW(thread) \
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
(cpu_fxsr ? \
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
(thread)->td_pcb->pcb_save.sv_xmm.sv_env.en_cw : \
(thread)->td_pcb->pcb_save.sv_87.sv_env.en_cw)
#define GET_FPU_SW(thread) \
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
(cpu_fxsr ? \
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
(thread)->td_pcb->pcb_save.sv_xmm.sv_env.en_sw : \
(thread)->td_pcb->pcb_save.sv_87.sv_env.en_sw)
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
#else /* CPU_ENABLE_SSE */
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
#define GET_FPU_CW(thread) \
(thread->td_pcb->pcb_save.sv_87.sv_env.en_cw)
#define GET_FPU_SW(thread) \
(thread->td_pcb->pcb_save.sv_87.sv_env.en_sw)
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
#endif /* CPU_ENABLE_SSE */
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
typedef u_char bool_t;
Correct a local information leakage bug affecting AMD FPUs. Security: FreeBSD-SA-06:14.fpu
2006-04-19 07:00:19 +00:00
#ifdef CPU_ENABLE_SSE
static void fpu_clean_state(void);
#endif
Add getcontext, setcontext, and swapcontext as system calls. Previously these were libc functions but were requested to be made into system calls for atomicity and to coalesce what might be two entrances into the kernel (signal mask setting and floating point trap) into one. A few style nits and comments from bde are also included. Tested on alpha by: gallatin
2002-11-16 06:35:53 +00:00
static void fpusave(union savefpu *);
static void fpurstor(union savefpu *);
Fixed some style bugs in the removal of __P(()). The main ones were not removing tabs before "__P((", and not outdenting continuation lines to preserve non-KNF lining up of code with parentheses. Switch to KNF formatting and/or rewrap the whole prototype in some cases.
2002-03-23 16:01:49 +00:00
static int npx_attach(device_t dev);
static void npx_identify(driver_t *driver, device_t parent);
static void npx_intr(void *);
static int npx_probe(device_t dev);
Fix warnings: 908: warning: long unsigned int format, unsigned int arg (arg 3) 887: warning: `timezero' defined but not used
2001-06-15 07:53:20 +00:00
#ifdef I586_CPU_XXX
Fixed some style bugs in the removal of __P(()). The main ones were not removing tabs before "__P((", and not outdenting continuation lines to preserve non-KNF lining up of code with parentheses. Switch to KNF formatting and/or rewrap the whole prototype in some cases.
2002-03-23 16:01:49 +00:00
static long timezero(const char *funcname,
void (*func)(void *buf, size_t len));
Ifdef declaration of a conditionally defined function "timezero".
1999-03-28 23:28:18 +00:00
#endif /* I586_CPU */
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
int hw_float; /* XXX currently just alias for npx_exists */
Sorry, the last commit screwed up for me, this is the right one (I hope!) Please refer to the previous commit message about sysctl variables.
1995-10-28 13:07:28 +00:00
SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint,
CTLFLAG_RD, &hw_float, 0,
"Floatingpoint instructions executed in hardware");
The "easy" fixes for compiling the kernel -Wunused: remove unreferenced static and local variables, goto labels, and functions declared but not defined.
1998-12-07 21:58:50 +00:00
static volatile u_int npx_intrs_while_probing;
static volatile u_int npx_traps_while_probing;
Preliminary support for per-cpu data pages. This eliminates a lot of #ifdef SMP type code. Things like _curproc reside in a data page that is unique on each cpu, eliminating the expensive macros like: #define curproc (SMPcurproc[cpunumber()]) There are some unresolved bootstrap and address space sharing issues at present, but Steve is waiting on this for other work. There is still some strictly temporary code present that isn't exactly pretty. This is part of a larger change that has run into some bumps, this part is standalone so it should be safe. The temporary code goes away when the full idle cpu support is finished. Reviewed by: fsmp, dyson
1997-06-22 16:04:22 +00:00
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
static union savefpu npx_cleanstate;
static bool_t npx_cleanstate_ready;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
static bool_t npx_ex16;
static bool_t npx_exists;
static bool_t npx_irq13;
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
alias_for_inthand_t probetrap;
Support compiling with `gcc -pedantic' (don't use hard newlines in (asm) string constants or hard long long constants).
1998-04-19 15:39:26 +00:00
__asm(" \n\
.text \n\
.p2align 2,0x90 \n\
Fixed profiling of elf kernels. Made high resolution profiling compile for elf kernels (it is broken for all kernels due to lack of egcs support). Renaming of many assembler labels is avoided by declaring by declaring the labels that need to be visible to gprof as having type "function" and depending on the elf version of gprof being zealous about discarding the others. A few type declarations are still missing, mainly for SMP. PR: 9413 Submitted by: Assar Westerlund <assar@sics.se> (initial parts)
1999-05-06 09:44:57 +00:00
.type " __XSTRING(CNAME(probetrap)) ",@function \n\
Support compiling with `gcc -pedantic' (don't use hard newlines in (asm) string constants or hard long long constants).
1998-04-19 15:39:26 +00:00
" __XSTRING(CNAME(probetrap)) ": \n\
ss \n\
incl " __XSTRING(CNAME(npx_traps_while_probing)) " \n\
fnclex \n\
iret \n\
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
");
Made the SMP case ignore the possibility of an INT13 interface. This eliminates all the APIC code, and thus several routines that would otherwise need to be made MP-safe. Reviewed by: Bruce Evans <bde@zeta.org.au>
1997-07-21 07:57:50 +00:00
Add an identify method to allow npx to arrange itself to be attached to the nexus without explicit code in the nexus to do so.
1999-08-22 19:52:51 +00:00
/*
* Identify routine. Create a connection point on our parent for probing.
*/
static void
npx_identify(driver, parent)
driver_t *driver;
device_t parent;
{
device_t child;
child = BUS_ADD_CHILD(parent, 0, "npx", 0);
if (child == NULL)
panic("npx_identify");
}
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
/*
* Do minimal handling of npx interrupts to convert them to traps.
*/
static void
npx_intr(dummy)
void *dummy;
{
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
struct thread *td;
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
npx_intrs_while_probing++;
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
/*
* The BUSY# latch must be cleared in all cases so that the next
* unmasked npx exception causes an interrupt.
*/
Eleminate 3 PC98 ifdefs: o Use IP_NPX in preference to hard coded value to write 0 to clear busy# o Use md macro for a full reset of the npx o Use IRQ_NPX in preference to hard coded value for each platform. # The other two ifdefs in this file are hard to remove
2005-03-16 20:46:16 +00:00
outb(IO_NPX, 0);
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
/*
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* fpcurthread is normally non-null here. In that case, schedule an
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
* AST to finish the exception handling in the correct context
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
* (this interrupt may occur after the thread has entered the
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
* kernel via a syscall or an interrupt). Otherwise, the npx
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
* state of the thread that caused this interrupt must have been
s/thread'/thread's/
2001-09-14 04:40:44 +00:00
* pushed to the thread's pcb, and clearing of the busy latch
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
* above has finished the (essentially null) handling of this
* interrupt. Control will eventually return to the instruction
* that caused it and it will repeat. We will eventually (usually
* soon) win the race to handle the interrupt properly.
*/
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
td = PCPU_GET(fpcurthread);
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
if (td != NULL) {
td->td_pcb->pcb_flags |= PCB_NPXTRAP;
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
mtx_lock_spin(&sched_lock);
Move a bunch of flags from the KSE to the thread. I was in two minds as to where to put them in the first case.. I should have listenned to the other mind. Submitted by: parts by davidxu@ Reviewed by: jeff@ mini@
2003-02-17 09:55:10 +00:00
td->td_flags |= TDF_ASTPENDING;
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
mtx_unlock_spin(&sched_lock);
}
}
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
- Don't set CR0_NE and CR0_MP in npx_probe() as they are already set earlier in cpu_setregs(). - If we know this CPU has a FPU via cpuid, then just assume the INT16 interface and make the npx device quiet to not clutter the dmesg. This is true for all Pentium and later CPUs and even some of the later 486dx CPUs. Reviewed by: bde Tested by: ps MFC after: 1 week
2006-04-06 17:17:45 +00:00
* Probe routine. Set flags to tell npxattach() what to do. Set up an
* interrupt handler if npx needs to use interrupts.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
static int
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
npx_probe(dev)
device_t dev;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
struct gate_descriptor save_idt_npxtrap;
struct resource *ioport_res, *irq_res;
void *irq_cookie;
int ioport_rid, irq_num, irq_rid;
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
u_short control;
u_short status;
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
- Don't set CR0_NE and CR0_MP in npx_probe() as they are already set earlier in cpu_setregs(). - If we know this CPU has a FPU via cpuid, then just assume the INT16 interface and make the npx device quiet to not clutter the dmesg. This is true for all Pentium and later CPUs and even some of the later 486dx CPUs. Reviewed by: bde Tested by: ps MFC after: 1 week
2006-04-06 17:17:45 +00:00
device_set_desc(dev, "math processor");
/*
* Modern CPUs all have an FPU that uses the INT16 interface
* and provide a simple way to verify that, so handle the
* common case right away.
*/
if (cpu_feature & CPUID_FPU) {
hw_float = npx_exists = 1;
npx_ex16 = 1;
device_quiet(dev);
return (0);
}
Add constants for entries in the IDT and use those instead of magic numbers.
2003-09-10 01:07:04 +00:00
save_idt_npxtrap = idt[IDT_MF];
setidt(IDT_MF, probetrap, SDT_SYS386TGT, SEL_KPL,
GSEL(GCODE_SEL, SEL_KPL));
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
ioport_rid = 0;
ioport_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &ioport_rid,
bus_alloc_resource must obey the same rules as rman_resource_resournce_bound wrt end parameter. The end parameter here was the same as the start. However, it should be start + count - 1, so make it that instead.
2005-03-16 20:31:46 +00:00
IO_NPX, IO_NPX + IO_NPXSIZE - 1, IO_NPXSIZE, RF_ACTIVE);
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
if (ioport_res == NULL)
panic("npx: can't get ports");
if (resource_int_value("npx", 0, "irq", &irq_num) != 0)
Eleminate 3 PC98 ifdefs: o Use IP_NPX in preference to hard coded value to write 0 to clear busy# o Use md macro for a full reset of the npx o Use IRQ_NPX in preference to hard coded value for each platform. # The other two ifdefs in this file are hard to remove
2005-03-16 20:46:16 +00:00
irq_num = IRQ_NPX;
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
irq_rid = 0;
Fix typo. ioport_rid should be irq_rid.
2002-11-05 04:03:42 +00:00
irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &irq_rid, irq_num,
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
irq_num, 1, RF_ACTIVE);
Don't panic if IRQ 13 doesn't exist. On some machines (see previous commit to atpic.c) there may not be an IRQ 13. Instead, just keep going. If the INT16 interface doesn't work then we will eventually panic anyway. FWIW: We could probably just axe the support for IRQ 13 altogether at this point. The only thing we'd lose support for are 486sx systems with external 487 FPUs. MFC after: 1 week
2005-12-05 22:11:44 +00:00
if (irq_res != NULL) {
if (bus_setup_intr(dev, irq_res, INTR_TYPE_MISC | INTR_FAST,
npx_intr, NULL, &irq_cookie) != 0)
panic("npx: can't create intr");
}
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
* Partially reset the coprocessor, if any. Some BIOS's don't reset
* it after a warm boot.
*/
Eleminate 3 PC98 ifdefs: o Use IP_NPX in preference to hard coded value to write 0 to clear busy# o Use md macro for a full reset of the npx o Use IRQ_NPX in preference to hard coded value for each platform. # The other two ifdefs in this file are hard to remove
2005-03-16 20:46:16 +00:00
npx_full_reset();
outb(IO_NPX, 0);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
- Don't set CR0_NE and CR0_MP in npx_probe() as they are already set earlier in cpu_setregs(). - If we know this CPU has a FPU via cpuid, then just assume the INT16 interface and make the npx device quiet to not clutter the dmesg. This is true for all Pentium and later CPUs and even some of the later 486dx CPUs. Reviewed by: bde Tested by: ps MFC after: 1 week
2006-04-06 17:17:45 +00:00
* Don't trap while we're probing.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
stop_emulating();
- Don't set CR0_NE and CR0_MP in npx_probe() as they are already set earlier in cpu_setregs(). - If we know this CPU has a FPU via cpuid, then just assume the INT16 interface and make the npx device quiet to not clutter the dmesg. This is true for all Pentium and later CPUs and even some of the later 486dx CPUs. Reviewed by: bde Tested by: ps MFC after: 1 week
2006-04-06 17:17:45 +00:00
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
* Finish resetting the coprocessor, if any. If there is an error
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
* pending, then we may get a bogus IRQ13, but npx_intr() will handle
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
* it OK. Bogus halts have never been observed, but we enabled
* IRQ13 and cleared the BUSY# latch early to handle them anyway.
*/
fninit();
Made the SMP case ignore the possibility of an INT13 interface. This eliminates all the APIC code, and thus several routines that would otherwise need to be made MP-safe. Reviewed by: Bruce Evans <bde@zeta.org.au>
1997-07-21 07:57:50 +00:00
Submitted by: seb@erix.ericsson.se (Sebastian Strollo) Remove over-cautious early fnop() synchronization. It caused the probe to hang on systems without an FPU.
1995-02-23 17:32:38 +00:00
/*
* Don't use fwait here because it might hang.
* Don't use fnop here because it usually hangs if there is no FPU.
*/
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
DELAY(1000); /* wait for any IRQ13 */
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
#ifdef DIAGNOSTIC
if (npx_intrs_while_probing != 0)
printf("fninit caused %u bogus npx interrupt(s)\n",
npx_intrs_while_probing);
if (npx_traps_while_probing != 0)
printf("fninit caused %u bogus npx trap(s)\n",
npx_traps_while_probing);
#endif
/*
* Check for a status of mostly zero.
*/
status = 0x5a5a;
fnstsw(&status);
if ((status & 0xb8ff) == 0) {
/*
* Good, now check for a proper control word.
*/
Remove trailing whitespace.
1995-05-30 08:16:23 +00:00
control = 0x5a5a;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
fnstcw(&control);
if ((control & 0x1f3f) == 0x033f) {
Define new MIB variable, hw.floatingpoint, which is true if FP hardware is present, and false if an emulator is being used.
1994-09-09 23:13:03 +00:00
hw_float = npx_exists = 1;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
* We have an npx, now divide by 0 to see if exception
* 16 works.
*/
control &= ~(1 << 2); /* enable divide by 0 trap */
fldcw(&control);
MFpc98: all changes in sys/pc98/pc98/npx.c related to FPU_ERROR_BROKEN. - 1.58 (2000/09/01; author: kato) Fixed FPU_ERROR_BROKEN code. It had old-isa code. - 1.33 (1998/03/09; author: kato) Make FPU_ERROR_BROKEN a new-style option. - 1.7 (1996/10/09; author: asami) Make sure FPU is recognized for non-Intel CPUs. The log for rev.1.7 should have said something like: Added FPU_ERROR_BROKEN option. This forces a successful probe for exception 16, so that hardware with a broken FPU error signal can sort of work.
2001-10-21 05:18:30 +00:00
#ifdef FPU_ERROR_BROKEN
/*
* FPU error signal doesn't work on some CPU
* accelerator board.
*/
npx_ex16 = 1;
return (0);
#endif
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
npx_traps_while_probing = npx_intrs_while_probing = 0;
fp_divide_by_0();
Fixed misclassification of npx interrupts caused by npx_probe(). Dividing by 0 in order to check for irq13/exception16 delivery apparently always causes an irq13 even if we have configured for exception16 (by setting CR0_NE). This was expected, but the timing of the irq13 was unexpected. Without CR0_NE, the irq13 is delivered synchronously at least on my test machine, but with CR0_NE it is delivered a little later (about 250 nsec) in PIC mode and much later (5000-10000 nsec) in APIC mode. So especially in APIC mode, the irq13 may arrive after it is supposed to be shut down. It should then be masked, but the shutdown is incomplete, so the irq goes to a null handler that just reports it as stray. The fix is to wait a bit after dividing by 0 to give a good chance of the irq13 being handled by its proper handler. Removed the hack that was supposed to recover from the incomplete shutdown of irq13. The shutdown is now even more incomplete, or perhaps just incomplete in a different way, but the hack now has no effect because irq13 is edge triggered and handling of edge triggered interrupts is now optimized by skipping their masking. The hack only worked due to it accidentally not losing races. The incomplete shutdown of irq13 still allows unprivileged users to generate a stray irq13 (except on systems where irq13 is actually used) by unmasking an npx exception and causing one. The exception gets handled properly by the exception 16 handler. A spurious irq13 is delivered asynchronously but is harmless (as in the probe) because it is almost perfectly not handled by the null interrupt handler. Perfectly not handling it involves mainly not resetting the npx busy latch. This prevents further irq13's despite them not being masked in the [A]PIC.
2004-06-06 15:17:44 +00:00
DELAY(1000); /* wait for any IRQ13 */
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
if (npx_traps_while_probing != 0) {
/*
* Good, exception 16 works.
*/
npx_ex16 = 1;
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
goto no_irq13;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
if (npx_intrs_while_probing != 0) {
/*
* Bad, we are stuck with IRQ13.
*/
npx_irq13 = 1;
Add constants for entries in the IDT and use those instead of magic numbers.
2003-09-10 01:07:04 +00:00
idt[IDT_MF] = save_idt_npxtrap;
New APIC support code: - The apic interrupt entry points have been rewritten so that each entry point can serve 32 different vectors. When the entry is executed, it uses one of the 32-bit ISR registers to determine which vector in its assigned range was triggered. Thus, the apic code can support 159 different interrupt vectors with only 5 entry points. - We now always to disable the local APIC to work around an errata in certain PPros and then re-enable it again if we decide to use the APICs to route interrupts. - We no longer map IO APICs or local APICs using special page table entries. Instead, we just use pmap_mapdev(). We also no longer export the virtual address of the local APIC as a global symbol to the rest of the system, but only in local_apic.c. To aid this, the APIC ID of each CPU is exported as a per-CPU variable. - Interrupt sources are provided for each intpin on each IO APIC. Currently, each source is given a unique interrupt vector meaning that PCI interrupts are not shared on most machines with an I/O APIC. That mapping for interrupt sources to interrupt vectors is up to the APIC enumerator driver however. - We no longer probe to see if we need to use mixed mode to route IRQ 0, instead we always use mixed mode to route IRQ 0 for now. This can be disabled via the 'NO_MIXED_MODE' kernel option. - The npx(4) driver now always probes to see if a built-in FPU is present since this test can now be performed with the new APIC code. However, an SMP kernel will panic if there is more than one CPU and a built-in FPU is not found. - PCI interrupts are now properly routed when using APICs to route interrupts, so remove the hack to psuedo-route interrupts when the intpin register was read. - The apic.h header was moved to apicreg.h and a new apicvar.h header that declares the APIs used by the new APIC code was added.
2003-11-03 21:53:38 +00:00
#ifdef SMP
if (mp_ncpus > 1)
panic("npx0 cannot use IRQ 13 on an SMP system");
#endif
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
return (0);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
/*
* Worse, even IRQ13 is broken. Use emulator.
*/
}
}
/*
* Probe failed, but we want to get to npxattach to initialize the
* emulator and say that it has been installed. XXX handle devices
* that aren't really devices better.
*/
New APIC support code: - The apic interrupt entry points have been rewritten so that each entry point can serve 32 different vectors. When the entry is executed, it uses one of the 32-bit ISR registers to determine which vector in its assigned range was triggered. Thus, the apic code can support 159 different interrupt vectors with only 5 entry points. - We now always to disable the local APIC to work around an errata in certain PPros and then re-enable it again if we decide to use the APICs to route interrupts. - We no longer map IO APICs or local APICs using special page table entries. Instead, we just use pmap_mapdev(). We also no longer export the virtual address of the local APIC as a global symbol to the rest of the system, but only in local_apic.c. To aid this, the APIC ID of each CPU is exported as a per-CPU variable. - Interrupt sources are provided for each intpin on each IO APIC. Currently, each source is given a unique interrupt vector meaning that PCI interrupts are not shared on most machines with an I/O APIC. That mapping for interrupt sources to interrupt vectors is up to the APIC enumerator driver however. - We no longer probe to see if we need to use mixed mode to route IRQ 0, instead we always use mixed mode to route IRQ 0 for now. This can be disabled via the 'NO_MIXED_MODE' kernel option. - The npx(4) driver now always probes to see if a built-in FPU is present since this test can now be performed with the new APIC code. However, an SMP kernel will panic if there is more than one CPU and a built-in FPU is not found. - PCI interrupts are now properly routed when using APICs to route interrupts, so remove the hack to psuedo-route interrupts when the intpin register was read. - The apic.h header was moved to apicreg.h and a new apicvar.h header that declares the APIs used by the new APIC code was added.
2003-11-03 21:53:38 +00:00
#ifdef SMP
if (mp_ncpus > 1)
panic("npx0 cannot be emulated on an SMP system");
#endif
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
/* FALLTHROUGH */
no_irq13:
Add constants for entries in the IDT and use those instead of magic numbers.
2003-09-10 01:07:04 +00:00
idt[IDT_MF] = save_idt_npxtrap;
Don't panic if IRQ 13 doesn't exist. On some machines (see previous commit to atpic.c) there may not be an IRQ 13. Instead, just keep going. If the INT16 interface doesn't work then we will eventually panic anyway. FWIW: We could probably just axe the support for IRQ 13 altogether at this point. The only thing we'd lose support for are 486sx systems with external 487 FPUs. MFC after: 1 week
2005-12-05 22:11:44 +00:00
if (irq_res != NULL) {
bus_teardown_intr(dev, irq_res, irq_cookie);
bus_release_resource(dev, SYS_RES_IRQ, irq_rid, irq_res);
}
Deleted most of npxprobe(), and merged npxprobe1() back into npxprobe(). Use the normal interrupt handler (npx_intr()) instead of a special probe-time interrupt handler, although this causes problems due to the bus_teardown_intr() not actually even tearing down the interrupt (these problems were avoided by doing interrupt attachment for the special interrupt handler directly). Fixed minor bitrot in comments. The reason for the npxprobe()/npxprobe1() split mostly went away at about the same time it was made (in 1992 or 1993 just before the beginning of history). 386BSD ran all probes with interrupts completely masked, and I didn't want to disturb this when I added an irq probe to npxprobe(). An irq (not necessarily npx) must be acked for at least external npx's to take the cpu out of the wait state that it enters when an npx error occurs, so the probe must be done with a suitable irq unmasked. npxprobe() went to great lengths to unmask precisely the npx irq. Running probes with all interrupts masked was never really needed in FreeBSD, since FreeBSD always masked interrupts well enough using splhigh(), but it wasn't until rev.1.48 (1995/12/12) of autoconf.c that all probes were run with CPU interrupts enabled. This permits npxprobe() to probe its irq using normal interrupt resources. Note that most drivers still can't depend on this. It depends on the interrupt handler being fast and the irq not being shared.
2001-10-16 14:12:35 +00:00
bus_release_resource(dev, SYS_RES_IOPORT, ioport_rid, ioport_res);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
return (0);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
/*
* Attach routine - announce which it is, and wire into system
*/
Be consistent about "static" functions: if the function is marked static in its prototype, mark it static at the definition too. Inspired by: FlexeLint warning #512
2002-09-28 17:15:38 +00:00
static int
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
npx_attach(dev)
device_t dev;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
int flags;
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
register_t s;
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
Remove local hacks to set flags now that the device probe does this for us. Tested on every device except sio_pci and the pc98 fd.c. Perhaps something similar should be done for the "disabled" hints also. MFC after: 2 weeks
2004-10-14 22:21:59 +00:00
flags = device_get_flags(dev);
Initialize isa_devtab entries for interrupt handlers in individual device drivers, not in ioconf.c. Use a different hack in isa_device.h so that a new config(8) is not required yet. pc98 parts approved by: kato
1998-10-22 05:58:45 +00:00
Let nexus print our flags for us. Also, clean up an obfuscated if stmt.
2004-10-14 22:37:51 +00:00
if (npx_irq13)
device_printf(dev, "IRQ 13 interface\n");
- Don't set CR0_NE and CR0_MP in npx_probe() as they are already set earlier in cpu_setregs(). - If we know this CPU has a FPU via cpuid, then just assume the INT16 interface and make the npx device quiet to not clutter the dmesg. This is true for all Pentium and later CPUs and even some of the later 486dx CPUs. Reviewed by: bde Tested by: ps MFC after: 1 week
2006-04-06 17:17:45 +00:00
else if (!npx_ex16)
Let nexus print our flags for us. Also, clean up an obfuscated if stmt.
2004-10-14 22:37:51 +00:00
device_printf(dev, "WARNING: no FPU!\n");
- Don't set CR0_NE and CR0_MP in npx_probe() as they are already set earlier in cpu_setregs(). - If we know this CPU has a FPU via cpuid, then just assume the INT16 interface and make the npx device quiet to not clutter the dmesg. This is true for all Pentium and later CPUs and even some of the later 486dx CPUs. Reviewed by: bde Tested by: ps MFC after: 1 week
2006-04-06 17:17:45 +00:00
else if (!device_is_quiet(dev) || bootverbose)
device_printf(dev, "INT 16 interface\n");
Let nexus print our flags for us. Also, clean up an obfuscated if stmt.
2004-10-14 22:37:51 +00:00
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
npxinit(__INITIAL_NPXCW__);
Replaced I586_OPTIMIZED_BCOPY and I586_OPTIMIZED_BZERO with boot-time negative-logic flags (flags 0x01 and 0x02 for npx0, defaulting to unset = on). This changes the default from off to on. The options have been in current for several months with no problems reported. Added a boot-time negative-logic flag for the old I5886_FAST_BCOPY option which went away too soon (flag 0x04 for npx0, defaulting to unset = on). Added a boot-time way to set the memory size (iosiz in config, iosize in userconfig for npx0). LINT: Removed old options. Documented npx0's flags and iosiz. options.i386: Removed old options. identcpu.c: Don't set the function pointers here. Setting them has to be delayed until after userconfig has had a chance to disable them and until after a good npx0 has been detected. machdep.c: Use npx0's iosize instead of MAXMEM if it is nonzero. support.s: Added vectors and glue code for copyin() and copyout(). Fixed ifdefs for i586_bzero(). Added ifdefs for i586_bcopy(). npx.c: Set the function pointers here. Clear hw_float when an npx exists but is too broken to use. Restored style from a year or three ago in npxattach().
1996-11-11 20:39:03 +00:00
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
if (npx_cleanstate_ready == 0) {
s = intr_disable();
stop_emulating();
fpusave(&npx_cleanstate);
start_emulating();
Use the method described in IA-32 Intel Architecture Software Developer's Manual chapter 11.6.6 to get valid mxcsr bits, use the mxcsr mask to clear invalid bits passed by user code. Reviewed by: bde
2006-05-30 23:44:21 +00:00
#ifdef CPU_ENABLE_SSE
if (cpu_fxsr) {
if (npx_cleanstate.sv_xmm.sv_env.en_mxcsr_mask)
cpu_mxcsr_mask =
npx_cleanstate.sv_xmm.sv_env.en_mxcsr_mask;
else
cpu_mxcsr_mask = 0xFFBF;
}
#endif
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
npx_cleanstate_ready = 1;
intr_restore(s);
}
People are still having problems with i586_* on UP machines and SMP machines, so just hack it to disable them for now until it can be fixed. Inspired by hair pulling of: asmodai
2001-04-13 17:14:53 +00:00
#ifdef I586_CPU_XXX
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
if (cpu_class == CPUCLASS_586 && npx_ex16 && npx_exists &&
Only use the i586-optimized copying and zeroing functions if they are actually faster (more than 20% faster for zeroing 1 MB at boot time). This fixes pessimized copying and zeroing on K6's and perhaps on other CPUs that are misclassified as i586's.
1998-02-12 21:41:10 +00:00
timezero("i586_bzero()", i586_bzero) <
timezero("bzero()", bzero) * 4 / 5) {
Define ovbcopy() as a macro which expands to the equivalent bcopy() call, to take care of the KAME IPv6 code which needs ovbcopy() because NetBSD's bcopy() doesn't handle overlap like ours. Remove all implementations of ovbcopy(). Previously, bzero was a function pointer on i386, to save a jmp to bzero_vector. Get rid of this microoptimization as it only confuses things, adds machine-dependent code to an MD header, and doesn't really save all that much. This commit does not add my pagezero() / pagecopy() code.
2003-04-04 17:29:55 +00:00
if (!(flags & NPX_DISABLE_I586_OPTIMIZED_BCOPY))
Replaced I586_OPTIMIZED_BCOPY and I586_OPTIMIZED_BZERO with boot-time negative-logic flags (flags 0x01 and 0x02 for npx0, defaulting to unset = on). This changes the default from off to on. The options have been in current for several months with no problems reported. Added a boot-time negative-logic flag for the old I5886_FAST_BCOPY option which went away too soon (flag 0x04 for npx0, defaulting to unset = on). Added a boot-time way to set the memory size (iosiz in config, iosize in userconfig for npx0). LINT: Removed old options. Documented npx0's flags and iosiz. options.i386: Removed old options. identcpu.c: Don't set the function pointers here. Setting them has to be delayed until after userconfig has had a chance to disable them and until after a good npx0 has been detected. machdep.c: Use npx0's iosize instead of MAXMEM if it is nonzero. support.s: Added vectors and glue code for copyin() and copyout(). Fixed ifdefs for i586_bzero(). Added ifdefs for i586_bcopy(). npx.c: Set the function pointers here. Clear hw_float when an npx exists but is too broken to use. Restored style from a year or three ago in npxattach().
1996-11-11 20:39:03 +00:00
bcopy_vector = i586_bcopy;
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
if (!(flags & NPX_DISABLE_I586_OPTIMIZED_BZERO))
Define ovbcopy() as a macro which expands to the equivalent bcopy() call, to take care of the KAME IPv6 code which needs ovbcopy() because NetBSD's bcopy() doesn't handle overlap like ours. Remove all implementations of ovbcopy(). Previously, bzero was a function pointer on i386, to save a jmp to bzero_vector. Get rid of this microoptimization as it only confuses things, adds machine-dependent code to an MD header, and doesn't really save all that much. This commit does not add my pagezero() / pagecopy() code.
2003-04-04 17:29:55 +00:00
bzero_vector = i586_bzero;
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
if (!(flags & NPX_DISABLE_I586_OPTIMIZED_COPYIO)) {
Replaced I586_OPTIMIZED_BCOPY and I586_OPTIMIZED_BZERO with boot-time negative-logic flags (flags 0x01 and 0x02 for npx0, defaulting to unset = on). This changes the default from off to on. The options have been in current for several months with no problems reported. Added a boot-time negative-logic flag for the old I5886_FAST_BCOPY option which went away too soon (flag 0x04 for npx0, defaulting to unset = on). Added a boot-time way to set the memory size (iosiz in config, iosize in userconfig for npx0). LINT: Removed old options. Documented npx0's flags and iosiz. options.i386: Removed old options. identcpu.c: Don't set the function pointers here. Setting them has to be delayed until after userconfig has had a chance to disable them and until after a good npx0 has been detected. machdep.c: Use npx0's iosize instead of MAXMEM if it is nonzero. support.s: Added vectors and glue code for copyin() and copyout(). Fixed ifdefs for i586_bzero(). Added ifdefs for i586_bcopy(). npx.c: Set the function pointers here. Clear hw_float when an npx exists but is too broken to use. Restored style from a year or three ago in npxattach().
1996-11-11 20:39:03 +00:00
copyin_vector = i586_copyin;
copyout_vector = i586_copyout;
}
}
#endif
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
return (0); /* XXX unused */
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
/*
* Initialize floating point unit.
*/
void
npxinit(control)
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
u_short control;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
The per-cpu temporary buffers are not needed since the pcb_save areas have the proper alignment. Change dummy variable in npxinit from stack to bss to ensure proper alignment. Reviewed by: bde
2001-07-17 13:06:47 +00:00
static union savefpu dummy;
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
register_t savecrit;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
if (!npx_exists)
return;
/*
* fninit has the same h/w bugs as fnsave. Use the detoxified
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
* fnsave to throw away any junk in the fpu. npxsave() initializes
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* the fpu and sets fpcurthread = NULL as important side effects.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
savecrit = intr_disable();
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
npxsave(&dummy);
stop_emulating();
Explicitly initialize the fpu when SSE is enabled since this no longer happens as a side effect of calling npxsave. Reviewed by: peter, bde
2001-10-15 20:18:06 +00:00
#ifdef CPU_ENABLE_SSE
/* XXX npxsave() doesn't actually initialize the fpu in the SSE case. */
if (cpu_fxsr)
fninit();
#endif
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
fldcw(&control);
start_emulating();
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
intr_restore(savecrit);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
/*
* Free coprocessor (if we have it).
*/
void
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
npxexit(td)
struct thread *td;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
register_t savecrit;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
savecrit = intr_disable();
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
if (curthread == PCPU_GET(fpcurthread))
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
npxsave(&PCPU_GET(curpcb)->pcb_save);
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
intr_restore(savecrit);
Disabled logging of masked exceptions on exit. Keep the side effect of saving the state (see rev.1.17).
1997-01-29 13:46:28 +00:00
#ifdef NPX_DEBUG
Log processes that exit with an masked npx exception that would trap with the current default exception (un)mask. There should be no such processes unless you change the mask. Someday the mask should be changed to the IEEE default of everything masked. The npx state gets saved so that it can be checked and this may have the side effect of fixing a bug that was reported for 1.1.5. (npx exceptions may sometimes leak across exits and clobber another process. I can't see how this can happen.) Get some missing/wrong declarations from headers now that the headers have them.
1994-11-14 14:59:06 +00:00
if (npx_exists) {
u_int masked_exceptions;
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
masked_exceptions = GET_FPU_CW(td) & GET_FPU_SW(td) & 0x7f;
Log processes that exit with an masked npx exception that would trap with the current default exception (un)mask. There should be no such processes unless you change the mask. Someday the mask should be changed to the IEEE default of everything masked. The npx state gets saved so that it can be checked and this may have the side effect of fixing a bug that was reported for 1.1.5. (npx exceptions may sometimes leak across exits and clobber another process. I can't see how this can happen.) Get some missing/wrong declarations from headers now that the headers have them.
1994-11-14 14:59:06 +00:00
/*
Disabled logging of masked exceptions on exit. Keep the side effect of saving the state (see rev.1.17).
1997-01-29 13:46:28 +00:00
* Log exceptions that would have trapped with the old
* control word (overflow, divide by 0, and invalid operand).
Log processes that exit with an masked npx exception that would trap with the current default exception (un)mask. There should be no such processes unless you change the mask. Someday the mask should be changed to the IEEE default of everything masked. The npx state gets saved so that it can be checked and this may have the side effect of fixing a bug that was reported for 1.1.5. (npx exceptions may sometimes leak across exits and clobber another process. I can't see how this can happen.) Get some missing/wrong declarations from headers now that the headers have them.
1994-11-14 14:59:06 +00:00
*/
if (masked_exceptions & 0x0d)
log(LOG_ERR,
Whitespace fixes.
2001-09-18 21:05:04 +00:00
"pid %d (%s) exited with masked floating point exceptions 0x%02x\n",
td->td_proc->p_pid, td->td_proc->p_comm,
masked_exceptions);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
Disabled logging of masked exceptions on exit. Keep the side effect of saving the state (see rev.1.17).
1997-01-29 13:46:28 +00:00
#endif
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
int
npxformat()
{
if (!npx_exists)
return (_MC_FPFMT_NODEV);
#ifdef CPU_ENABLE_SSE
if (cpu_fxsr)
return (_MC_FPFMT_XMM);
#endif
return (_MC_FPFMT_387);
}
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
/*
* The following mechanism is used to ensure that the FPE_... value
* that is passed as a trapcode to the signal handler of the user
* process does not have more than one bit set.
*
* Multiple bits may be set if the user process modifies the control
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* word while a status word bit is already set. While this is a sign
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* of bad coding, we have no choise than to narrow them down to one
* bit, since we must not send a trapcode that is not exactly one of
* the FPE_ macros.
*
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* The mechanism has a static table with 127 entries. Each combination
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* of the 7 FPU status word exception bits directly translates to a
* position in this table, where a single FPE_... value is stored.
* This FPE_... value stored there is considered the "most important"
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* of the exception bits and will be sent as the signal code. The
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* precedence of the bits is based upon Intel Document "Numerical
* Applications", Chapter "Special Computational Situations".
*
* The macro to choose one of these values does these steps: 1) Throw
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* away status word bits that cannot be masked. 2) Throw away the bits
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* currently masked in the control word, assuming the user isn't
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* interested in them anymore. 3) Reinsert status word bit 7 (stack
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* fault) if it is set, which cannot be masked but must be presered.
* 4) Use the remaining bits to point into the trapcode table.
*
* The 6 maskable bits in order of their preference, as stated in the
* above referenced Intel manual:
* 1 Invalid operation (FP_X_INV)
* 1a Stack underflow
* 1b Stack overflow
* 1c Operand of unsupported format
* 1d SNaN operand.
* 2 QNaN operand (not an exception, irrelavant here)
* 3 Any other invalid-operation not mentioned above or zero divide
* (FP_X_INV, FP_X_DZ)
* 4 Denormal operand (FP_X_DNML)
* 5 Numeric over/underflow (FP_X_OFL, FP_X_UFL)
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
* 6 Inexact result (FP_X_IMP)
*/
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
static char fpetable[128] = {
0,
Various formatting fixes on my FPE trapcode commit. Submitted by: BDE
1999-07-26 05:47:31 +00:00
FPE_FLTINV, /* 1 - INV */
FPE_FLTUND, /* 2 - DNML */
FPE_FLTINV, /* 3 - INV | DNML */
FPE_FLTDIV, /* 4 - DZ */
FPE_FLTINV, /* 5 - INV | DZ */
FPE_FLTDIV, /* 6 - DNML | DZ */
FPE_FLTINV, /* 7 - INV | DNML | DZ */
FPE_FLTOVF, /* 8 - OFL */
FPE_FLTINV, /* 9 - INV | OFL */
FPE_FLTUND, /* A - DNML | OFL */
FPE_FLTINV, /* B - INV | DNML | OFL */
FPE_FLTDIV, /* C - DZ | OFL */
FPE_FLTINV, /* D - INV | DZ | OFL */
FPE_FLTDIV, /* E - DNML | DZ | OFL */
FPE_FLTINV, /* F - INV | DNML | DZ | OFL */
FPE_FLTUND, /* 10 - UFL */
FPE_FLTINV, /* 11 - INV | UFL */
FPE_FLTUND, /* 12 - DNML | UFL */
FPE_FLTINV, /* 13 - INV | DNML | UFL */
FPE_FLTDIV, /* 14 - DZ | UFL */
FPE_FLTINV, /* 15 - INV | DZ | UFL */
FPE_FLTDIV, /* 16 - DNML | DZ | UFL */
FPE_FLTINV, /* 17 - INV | DNML | DZ | UFL */
FPE_FLTOVF, /* 18 - OFL | UFL */
FPE_FLTINV, /* 19 - INV | OFL | UFL */
FPE_FLTUND, /* 1A - DNML | OFL | UFL */
FPE_FLTINV, /* 1B - INV | DNML | OFL | UFL */
FPE_FLTDIV, /* 1C - DZ | OFL | UFL */
FPE_FLTINV, /* 1D - INV | DZ | OFL | UFL */
FPE_FLTDIV, /* 1E - DNML | DZ | OFL | UFL */
FPE_FLTINV, /* 1F - INV | DNML | DZ | OFL | UFL */
FPE_FLTRES, /* 20 - IMP */
FPE_FLTINV, /* 21 - INV | IMP */
FPE_FLTUND, /* 22 - DNML | IMP */
FPE_FLTINV, /* 23 - INV | DNML | IMP */
FPE_FLTDIV, /* 24 - DZ | IMP */
FPE_FLTINV, /* 25 - INV | DZ | IMP */
FPE_FLTDIV, /* 26 - DNML | DZ | IMP */
FPE_FLTINV, /* 27 - INV | DNML | DZ | IMP */
FPE_FLTOVF, /* 28 - OFL | IMP */
FPE_FLTINV, /* 29 - INV | OFL | IMP */
FPE_FLTUND, /* 2A - DNML | OFL | IMP */
FPE_FLTINV, /* 2B - INV | DNML | OFL | IMP */
FPE_FLTDIV, /* 2C - DZ | OFL | IMP */
FPE_FLTINV, /* 2D - INV | DZ | OFL | IMP */
FPE_FLTDIV, /* 2E - DNML | DZ | OFL | IMP */
FPE_FLTINV, /* 2F - INV | DNML | DZ | OFL | IMP */
FPE_FLTUND, /* 30 - UFL | IMP */
FPE_FLTINV, /* 31 - INV | UFL | IMP */
FPE_FLTUND, /* 32 - DNML | UFL | IMP */
FPE_FLTINV, /* 33 - INV | DNML | UFL | IMP */
FPE_FLTDIV, /* 34 - DZ | UFL | IMP */
FPE_FLTINV, /* 35 - INV | DZ | UFL | IMP */
FPE_FLTDIV, /* 36 - DNML | DZ | UFL | IMP */
FPE_FLTINV, /* 37 - INV | DNML | DZ | UFL | IMP */
FPE_FLTOVF, /* 38 - OFL | UFL | IMP */
FPE_FLTINV, /* 39 - INV | OFL | UFL | IMP */
FPE_FLTUND, /* 3A - DNML | OFL | UFL | IMP */
FPE_FLTINV, /* 3B - INV | DNML | OFL | UFL | IMP */
FPE_FLTDIV, /* 3C - DZ | OFL | UFL | IMP */
FPE_FLTINV, /* 3D - INV | DZ | OFL | UFL | IMP */
FPE_FLTDIV, /* 3E - DNML | DZ | OFL | UFL | IMP */
FPE_FLTINV, /* 3F - INV | DNML | DZ | OFL | UFL | IMP */
FPE_FLTSUB, /* 40 - STK */
FPE_FLTSUB, /* 41 - INV | STK */
FPE_FLTUND, /* 42 - DNML | STK */
FPE_FLTSUB, /* 43 - INV | DNML | STK */
FPE_FLTDIV, /* 44 - DZ | STK */
FPE_FLTSUB, /* 45 - INV | DZ | STK */
FPE_FLTDIV, /* 46 - DNML | DZ | STK */
FPE_FLTSUB, /* 47 - INV | DNML | DZ | STK */
FPE_FLTOVF, /* 48 - OFL | STK */
FPE_FLTSUB, /* 49 - INV | OFL | STK */
FPE_FLTUND, /* 4A - DNML | OFL | STK */
FPE_FLTSUB, /* 4B - INV | DNML | OFL | STK */
FPE_FLTDIV, /* 4C - DZ | OFL | STK */
FPE_FLTSUB, /* 4D - INV | DZ | OFL | STK */
FPE_FLTDIV, /* 4E - DNML | DZ | OFL | STK */
FPE_FLTSUB, /* 4F - INV | DNML | DZ | OFL | STK */
FPE_FLTUND, /* 50 - UFL | STK */
FPE_FLTSUB, /* 51 - INV | UFL | STK */
FPE_FLTUND, /* 52 - DNML | UFL | STK */
FPE_FLTSUB, /* 53 - INV | DNML | UFL | STK */
FPE_FLTDIV, /* 54 - DZ | UFL | STK */
FPE_FLTSUB, /* 55 - INV | DZ | UFL | STK */
FPE_FLTDIV, /* 56 - DNML | DZ | UFL | STK */
FPE_FLTSUB, /* 57 - INV | DNML | DZ | UFL | STK */
FPE_FLTOVF, /* 58 - OFL | UFL | STK */
FPE_FLTSUB, /* 59 - INV | OFL | UFL | STK */
FPE_FLTUND, /* 5A - DNML | OFL | UFL | STK */
FPE_FLTSUB, /* 5B - INV | DNML | OFL | UFL | STK */
FPE_FLTDIV, /* 5C - DZ | OFL | UFL | STK */
FPE_FLTSUB, /* 5D - INV | DZ | OFL | UFL | STK */
FPE_FLTDIV, /* 5E - DNML | DZ | OFL | UFL | STK */
FPE_FLTSUB, /* 5F - INV | DNML | DZ | OFL | UFL | STK */
FPE_FLTRES, /* 60 - IMP | STK */
FPE_FLTSUB, /* 61 - INV | IMP | STK */
FPE_FLTUND, /* 62 - DNML | IMP | STK */
FPE_FLTSUB, /* 63 - INV | DNML | IMP | STK */
FPE_FLTDIV, /* 64 - DZ | IMP | STK */
FPE_FLTSUB, /* 65 - INV | DZ | IMP | STK */
FPE_FLTDIV, /* 66 - DNML | DZ | IMP | STK */
FPE_FLTSUB, /* 67 - INV | DNML | DZ | IMP | STK */
FPE_FLTOVF, /* 68 - OFL | IMP | STK */
FPE_FLTSUB, /* 69 - INV | OFL | IMP | STK */
FPE_FLTUND, /* 6A - DNML | OFL | IMP | STK */
FPE_FLTSUB, /* 6B - INV | DNML | OFL | IMP | STK */
FPE_FLTDIV, /* 6C - DZ | OFL | IMP | STK */
FPE_FLTSUB, /* 6D - INV | DZ | OFL | IMP | STK */
FPE_FLTDIV, /* 6E - DNML | DZ | OFL | IMP | STK */
FPE_FLTSUB, /* 6F - INV | DNML | DZ | OFL | IMP | STK */
FPE_FLTUND, /* 70 - UFL | IMP | STK */
FPE_FLTSUB, /* 71 - INV | UFL | IMP | STK */
FPE_FLTUND, /* 72 - DNML | UFL | IMP | STK */
FPE_FLTSUB, /* 73 - INV | DNML | UFL | IMP | STK */
FPE_FLTDIV, /* 74 - DZ | UFL | IMP | STK */
FPE_FLTSUB, /* 75 - INV | DZ | UFL | IMP | STK */
FPE_FLTDIV, /* 76 - DNML | DZ | UFL | IMP | STK */
FPE_FLTSUB, /* 77 - INV | DNML | DZ | UFL | IMP | STK */
FPE_FLTOVF, /* 78 - OFL | UFL | IMP | STK */
FPE_FLTSUB, /* 79 - INV | OFL | UFL | IMP | STK */
FPE_FLTUND, /* 7A - DNML | OFL | UFL | IMP | STK */
FPE_FLTSUB, /* 7B - INV | DNML | OFL | UFL | IMP | STK */
FPE_FLTDIV, /* 7C - DZ | OFL | UFL | IMP | STK */
FPE_FLTSUB, /* 7D - INV | DZ | OFL | UFL | IMP | STK */
FPE_FLTDIV, /* 7E - DNML | DZ | OFL | UFL | IMP | STK */
FPE_FLTSUB, /* 7F - INV | DNML | DZ | OFL | UFL | IMP | STK */
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
};
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
* Preserve the FP status word, clear FP exceptions, then generate a SIGFPE.
*
* Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now
* depend on longjmp() restoring a usable state. Restoring the state
* or examining it might fail if we didn't clear exceptions.
*
On FPU exceptions, pass a useful error code (one of the FPE_... macros) to the signal handler, for old-style BSD signal handlers as the second (int) argument, for SA_SIGINFO signal handlers as siginfo_t->si_code. This is source-compatible with Solaris, except that we have no <siginfo.h> (which isn't even mentioned in POSIX 1003.1b). An rather complete example program is at http://www3.cons.org/cracauer/freebsd-signal.c This will be added to the regression tests in src/. This commit also adds code to disable the (hardware) FPU from userconfig, so that you can use a software FP emulator on a machine that has hardware floating point. See LINT.
1999-07-25 13:16:09 +00:00
* The error code chosen will be one of the FPE_... macros. It will be
* sent as the second argument to old BSD-style signal handlers and as
* "siginfo_t->si_code" (second argument) to SA_SIGINFO signal handlers.
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
*
* XXX the FP state is not preserved across signal handlers. So signal
* handlers cannot afford to do FP unless they preserve the state or
* longjmp() out. Both preserving the state and longjmp()ing may be
* destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable
* solution for signals other than SIGFPE.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
int
npxtrap()
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
register_t savecrit;
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
u_short control, status;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
Fixed panics in npx exception handling. When using IRQ13 exception handling, SMPng always switches the npx context away from curproc before calling the handler, so the handler always paniced. When using exception 16 exception handling, SMPng sometimes switches the npx context away from curproc before calling the handler, so the handler sometimes paniced. Also, we didn't lock the context while using it, so we sometimes didn't detect the switch and then paniced in a less controlled way. Just lock the context while using it, and return without doing anything except clearing the busy latch if the context is not for curproc. This fixes the exception 16 case and makes the IRQ13 case harmless. In both cases, the instruction that caused the exception is restarted and the exception repeats. In the exception 16 case, we soon get an exception that can be handled without doing anything special. In the IRQ13 case, we get an easy to kill hung process.
2001-05-02 13:06:58 +00:00
if (!npx_exists) {
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
printf("npxtrap: fpcurthread = %p, curthread = %p, npx_exists = %d\n",
PCPU_GET(fpcurthread), curthread, npx_exists);
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
panic("npxtrap from nowhere");
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
savecrit = intr_disable();
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
/*
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
* Interrupt handling (for another interrupt) may have pushed the
* state to memory. Fetch the relevant parts of the state from
* wherever they are.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
if (PCPU_GET(fpcurthread) != curthread) {
KSE Milestone 2 Note ALL MODULES MUST BE RECOMPILED make the kernel aware that there are smaller units of scheduling than the process. (but only allow one thread per process at this time). This is functionally equivalent to teh previousl -current except that there is a thread associated with each process. Sorry john! (your next MFC will be a doosie!) Reviewed by: peter@freebsd.org, dillon@freebsd.org X-MFC after: ha ha ha ha
2001-09-12 08:38:13 +00:00
control = GET_FPU_CW(curthread);
status = GET_FPU_SW(curthread);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
} else {
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
fnstcw(&control);
fnstsw(&status);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
if (PCPU_GET(fpcurthread) == curthread)
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
fnclex();
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
intr_restore(savecrit);
Convert npx interrupts into traps instead of vice versa. This is much simpler for npx exceptions that start as traps (no assembly required...) and works better for npx exceptions that start as interrupts (there is no longer a problem for nested interrupts). Submitted by: original (pre-SMPng) version by luoqi
2001-05-22 21:20:49 +00:00
return (fpetable[status & ((~control & 0x3f) | 0x40)]);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
/*
* Implement device not available (DNA) exception
*
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* It would be better to switch FP context here (if curthread != fpcurthread)
Use sufficient parentheses in macros. Remove bogus input operands for fnsave(), fnstcw() and fnstsw(). Change all fwait's to fnop's. This might help avoid hardware bugs. Wait after fninit with an fnop. This should be safer now. Fix some spelling and formatting errors. Use natural sizes for control and status words (u_short, promotes to int). Don't clobber the SWI_CLOCK_MASK bits in npx0_imask when using IRQ13. Set the devconf state correctly (always busy, if configured). Improve code for npx_registerdev() a little (gcc can't keep id->id_unit in a register for some reason). Don't register a nonexistent npx device. Print a useful message in npxattach() again (delete references to errors and not the whole message). Don't print "387 emulator" if there is no emulator in the kernel. Use %p for pointers in error messages. Don't clobber the FPU state when there is an FPU exception. Just clear the exception flags (after saving the flags as before). This allows debuggers and SIGFPE handlers to look at the full exception state. SIGFPE handlers should normally return via longjmp(), which restores a good FPU state (as before). Returning from a SIGFPE handler may leave the FPU in the wrong state (as before). Clear the busy latch _after_ clearing the exception flags so that there is less chance of getting a bogus h/w interrupt for a control operation. Clear the saved exception status word when the next FPU instruction is excuted so that it doesn't stick around until the next exception. Clear the busy latch after fnsave() in npxsave() in case it was set when npxsave() was called.
1995-01-03 04:00:06 +00:00
* and not necessarily for every context switch, but it is too hard to
* access foreign pcb's.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
static int err_count = 0;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
int
npxdna()
{
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
struct pcb *pcb;
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
register_t s;
Initialize the mxcsr properly, so the initial value in a process isn't just the value that was left over from some other application.
2005-03-17 22:21:36 +00:00
#ifdef CPU_ENABLE_SSE
int mxcsr;
#endif
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
u_short control;
Implement preemptive scheduling of hardware interrupt threads. - If possible, context switch to the thread directly in sched_ithd(), rather than triggering a delayed ast reschedule. - Disable interrupts while restoring fpu state in the trap handler, in order to ensure that we are not preempted in the middle, which could cause migration to another cpu. Reviewed by: peter Tested by: peter (alpha)
2001-02-01 03:34:20 +00:00
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
if (!npx_exists)
return (0);
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
if (PCPU_GET(fpcurthread) == curthread) {
printf("npxdna: fpcurthread == curthread %d times\n",
++err_count);
stop_emulating();
return (1);
}
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
if (PCPU_GET(fpcurthread) != NULL) {
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
printf("npxdna: fpcurthread = %p (%d), curthread = %p (%d)\n",
PCPU_GET(fpcurthread),
PCPU_GET(fpcurthread)->td_proc->p_pid,
curthread, curthread->td_proc->p_pid);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
panic("npxdna");
}
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
s = intr_disable();
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
stop_emulating();
/*
* Record new context early in case frstor causes an IRQ13.
*/
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
PCPU_SET(fpcurthread, curthread);
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
pcb = PCPU_GET(curpcb);
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
if ((pcb->pcb_flags & PCB_NPXINITDONE) == 0) {
/*
* This is the first time this thread has used the FPU or
* the PCB doesn't contain a clean FPU state. Explicitly
* initialize the FPU and load the default control word.
*/
fninit();
control = __INITIAL_NPXCW__;
fldcw(&control);
Initialize the mxcsr properly, so the initial value in a process isn't just the value that was left over from some other application.
2005-03-17 22:21:36 +00:00
#ifdef CPU_ENABLE_SSE
if (cpu_fxsr) {
mxcsr = __INITIAL_MXCSR__;
ldmxcsr(mxcsr);
}
#endif
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
pcb->pcb_flags |= PCB_NPXINITDONE;
} else {
/*
* The following frstor may cause an IRQ13 when the state
* being restored has a pending error. The error will
* appear to have been triggered by the current (npx) user
* instruction even when that instruction is a no-wait
* instruction that should not trigger an error (e.g.,
* fnclex). On at least one 486 system all of the no-wait
* instructions are broken the same as frstor, so our
* treatment does not amplify the breakage. On at least
* one 386/Cyrix 387 system, fnclex works correctly while
* frstor and fnsave are broken, so our treatment breaks
* fnclex if it is the first FPU instruction after a context
* switch.
*/
fpurstor(&pcb->pcb_save);
}
Fix abuses of cpu_critical_{enter,exit} by converting to intr_{disable,restore} as well as providing an implemenation of intr_{disable,restore}. Reviewed by: jake, rwatson, jhb
2002-03-21 06:19:08 +00:00
intr_restore(s);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
return (1);
}
/*
Throw away the complications in npxsave() and their infrastructure. npxsave() went to great lengths to excecute fnsave with interrupts enabled in case executing it froze the CPU. This case can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply spurious freezes. Anyway, the complications were usually no-ops because IRQ13 is not used on i486's and newer CPUs, and because SMPng broke them in rev.1.84. Forcible enabling of interrupts was changed to write_eflags(old_eflags), but since SMPng usually calls npxsave() from cpu_switch() with interrupts disabled, write_eflags() usually just kept interrupts disabled.
2001-05-20 20:04:40 +00:00
* Wrapper for fnsave instruction, partly to handle hardware bugs. When npx
* exceptions are reported via IRQ13, spurious IRQ13's may be triggered by
* no-wait npx instructions. See the Intel application note AP-578 for
* details. This doesn't cause any additional complications here. IRQ13's
* are inherently asynchronous unless the CPU is frozen to deliver them --
* one that started in userland may be delivered many instructions later,
* after the process has entered the kernel. It may even be delivered after
* the fnsave here completes. A spurious IRQ13 for the fnsave is handled in
* the same way as a very-late-arriving non-spurious IRQ13 from user mode:
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* it is normally ignored at first because we set fpcurthread to NULL; it is
Throw away the complications in npxsave() and their infrastructure. npxsave() went to great lengths to excecute fnsave with interrupts enabled in case executing it froze the CPU. This case can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply spurious freezes. Anyway, the complications were usually no-ops because IRQ13 is not used on i486's and newer CPUs, and because SMPng broke them in rev.1.84. Forcible enabling of interrupts was changed to write_eflags(old_eflags), but since SMPng usually calls npxsave() from cpu_switch() with interrupts disabled, write_eflags() usually just kept interrupts disabled.
2001-05-20 20:04:40 +00:00
* normally retriggered in npxdna() after return to user mode.
*
* npxsave() must be called with interrupts disabled, so that it clears
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* fpcurthread atomically with saving the state. We require callers to do the
Throw away the complications in npxsave() and their infrastructure. npxsave() went to great lengths to excecute fnsave with interrupts enabled in case executing it froze the CPU. This case can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply spurious freezes. Anyway, the complications were usually no-ops because IRQ13 is not used on i486's and newer CPUs, and because SMPng broke them in rev.1.84. Forcible enabling of interrupts was changed to write_eflags(old_eflags), but since SMPng usually calls npxsave() from cpu_switch() with interrupts disabled, write_eflags() usually just kept interrupts disabled.
2001-05-20 20:04:40 +00:00
* disabling, since most callers need to disable interrupts anyway to call
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
* npxsave() atomically with checking fpcurthread.
Throw away the complications in npxsave() and their infrastructure. npxsave() went to great lengths to excecute fnsave with interrupts enabled in case executing it froze the CPU. This case can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply spurious freezes. Anyway, the complications were usually no-ops because IRQ13 is not used on i486's and newer CPUs, and because SMPng broke them in rev.1.84. Forcible enabling of interrupts was changed to write_eflags(old_eflags), but since SMPng usually calls npxsave() from cpu_switch() with interrupts disabled, write_eflags() usually just kept interrupts disabled.
2001-05-20 20:04:40 +00:00
*
* A previous version of npxsave() went to great lengths to excecute fnsave
* with interrupts enabled in case executing it froze the CPU. This case
* can't happen, at least for Intel CPU/NPX's. Spurious IRQ13's don't imply
* spurious freezes.
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
*/
void
npxsave(addr)
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
union savefpu *addr;
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
{
Made the SMP case ignore the possibility of an INT13 interface. This eliminates all the APIC code, and thus several routines that would otherwise need to be made MP-safe. Reviewed by: Bruce Evans <bde@zeta.org.au>
1997-07-21 07:57:50 +00:00
stop_emulating();
Use PCPU_GET(cpuid) instead of curproc->p_oncpu. Reviewed by: peter
2001-07-16 06:00:23 +00:00
fpusave(addr);
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
Made the SMP case ignore the possibility of an INT13 interface. This eliminates all the APIC code, and thus several routines that would otherwise need to be made MP-safe. Reviewed by: Bruce Evans <bde@zeta.org.au>
1997-07-21 07:57:50 +00:00
start_emulating();
Overhaul the per-CPU support a bit: - The MI portions of struct globaldata have been consolidated into a MI struct pcpu. The MD per-CPU data are specified via a macro defined in machine/pcpu.h. A macro was chosen over a struct mdpcpu so that the interface would be cleaner (PCPU_GET(my_md_field) vs. PCPU_GET(md.md_my_md_field)). - All references to globaldata are changed to pcpu instead. In a UP kernel, this data was stored as global variables which is where the original name came from. In an SMP world this data is per-CPU and ideally private to each CPU outside of the context of debuggers. This also included combining machine/globaldata.h and machine/globals.h into machine/pcpu.h. - The pointer to the thread using the FPU on i386 was renamed from npxthread to fpcurthread to be identical with other architectures. - Make the show pcpu ddb command MI with a MD callout to display MD fields. - The globaldata_register() function was renamed to pcpu_init() and now init's MI fields of a struct pcpu in addition to registering it with the internal array and list. - A pcpu_destroy() function was added to remove a struct pcpu from the internal array and list. Tested on: alpha, i386 Reviewed by: peter, jake
2001-12-11 23:33:44 +00:00
PCPU_SET(fpcurthread, NULL);
Initial import, 0.1 + pk 0.2.4-B1
1993-06-12 14:58:17 +00:00
}
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
/*
* This should be called with interrupts disabled and only when the owning
* FPU thread is non-null.
*/
void
npxdrop()
{
struct thread *td;
Fixed a panic caused by over-optimizing npxdrop() in the non-FXSR case. frstor can trap despite it being a control instruction, since it bogusly checks for pending exceptions in the state that it is overwriting. This used to be a non-problem because frstor was always paired with a previous fnsave, and fnsave does an implicit fninit so any pending exceptions only remain live in the saved state. Now frstor is sometimes paired with npxdrop() and we must do a little more than just forget that the npx was used in npxdrop() to avoid a trap later. This is a non-problem in the FXSR case because fxrstor doesn't do the bogus check. FXSR is part of SSE, and npxdrop() is only in FreeBSD-5.x, so this bug only affected old machines running FreeBSD-5.x. PR: 68058
2004-06-18 02:10:55 +00:00
/*
* Discard pending exceptions in the !cpu_fxsr case so that unmasked
* ones don't cause a panic on the next frstor.
*/
#ifdef CPU_ENABLE_SSE
if (!cpu_fxsr)
#endif
fnclex();
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
td = PCPU_GET(fpcurthread);
PCPU_SET(fpcurthread, NULL);
td->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
start_emulating();
}
/*
* Get the state of the FPU without dropping ownership (if possible).
* It returns the FPU ownership status.
*/
int
npxgetregs(td, addr)
struct thread *td;
union savefpu *addr;
{
register_t s;
if (!npx_exists)
return (_MC_FPOWNED_NONE);
if ((td->td_pcb->pcb_flags & PCB_NPXINITDONE) == 0) {
if (npx_cleanstate_ready)
bcopy(&npx_cleanstate, addr, sizeof(npx_cleanstate));
else
bzero(addr, sizeof(*addr));
return (_MC_FPOWNED_NONE);
}
s = intr_disable();
- In npxgetregs() use the td argument to save the fpu state from and not curthread. Nothing currently depends on this behavior. - Clean up an extra newline. Obtained from: bde
2003-04-01 00:16:32 +00:00
if (td == PCPU_GET(fpcurthread)) {
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
fpusave(addr);
#ifdef CPU_ENABLE_SSE
if (!cpu_fxsr)
#endif
/*
* fnsave initializes the FPU and destroys whatever
* context it contains. Make sure the FPU owner
* starts with a clean state next time.
*/
npxdrop();
intr_restore(s);
return (_MC_FPOWNED_FPU);
} else {
intr_restore(s);
bcopy(&td->td_pcb->pcb_save, addr, sizeof(*addr));
return (_MC_FPOWNED_PCB);
}
}
/*
* Set the state of the FPU.
*/
void
npxsetregs(td, addr)
struct thread *td;
union savefpu *addr;
{
register_t s;
if (!npx_exists)
return;
s = intr_disable();
- In npxsetregs don't set the floating point if td == fpcurthread not if curthread == fpcurthread. This is important when we're saving the fp state for a thread other than curthread as in from set_mcontext.
2003-03-31 00:32:43 +00:00
if (td == PCPU_GET(fpcurthread)) {
Clear any pending exceptions before using frstor (in the non-FXSR case) in npxsetregs() too. npxsetregs() must overwrite the previous state, and it is never paired with an npxgetregs() that would defuse the previous state (since npxgetregs() would have fninit'ed the state, leaving nothing to do). PR: 68058 (this should complete the fix) Tested by: Simon Barner <barner@in.tum.de>
2004-06-19 22:24:16 +00:00
#ifdef CPU_ENABLE_SSE
if (!cpu_fxsr)
#endif
fnclex(); /* As in npxdrop(). */
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
fpurstor(addr);
intr_restore(s);
} else {
intr_restore(s);
bcopy(addr, &td->td_pcb->pcb_save, sizeof(*addr));
}
Finish fixing the 5.x FPU code for dealing with signal handlers. Obtained from: bde
2002-10-25 19:12:16 +00:00
curthread->td_pcb->pcb_flags |= PCB_NPXINITDONE;
Add kernel support needed for the KSE-aware libpthread: - Maintain fpu state across signals. - Save and restore FPU state properly in ucontext_t's. Reviewed by: bde, deischen, julian Approved by: -arch
2002-09-16 19:25:59 +00:00
}
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
static void
Use PCPU_GET(cpuid) instead of curproc->p_oncpu. Reviewed by: peter
2001-07-16 06:00:23 +00:00
fpusave(addr)
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
union savefpu *addr;
{
Dont compile in SSE fxsave/fxrstor instructions if CPU_ENABLE_SSE isn't active.
2001-08-23 01:03:56 +00:00
#ifdef CPU_ENABLE_SSE
if (cpu_fxsr)
The per-cpu temporary buffers are not needed since the pcb_save areas have the proper alignment. Change dummy variable in npxinit from stack to bss to ensure proper alignment. Reviewed by: bde
2001-07-17 13:06:47 +00:00
fxsave(addr);
Dont compile in SSE fxsave/fxrstor instructions if CPU_ENABLE_SSE isn't active.
2001-08-23 01:03:56 +00:00
else
#endif
fnsave(addr);
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
}
Correct a local information leakage bug affecting AMD FPUs. Security: FreeBSD-SA-06:14.fpu
2006-04-19 07:00:19 +00:00
#ifdef CPU_ENABLE_SSE
/*
* On AuthenticAMD processors, the fxrstor instruction does not restore
* the x87's stored last instruction pointer, last data pointer, and last
* opcode values, except in the rare case in which the exception summary
* (ES) bit in the x87 status word is set to 1.
*
* In order to avoid leaking this information across processes, we clean
* these values by performing a dummy load before executing fxrstor().
*/
static double dummy_variable = 0.0;
static void
fpu_clean_state(void)
{
u_short status;
/*
* Clear the ES bit in the x87 status word if it is currently
* set, in order to avoid causing a fault in the upcoming load.
*/
fnstsw(&status);
if (status & 0x80)
fnclex();
/*
* Load the dummy variable into the x87 stack. This mangles
* the x87 stack, but we don't care since we're about to call
* fxrstor() anyway.
*/
__asm __volatile("ffree %%st(7); fld %0" : : "m" (dummy_variable));
}
#endif /* CPU_ENABLE_SSE */
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
static void
Use PCPU_GET(cpuid) instead of curproc->p_oncpu. Reviewed by: peter
2001-07-16 06:00:23 +00:00
fpurstor(addr)
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
union savefpu *addr;
{
Dont compile in SSE fxsave/fxrstor instructions if CPU_ENABLE_SSE isn't active.
2001-08-23 01:03:56 +00:00
#ifdef CPU_ENABLE_SSE
Correct a local information leakage bug affecting AMD FPUs. Security: FreeBSD-SA-06:14.fpu
2006-04-19 07:00:19 +00:00
if (cpu_fxsr) {
fpu_clean_state();
The per-cpu temporary buffers are not needed since the pcb_save areas have the proper alignment. Change dummy variable in npxinit from stack to bss to ensure proper alignment. Reviewed by: bde
2001-07-17 13:06:47 +00:00
fxrstor(addr);
Correct a local information leakage bug affecting AMD FPUs. Security: FreeBSD-SA-06:14.fpu
2006-04-19 07:00:19 +00:00
} else
Dont compile in SSE fxsave/fxrstor instructions if CPU_ENABLE_SSE isn't active.
2001-08-23 01:03:56 +00:00
#endif
frstor(addr);
Activate SSE/SIMD. This is the extra context switching support that we are required to do if we let user processes use the extra 128 bit registers etc. This is the base part of the diff I got from: http://www.issei.org/issei/FreeBSD/sse.html I believe this is by: Mr. SUZUKI Issei <issei@issei.org> SMP support apparently by: Takekazu KATO <kato@chino.it.okayama-u.ac.jp> Test code by: NAKAMURA Kazushi <kaz@kobe1995.net>, see http://kobe1995.net/~kaz/FreeBSD/SSE.en.html I have fixed a couple of style(9) deviations. I have some followup commits to fix a couple of non-style things.
2001-07-12 06:32:51 +00:00
}
Fix warnings: 908: warning: long unsigned int format, unsigned int arg (arg 3) 887: warning: `timezero' defined but not used
2001-06-15 07:53:20 +00:00
#ifdef I586_CPU_XXX
Only use the i586-optimized copying and zeroing functions if they are actually faster (more than 20% faster for zeroing 1 MB at boot time). This fixes pessimized copying and zeroing on K6's and perhaps on other CPUs that are misclassified as i586's.
1998-02-12 21:41:10 +00:00
static long
timezero(funcname, func)
const char *funcname;
Remove __P.
2002-03-20 07:51:46 +00:00
void (*func)(void *buf, size_t len);
Only use the i586-optimized copying and zeroing functions if they are actually faster (more than 20% faster for zeroing 1 MB at boot time). This fixes pessimized copying and zeroing on K6's and perhaps on other CPUs that are misclassified as i586's.
1998-02-12 21:41:10 +00:00
{
void *buf;
Show the bzero() bandwidth in kBps instead of Bps; use u_int32_t instead of long and int64_t; and print the result as an unsigned long. This should make the output from the bzero() test more readable, and avoid printing a negative bandwidth. Note that this doesn't change the decision process, since that is based on time elapsed, not on computed bandwidth.
2001-03-19 00:28:04 +00:00
#define BUFSIZE 1048576
Only use the i586-optimized copying and zeroing functions if they are actually faster (more than 20% faster for zeroing 1 MB at boot time). This fixes pessimized copying and zeroing on K6's and perhaps on other CPUs that are misclassified as i586's.
1998-02-12 21:41:10 +00:00
long usec;
struct timeval finish, start;
buf = malloc(BUFSIZE, M_TEMP, M_NOWAIT);
if (buf == NULL)
return (BUFSIZE);
microtime(&start);
(*func)(buf, BUFSIZE);
microtime(&finish);
usec = 1000000 * (finish.tv_sec - start.tv_sec) +
finish.tv_usec - start.tv_usec;
if (usec <= 0)
usec = 1;
if (bootverbose)
Fix warnings: 908: warning: long unsigned int format, unsigned int arg (arg 3) 887: warning: `timezero' defined but not used
2001-06-15 07:53:20 +00:00
printf("%s bandwidth = %u kBps\n", funcname,
Show the bzero() bandwidth in kBps instead of Bps; use u_int32_t instead of long and int64_t; and print the result as an unsigned long. This should make the output from the bzero() test more readable, and avoid printing a negative bandwidth. Note that this doesn't change the decision process, since that is based on time elapsed, not on computed bandwidth.
2001-03-19 00:28:04 +00:00
(u_int32_t)(((BUFSIZE >> 10) * 1000000) / usec));
Only use the i586-optimized copying and zeroing functions if they are actually faster (more than 20% faster for zeroing 1 MB at boot time). This fixes pessimized copying and zeroing on K6's and perhaps on other CPUs that are misclassified as i586's.
1998-02-12 21:41:10 +00:00
free(buf, M_TEMP);
return (usec);
}
#endif /* I586_CPU */
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
static device_method_t npx_methods[] = {
/* Device interface */
Add an identify method to allow npx to arrange itself to be attached to the nexus without explicit code in the nexus to do so.
1999-08-22 19:52:51 +00:00
DEVMETHOD(device_identify, npx_identify),
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
DEVMETHOD(device_probe, npx_probe),
DEVMETHOD(device_attach, npx_attach),
DEVMETHOD(device_detach, bus_generic_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
{ 0, 0 }
};
static driver_t npx_driver = {
"npx",
npx_methods,
1, /* no softc */
};
static devclass_t npx_devclass;
/*
* We prefer to attach to the root nexus so that the usual case (exception 16)
* doesn't describe the processor as being `on isa'.
*/
DRIVER_MODULE(npx, nexus, npx_driver, npx_devclass, 0, 0);
Add a little do-nothing ``slopsucker'' device which gives a home to PNP0c04 (legacy ISA coprocessor support). Tourist info.
2000-05-04 23:57:32 +00:00
Fixed a misplaced ifdef that prevented npx.c building without "device isa" ISA. npx has few isa dependencies, but it does unconditional outb()'s to the isa bus in the !SMP case, and it attaches to isa if "device isa" is configured in order to support PNP-ISA. The ifdef for the latter was misplaced. PR: 62595
2004-02-13 18:04:51 +00:00
#ifdef DEV_ISA
Add a little do-nothing ``slopsucker'' device which gives a home to PNP0c04 (legacy ISA coprocessor support). Tourist info.
2000-05-04 23:57:32 +00:00
/*
Add ACPI attachments.
2001-08-30 09:17:03 +00:00
* This sucks up the legacy ISA support assignments from PNPBIOS/ACPI.
Add a little do-nothing ``slopsucker'' device which gives a home to PNP0c04 (legacy ISA coprocessor support). Tourist info.
2000-05-04 23:57:32 +00:00
*/
static struct isa_pnp_id npxisa_ids[] = {
{ 0x040cd041, "Legacy ISA coprocessor support" }, /* PNP0C04 */
{ 0 }
};
static int
npxisa_probe(device_t dev)
{
Make the PnP 'slopsucker' quiet in the !bootverbose case - the real NPX probe happens much earlier, and may come to very different conclusions about the system's NPX setup.
2000-06-23 08:19:50 +00:00
int result;
if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, npxisa_ids)) <= 0) {
device_quiet(dev);
}
return(result);
Add a little do-nothing ``slopsucker'' device which gives a home to PNP0c04 (legacy ISA coprocessor support). Tourist info.
2000-05-04 23:57:32 +00:00
}
static int
npxisa_attach(device_t dev)
{
return (0);
}
static device_method_t npxisa_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, npxisa_probe),
DEVMETHOD(device_attach, npxisa_attach),
DEVMETHOD(device_detach, bus_generic_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
{ 0, 0 }
};
static driver_t npxisa_driver = {
"npxisa",
npxisa_methods,
1, /* no softc */
};
static devclass_t npxisa_devclass;
DRIVER_MODULE(npxisa, isa, npxisa_driver, npxisa_devclass, 0, 0);
MFi386: - sys/pc98/pc98/npx.c 1.87 (2001/09/15; author: imp) I don't think pc98 has acpi at all, so ifdef the acpi attachments for now. This completes merging sys/pc98/pc98/npx.c into sys/i386/isa/npx.c so that the former can be removed.
2001-10-21 06:05:08 +00:00
#ifndef PC98
Add ACPI attachments.
2001-08-30 09:17:03 +00:00
DRIVER_MODULE(npxisa, acpi, npxisa_driver, npxisa_devclass, 0, 0);
MFi386: - sys/pc98/pc98/npx.c 1.87 (2001/09/15; author: imp) I don't think pc98 has acpi at all, so ifdef the acpi attachments for now. This completes merging sys/pc98/pc98/npx.c into sys/i386/isa/npx.c so that the former can be removed.
2001-10-21 06:05:08 +00:00
#endif
Don't include <isa/isavar.h> or compile code depending on it when isa is not configured. Including <isa/isavar.h> when it is not used is harmful as well as bogus, since it includes "isa_if.h" which is not generated when isa is not configured. This was fixed in 1999 but was broken by unconditionalizing PNPBIOS.
2002-01-30 12:41:12 +00:00
#endif /* DEV_ISA */
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