Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
|
|
|
/*
|
|
|
|
* Copyright (c) 1997, Stefan Esser <se@freebsd.org>
|
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice unmodified, this list of conditions, and the following
|
|
|
|
* disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
|
|
|
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
|
|
|
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
|
|
|
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|
|
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
|
|
|
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
*
|
1999-08-28 01:08:13 +00:00
|
|
|
* $FreeBSD$
|
Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
1998-09-15 08:21:13 +00:00
|
|
|
#ifndef _PCIVAR_H_
|
|
|
|
#define _PCIVAR_H_
|
|
|
|
|
|
|
|
#include <sys/queue.h>
|
|
|
|
|
Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
|
|
|
/* some PCI bus constants */
|
|
|
|
|
|
|
|
#define PCI_BUSMAX 255 /* highest supported bus number */
|
|
|
|
#define PCI_SLOTMAX 31 /* highest supported slot number */
|
|
|
|
#define PCI_FUNCMAX 7 /* highest supported function number */
|
|
|
|
#define PCI_REGMAX 255 /* highest supported config register addr. */
|
|
|
|
|
|
|
|
#define PCI_MAXMAPS_0 6 /* max. no. of memory/port maps */
|
|
|
|
#define PCI_MAXMAPS_1 2 /* max. no. of maps for PCI to PCI bridge */
|
|
|
|
#define PCI_MAXMAPS_2 1 /* max. no. of maps for CardBus bridge */
|
|
|
|
|
|
|
|
/* pci_addr_t covers this system's PCI bus address space: 32 or 64 bit */
|
|
|
|
|
|
|
|
#ifdef PCI_A64
|
|
|
|
typedef u_int64_t pci_addr_t; /* u_int64_t for system with 64bit addresses */
|
|
|
|
#else
|
|
|
|
typedef u_int32_t pci_addr_t; /* u_int64_t for system with 64bit addresses */
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* config header information common to all header types */
|
|
|
|
|
|
|
|
typedef struct pcicfg {
|
1999-04-16 21:22:55 +00:00
|
|
|
struct device *dev; /* device which owns this */
|
Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
|
|
|
|
|
|
|
u_int16_t subvendor; /* card vendor ID */
|
|
|
|
u_int16_t subdevice; /* card device ID, assigned by card vendor */
|
|
|
|
u_int16_t vendor; /* chip vendor ID */
|
|
|
|
u_int16_t device; /* chip device ID, assigned by chip vendor */
|
|
|
|
|
|
|
|
u_int16_t cmdreg; /* disable/enable chip and PCI options */
|
|
|
|
u_int16_t statreg; /* supported PCI features and error state */
|
|
|
|
|
1998-08-13 19:12:20 +00:00
|
|
|
u_int8_t baseclass; /* chip PCI class */
|
Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
|
|
|
u_int8_t subclass; /* chip PCI subclass */
|
|
|
|
u_int8_t progif; /* chip PCI programming interface */
|
|
|
|
u_int8_t revid; /* chip revision ID */
|
|
|
|
|
|
|
|
u_int8_t hdrtype; /* chip config header type */
|
|
|
|
u_int8_t cachelnsz; /* cache line size in 4byte units */
|
|
|
|
u_int8_t intpin; /* PCI interrupt pin */
|
|
|
|
u_int8_t intline; /* interrupt line (IRQ for PC arch) */
|
|
|
|
|
|
|
|
u_int8_t mingnt; /* min. useful bus grant time in 250ns units */
|
|
|
|
u_int8_t maxlat; /* max. tolerated bus grant latency in 250ns */
|
|
|
|
u_int8_t lattimer; /* latency timer in units of 30ns bus cycles */
|
|
|
|
|
|
|
|
u_int8_t mfdev; /* multi-function device (from hdrtype reg) */
|
|
|
|
u_int8_t nummaps; /* actual number of PCI maps used */
|
|
|
|
|
|
|
|
u_int8_t bus; /* config space bus address */
|
|
|
|
u_int8_t slot; /* config space slot address */
|
|
|
|
u_int8_t func; /* config space function number */
|
|
|
|
|
2000-12-13 01:25:11 +00:00
|
|
|
u_int16_t pp_cap; /* PCI power management capabilities */
|
|
|
|
u_int8_t pp_status; /* config space address of PCI power status reg */
|
|
|
|
u_int8_t pp_pmcsr; /* config space address of PMCSR reg */
|
|
|
|
u_int8_t pp_data; /* config space address of PCI power data reg */
|
|
|
|
|
Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
|
|
|
} pcicfgregs;
|
|
|
|
|
|
|
|
/* additional type 1 device config header information (PCI to PCI bridge) */
|
|
|
|
|
|
|
|
#ifdef PCI_A64
|
|
|
|
#define PCI_PPBMEMBASE(h,l) ((((pci_addr_t)(h) << 32) + ((l)<<16)) & ~0xfffff)
|
|
|
|
#define PCI_PPBMEMLIMIT(h,l) ((((pci_addr_t)(h) << 32) + ((l)<<16)) | 0xfffff)
|
|
|
|
#else
|
|
|
|
#define PCI_PPBMEMBASE(h,l) (((l)<<16) & ~0xfffff)
|
|
|
|
#define PCI_PPBMEMLIMIT(h,l) (((l)<<16) | 0xfffff)
|
|
|
|
#endif /* PCI_A64 */
|
|
|
|
|
|
|
|
#define PCI_PPBIOBASE(h,l) ((((h)<<16) + ((l)<<8)) & ~0xfff)
|
|
|
|
#define PCI_PPBIOLIMIT(h,l) ((((h)<<16) + ((l)<<8)) | 0xfff)
|
|
|
|
|
|
|
|
typedef struct {
|
|
|
|
pci_addr_t pmembase; /* base address of prefetchable memory */
|
|
|
|
pci_addr_t pmemlimit; /* topmost address of prefetchable memory */
|
|
|
|
u_int32_t membase; /* base address of memory window */
|
|
|
|
u_int32_t memlimit; /* topmost address of memory window */
|
|
|
|
u_int32_t iobase; /* base address of port window */
|
|
|
|
u_int32_t iolimit; /* topmost address of port window */
|
|
|
|
u_int16_t secstat; /* secondary bus status register */
|
|
|
|
u_int16_t bridgectl; /* bridge control register */
|
|
|
|
u_int8_t seclat; /* CardBus latency timer */
|
|
|
|
} pcih1cfgregs;
|
|
|
|
|
|
|
|
/* additional type 2 device config header information (CardBus bridge) */
|
|
|
|
|
|
|
|
typedef struct {
|
|
|
|
u_int32_t membase0; /* base address of memory window */
|
|
|
|
u_int32_t memlimit0; /* topmost address of memory window */
|
|
|
|
u_int32_t membase1; /* base address of memory window */
|
|
|
|
u_int32_t memlimit1; /* topmost address of memory window */
|
|
|
|
u_int32_t iobase0; /* base address of port window */
|
|
|
|
u_int32_t iolimit0; /* topmost address of port window */
|
|
|
|
u_int32_t iobase1; /* base address of port window */
|
|
|
|
u_int32_t iolimit1; /* topmost address of port window */
|
|
|
|
u_int32_t pccardif; /* PC Card 16bit IF legacy more base addr. */
|
|
|
|
u_int16_t secstat; /* secondary bus status register */
|
|
|
|
u_int16_t bridgectl; /* bridge control register */
|
|
|
|
u_int8_t seclat; /* CardBus latency timer */
|
|
|
|
} pcih2cfgregs;
|
|
|
|
|
1998-09-15 08:21:13 +00:00
|
|
|
extern u_int32_t pci_numdevs;
|
|
|
|
|
2000-05-28 16:35:57 +00:00
|
|
|
/* Only if the prerequisites are present */
|
|
|
|
#if defined(_SYS_BUS_H_) && defined(_SYS_PCIIO_H_)
|
|
|
|
struct pci_devinfo {
|
|
|
|
STAILQ_ENTRY(pci_devinfo) pci_links;
|
|
|
|
struct resource_list resources;
|
|
|
|
pcicfgregs cfg;
|
|
|
|
struct pci_conf conf;
|
|
|
|
};
|
|
|
|
#endif
|
1998-09-15 08:21:13 +00:00
|
|
|
|
1998-10-06 14:18:40 +00:00
|
|
|
#ifdef __alpha__
|
|
|
|
vm_offset_t pci_cvt_to_dense (vm_offset_t);
|
|
|
|
vm_offset_t pci_cvt_to_bwx (vm_offset_t);
|
|
|
|
#endif /* __alpha__ */
|
1999-04-16 21:22:55 +00:00
|
|
|
|
|
|
|
#ifdef _SYS_BUS_H_
|
|
|
|
|
|
|
|
#include "pci_if.h"
|
|
|
|
|
1999-10-14 21:38:33 +00:00
|
|
|
/*
|
|
|
|
* Define pci-specific resource flags for accessing memory via dense
|
|
|
|
* or bwx memory spaces. These flags are ignored on i386.
|
|
|
|
*/
|
|
|
|
#define PCI_RF_DENSE 0x10000
|
|
|
|
#define PCI_RF_BWX 0x20000
|
|
|
|
|
1999-04-16 21:22:55 +00:00
|
|
|
enum pci_device_ivars {
|
2000-12-13 01:25:11 +00:00
|
|
|
PCI_IVAR_SUBVENDOR,
|
|
|
|
PCI_IVAR_SUBDEVICE,
|
|
|
|
PCI_IVAR_VENDOR,
|
|
|
|
PCI_IVAR_DEVICE,
|
|
|
|
PCI_IVAR_DEVID,
|
|
|
|
PCI_IVAR_CLASS,
|
|
|
|
PCI_IVAR_SUBCLASS,
|
|
|
|
PCI_IVAR_PROGIF,
|
|
|
|
PCI_IVAR_REVID,
|
|
|
|
PCI_IVAR_INTPIN,
|
|
|
|
PCI_IVAR_IRQ,
|
|
|
|
PCI_IVAR_BUS,
|
|
|
|
PCI_IVAR_SLOT,
|
|
|
|
PCI_IVAR_FUNCTION,
|
1999-04-16 21:22:55 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Simplified accessors for pci devices
|
|
|
|
*/
|
2001-12-21 21:49:57 +00:00
|
|
|
#define PCI_ACCESSOR(var, ivar, type) \
|
|
|
|
__BUS_ACCESSOR(pci, var, PCI, ivar, type)
|
1999-04-16 21:22:55 +00:00
|
|
|
|
|
|
|
PCI_ACCESSOR(subvendor, SUBVENDOR, u_int16_t)
|
|
|
|
PCI_ACCESSOR(subdevice, SUBDEVICE, u_int16_t)
|
|
|
|
PCI_ACCESSOR(vendor, VENDOR, u_int16_t)
|
|
|
|
PCI_ACCESSOR(device, DEVICE, u_int16_t)
|
|
|
|
PCI_ACCESSOR(devid, DEVID, u_int32_t)
|
|
|
|
PCI_ACCESSOR(class, CLASS, u_int8_t)
|
|
|
|
PCI_ACCESSOR(subclass, SUBCLASS, u_int8_t)
|
|
|
|
PCI_ACCESSOR(progif, PROGIF, u_int8_t)
|
|
|
|
PCI_ACCESSOR(revid, REVID, u_int8_t)
|
|
|
|
PCI_ACCESSOR(intpin, INTPIN, u_int8_t)
|
|
|
|
PCI_ACCESSOR(irq, IRQ, u_int8_t)
|
|
|
|
PCI_ACCESSOR(bus, BUS, u_int8_t)
|
|
|
|
PCI_ACCESSOR(slot, SLOT, u_int8_t)
|
|
|
|
PCI_ACCESSOR(function, FUNCTION, u_int8_t)
|
|
|
|
|
2000-09-28 00:37:32 +00:00
|
|
|
#undef PCI_ACCESSOR
|
|
|
|
|
2000-12-13 01:25:11 +00:00
|
|
|
/*
|
|
|
|
* Operations on configuration space.
|
|
|
|
*/
|
1999-04-16 21:22:55 +00:00
|
|
|
static __inline u_int32_t
|
|
|
|
pci_read_config(device_t dev, int reg, int width)
|
|
|
|
{
|
|
|
|
return PCI_READ_CONFIG(device_get_parent(dev), dev, reg, width);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
pci_write_config(device_t dev, int reg, u_int32_t val, int width)
|
|
|
|
{
|
|
|
|
PCI_WRITE_CONFIG(device_get_parent(dev), dev, reg, val, width);
|
|
|
|
}
|
|
|
|
|
1999-05-20 15:33:33 +00:00
|
|
|
/*
|
|
|
|
* Ivars for pci bridges.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*typedef enum pci_device_ivars pcib_device_ivars;*/
|
|
|
|
enum pcib_device_ivars {
|
2000-08-28 21:48:13 +00:00
|
|
|
PCIB_IVAR_BUS
|
1999-05-20 15:33:33 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
#define PCIB_ACCESSOR(A, B, T) \
|
|
|
|
\
|
|
|
|
static __inline T pcib_get_ ## A(device_t dev) \
|
|
|
|
{ \
|
2000-12-13 01:25:11 +00:00
|
|
|
uintptr_t v; \
|
|
|
|
BUS_READ_IVAR(device_get_parent(dev), dev, PCIB_IVAR_ ## B, &v); \
|
|
|
|
return (T) v; \
|
1999-05-20 15:33:33 +00:00
|
|
|
} \
|
|
|
|
\
|
|
|
|
static __inline void pcib_set_ ## A(device_t dev, T t) \
|
|
|
|
{ \
|
2000-12-13 01:25:11 +00:00
|
|
|
uintptr_t v = (uintptr_t) t; \
|
|
|
|
BUS_WRITE_IVAR(device_get_parent(dev), dev, PCIB_IVAR_ ## B, v); \
|
1999-05-20 15:33:33 +00:00
|
|
|
}
|
|
|
|
|
2000-08-28 21:48:13 +00:00
|
|
|
PCIB_ACCESSOR(bus, BUS, u_int32_t)
|
1999-05-20 15:33:33 +00:00
|
|
|
|
2000-09-28 00:37:32 +00:00
|
|
|
#undef PCIB_ACCESSOR
|
|
|
|
|
2000-12-13 01:25:11 +00:00
|
|
|
/*
|
|
|
|
* Convenience functions.
|
|
|
|
*
|
|
|
|
* These should be used in preference to manually manipulating
|
|
|
|
* configuration space.
|
|
|
|
*/
|
2001-02-27 23:13:20 +00:00
|
|
|
static __inline void
|
|
|
|
pci_enable_busmaster(device_t dev)
|
|
|
|
{
|
|
|
|
PCI_ENABLE_BUSMASTER(device_get_parent(dev), dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
pci_disable_busmaster(device_t dev)
|
|
|
|
{
|
|
|
|
PCI_DISABLE_BUSMASTER(device_get_parent(dev), dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
pci_enable_io(device_t dev, int space)
|
|
|
|
{
|
|
|
|
PCI_ENABLE_IO(device_get_parent(dev), dev, space);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
pci_disable_io(device_t dev, int space)
|
|
|
|
{
|
|
|
|
PCI_DISABLE_IO(device_get_parent(dev), dev, space);
|
|
|
|
}
|
Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
|
|
|
|
2000-12-13 01:25:11 +00:00
|
|
|
/*
|
|
|
|
* PCI power states are as defined by ACPI:
|
|
|
|
*
|
|
|
|
* D0 State in which device is on and running. It is receiving full
|
|
|
|
* power from the system and delivering full functionality to the user.
|
|
|
|
* D1 Class-specific low-power state in which device context may or may not
|
|
|
|
* be lost. Buses in D1 cannot do anything to the bus that would force
|
|
|
|
* devices on that bus to loose context.
|
|
|
|
* D2 Class-specific low-power state in which device context may or may
|
|
|
|
* not be lost. Attains greater power savings than D1. Buses in D2
|
|
|
|
* can cause devices on that bus to loose some context. Devices in D2
|
|
|
|
* must be prepared for the bus to be in D2 or higher.
|
|
|
|
* D3 State in which the device is off and not running. Device context is
|
|
|
|
* lost. Power can be removed from the device.
|
|
|
|
*/
|
|
|
|
#define PCI_POWERSTATE_D0 0
|
|
|
|
#define PCI_POWERSTATE_D1 1
|
|
|
|
#define PCI_POWERSTATE_D2 2
|
|
|
|
#define PCI_POWERSTATE_D3 3
|
|
|
|
#define PCI_POWERSTATE_UNKNOWN -1
|
Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
|
|
|
|
2001-02-27 23:13:20 +00:00
|
|
|
static __inline int
|
|
|
|
pci_set_powerstate(device_t dev, int state)
|
|
|
|
{
|
|
|
|
return PCI_SET_POWERSTATE(device_get_parent(dev), dev, state);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline int
|
|
|
|
pci_get_powerstate(device_t dev)
|
|
|
|
{
|
|
|
|
return PCI_GET_POWERSTATE(device_get_parent(dev), dev);
|
|
|
|
}
|
Completely replace the PCI bus driver code to make it better reflect
reality. There will be a new call interface, but for now the file
pci_compat.c (which is to be deleted, after all drivers are converted)
provides an emulation of the old PCI bus driver functions. The only
change that might be visible to drivers is, that the type pcici_t
(which had been meant to be just a handle, whose exact definition
should not be relied on), has been converted into a pcicfgregs* .
The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t
and has been converted to just call the PCI drivers functions to access
configuration space register, instead of inventing its own ...
This code is by no means complete, but assumed to be fully operational,
and brings the official code base more in line with my development code.
A new generic device descriptor data type has to be agreed on. The PCI
code will then use that data type to provide new functionality:
1) userconfig support
2) "wired" PCI devices
3) conflicts checking against ISA/EISA
4) maps will depend on the command register enable bits
5) PCI to Anything bridges can be defined as devices,
and are probed like any "standard" PCI device.
The following features are currently missing, but will be added back,
soon:
1) unknown device probe message
2) suppression of "mirrored" devices caused by ancient, broken chip-sets
This code relies on generic shared interrupt support just commited to
kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
|
|
|
|
2000-12-13 01:25:11 +00:00
|
|
|
#endif /* _SYS_BUS_H_ */
|
1995-02-01 22:56:55 +00:00
|
|
|
|
2000-12-13 01:25:11 +00:00
|
|
|
/*
|
|
|
|
* cdev switch for control device, initialised in generic PCI code
|
|
|
|
*/
|
|
|
|
extern struct cdevsw pcicdev;
|
1998-07-22 08:39:08 +00:00
|
|
|
|
2000-12-13 01:25:11 +00:00
|
|
|
/*
|
|
|
|
* List of all PCI devices, generation count for the list.
|
|
|
|
*/
|
2001-12-19 08:49:11 +00:00
|
|
|
STAILQ_HEAD(devlist, pci_devinfo);
|
|
|
|
|
|
|
|
extern struct devlist pci_devq;
|
|
|
|
extern u_int32_t pci_generation;
|
1999-04-24 19:59:20 +00:00
|
|
|
|
1998-09-15 08:21:13 +00:00
|
|
|
#endif /* _PCIVAR_H_ */
|