2014-04-17 12:33:26 +00:00
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/*-
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* Copyright (c) 2012-2014 Bjoern A. Zeeb
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249
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* ("MRC2"), as part of the DARPA MRC research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This driver is modelled after atse(4). We need to seriously reduce the
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* per-driver code we have to write^wcopy & paste.
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*
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* TODO:
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* - figure out on the HW side why some data is LE and some is BE.
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* - general set of improvements possible (e.g., reduce times of copying,
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* do on-the-copy checksum calculations)
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_device_polling.h"
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2014-06-26 17:20:45 +00:00
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#include "opt_netfpga.h"
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2014-04-17 12:33:26 +00:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/types.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <net/if_vlan_var.h>
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#include <net/bpf.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include "if_nf10bmacreg.h"
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#ifndef NF10BMAC_MAX_PKTS
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/*
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* We have a 4k buffer in HW, so do not try to send more than 3 packets.
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* At the time of writing HW is orders of magnitude faster than we can
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* enqueue so it would not matter but need an escape.
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*/
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#define NF10BMAC_MAX_PKTS 3
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#endif
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#ifndef NF10BMAC_WATCHDOG_TIME
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#define NF10BMAC_WATCHDOG_TIME 5 /* seconds */
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#endif
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#ifdef DEVICE_POLLING
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static poll_handler_t nf10bmac_poll;
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#endif
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#define NF10BMAC_LOCK(_sc) mtx_lock(&(_sc)->nf10bmac_mtx)
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#define NF10BMAC_UNLOCK(_sc) mtx_unlock(&(_sc)->nf10bmac_mtx)
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#define NF10BMAC_LOCK_ASSERT(_sc) \
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mtx_assert(&(_sc)->nf10bmac_mtx, MA_OWNED)
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2014-05-09 12:59:38 +00:00
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#define NF10BMAC_CTRL0 0x00
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2014-04-17 12:33:26 +00:00
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#define NF10BMAC_TX_DATA 0x00
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2014-05-09 12:59:38 +00:00
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#define NF10BMAC_TX_META 0x08
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#define NF10BMAC_TX_LEN 0x10
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2014-04-17 12:33:26 +00:00
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#define NF10BMAC_RX_DATA 0x00
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2014-05-09 12:59:38 +00:00
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#define NF10BMAC_RX_META 0x08
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#define NF10BMAC_RX_LEN 0x10
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#define NF10BMAC_INTR_CLEAR_DIS 0x00
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#define NF10BMAC_INTR_CTRL 0x08
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2014-04-17 12:33:26 +00:00
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#define NF10BMAC_TUSER_MAC0 (1 << 0)
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#define NF10BMAC_TUSER_CPU0 (1 << 1)
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#define NF10BMAC_TUSER_MAC1 (1 << 2)
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#define NF10BMAC_TUSER_CPU1 (1 << 3)
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#define NF10BMAC_TUSER_MAC2 (1 << 4)
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#define NF10BMAC_TUSER_CPU2 (1 << 5)
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#define NF10BMAC_TUSER_MAC3 (1 << 6)
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#define NF10BMAC_TUSER_CPU3 (1 << 7)
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2014-05-09 12:59:38 +00:00
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#define NF10BMAC_DATA_LEN_MASK 0x0000ffff
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2014-04-17 12:33:26 +00:00
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#define NF10BMAC_DATA_DPORT_MASK 0xff000000
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#define NF10BMAC_DATA_DPORT_SHIFT 24
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#define NF10BMAC_DATA_SPORT_MASK 0x00ff0000
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#define NF10BMAC_DATA_SPORT_SHIFT 16
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2014-05-09 12:59:38 +00:00
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#define NF10BMAC_DATA_LAST 0x00008000
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2014-06-26 17:10:07 +00:00
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#ifdef NF10BMAC_64BIT
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#define NF10BMAC_DATA_STRB 0x000000ff
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#define REGWTYPE uint64_t
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#else
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2014-04-17 12:33:26 +00:00
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#define NF10BMAC_DATA_STRB 0x0000000f
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2014-06-26 17:10:07 +00:00
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#define REGWTYPE uint32_t
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#endif
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2014-04-17 12:33:26 +00:00
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static inline void
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2014-06-26 17:10:07 +00:00
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nf10bmac_write(struct resource *res, REGWTYPE reg, REGWTYPE val,
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2014-04-17 12:33:26 +00:00
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const char *f __unused, const int l __unused)
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{
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2014-06-26 17:10:07 +00:00
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#ifdef NF10BMAC_64BIT
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bus_write_8(res, reg, htole64(val));
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#else
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2014-06-26 16:49:45 +00:00
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bus_write_4(res, reg, htole32(val));
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2014-06-26 17:10:07 +00:00
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#endif
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2014-04-17 12:33:26 +00:00
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}
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2014-06-26 17:10:07 +00:00
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static inline REGWTYPE
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nf10bmac_read(struct resource *res, REGWTYPE reg,
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2014-04-17 12:33:26 +00:00
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const char *f __unused, const int l __unused)
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{
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2014-06-26 17:10:07 +00:00
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#ifdef NF10BMAC_64BIT
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return (le64toh(bus_read_8(res, reg)));
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#else
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2014-04-17 12:33:26 +00:00
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return (le32toh(bus_read_4(res, reg)));
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2014-06-26 17:10:07 +00:00
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#endif
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2014-04-17 12:33:26 +00:00
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}
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static inline void
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2014-06-26 17:10:07 +00:00
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nf10bmac_write_be(struct resource *res, REGWTYPE reg, REGWTYPE val,
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2014-04-17 12:33:26 +00:00
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const char *f __unused, const int l __unused)
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{
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2014-06-26 17:10:07 +00:00
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#ifdef NF10BMAC_64BIT
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bus_write_8(res, reg, htobe64(val));
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#else
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2014-06-26 16:49:45 +00:00
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bus_write_4(res, reg, htobe32(val));
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2014-06-26 17:10:07 +00:00
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#endif
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2014-04-17 12:33:26 +00:00
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}
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2014-06-26 17:10:07 +00:00
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static inline REGWTYPE
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nf10bmac_read_be(struct resource *res, REGWTYPE reg,
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2014-04-17 12:33:26 +00:00
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const char *f __unused, const int l __unused)
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{
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2014-06-26 17:10:07 +00:00
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#ifdef NF10BMAC_64BIT
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return (be64toh(bus_read_8(res, reg)));
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#else
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2014-04-17 12:33:26 +00:00
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return (be32toh(bus_read_4(res, reg)));
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2014-06-26 17:10:07 +00:00
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#endif
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2014-04-17 12:33:26 +00:00
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}
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2014-06-26 16:49:45 +00:00
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#define NF10BMAC_WRITE_CTRL(sc, reg, val) \
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nf10bmac_write((sc)->nf10bmac_ctrl_res, (reg), (val), \
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2014-04-17 12:33:26 +00:00
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__func__, __LINE__)
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2014-06-26 16:49:45 +00:00
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#define NF10BMAC_WRITE(sc, reg, val) \
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nf10bmac_write((sc)->nf10bmac_tx_mem_res, (reg), (val), \
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2014-04-17 12:33:26 +00:00
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__func__, __LINE__)
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2014-06-26 16:49:45 +00:00
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#define NF10BMAC_READ(sc, reg) \
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nf10bmac_read((sc)->nf10bmac_rx_mem_res, (reg), \
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2014-04-17 12:33:26 +00:00
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__func__, __LINE__)
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2014-06-26 16:49:45 +00:00
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#define NF10BMAC_WRITE_BE(sc, reg, val) \
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nf10bmac_write_be((sc)->nf10bmac_tx_mem_res, (reg), (val), \
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2014-04-17 12:33:26 +00:00
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__func__, __LINE__)
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2014-06-26 16:49:45 +00:00
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#define NF10BMAC_READ_BE(sc, reg) \
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nf10bmac_read_be((sc)->nf10bmac_rx_mem_res, (reg), \
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2014-04-17 12:33:26 +00:00
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__func__, __LINE__)
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2014-06-26 16:49:45 +00:00
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#define NF10BMAC_WRITE_INTR(sc, reg, val, _f, _l) \
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nf10bmac_write((sc)->nf10bmac_intr_res, (reg), (val), \
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2014-05-09 12:59:38 +00:00
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(_f), (_l))
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#define NF10BMAC_RX_INTR_CLEAR_DIS(sc) \
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2014-06-26 16:49:45 +00:00
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NF10BMAC_WRITE_INTR((sc), NF10BMAC_INTR_CLEAR_DIS, 1, \
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2014-05-09 12:59:38 +00:00
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__func__, __LINE__)
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#define NF10BMAC_RX_INTR_ENABLE(sc) \
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2014-06-26 16:49:45 +00:00
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NF10BMAC_WRITE_INTR((sc), NF10BMAC_INTR_CTRL, 1, \
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2014-05-09 12:59:38 +00:00
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__func__, __LINE__)
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#define NF10BMAC_RX_INTR_DISABLE(sc) \
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2014-06-26 16:49:45 +00:00
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NF10BMAC_WRITE_INTR((sc), NF10BMAC_INTR_CTRL, 0, \
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2014-05-09 12:59:38 +00:00
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__func__, __LINE__)
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2014-04-17 12:33:26 +00:00
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#ifdef ENABLE_WATCHDOG
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static void nf10bmac_tick(void *);
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#endif
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static int nf10bmac_detach(device_t);
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devclass_t nf10bmac_devclass;
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static int
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nf10bmac_tx_locked(struct nf10bmac_softc *sc, struct mbuf *m)
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{
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int32_t len, l, ml;
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2014-06-26 17:10:07 +00:00
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REGWTYPE md, val;
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2014-04-17 12:33:26 +00:00
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NF10BMAC_LOCK_ASSERT(sc);
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KASSERT(m != NULL, ("%s: m is null: sc=%p", __func__, sc));
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KASSERT(m->m_flags & M_PKTHDR, ("%s: not a pkthdr: m=%p", __func__, m));
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/*
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* Copy to buffer to minimize our pain as we can only store
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* double words which, after the first mbuf gets out of alignment
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* quite quickly.
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*/
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m_copydata(m, 0, m->m_pkthdr.len, sc->nf10bmac_tx_buf);
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len = m->m_pkthdr.len;
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/* Write the length at start of packet. */
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2014-06-26 16:49:45 +00:00
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NF10BMAC_WRITE(sc, NF10BMAC_TX_LEN, len);
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2014-04-17 12:33:26 +00:00
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/* Write the meta data and data. */
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2014-06-26 16:49:45 +00:00
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ml = len / sizeof(val);
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len -= (ml * sizeof(val));
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2014-04-17 12:33:26 +00:00
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for (l = 0; l <= ml; l++) {
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int32_t cl;
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2014-06-26 16:49:45 +00:00
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cl = sizeof(val);
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md = (NF10BMAC_TUSER_CPU0 << NF10BMAC_DATA_SPORT_SHIFT);
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2014-04-17 12:33:26 +00:00
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if (l == ml || (len == 0 && l == (ml - 1))) {
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if (l == ml && len == 0) {
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break;
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} else {
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uint8_t s;
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int sl;
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if (l == (ml - 1))
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2014-06-26 17:03:08 +00:00
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len = sizeof(val);
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2014-04-17 12:33:26 +00:00
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cl = len;
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for (s = 0, sl = len; sl > 0; sl--)
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s |= (1 << (sl - 1));
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2014-06-26 16:49:45 +00:00
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md |= (s & NF10BMAC_DATA_STRB);
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md |= NF10BMAC_DATA_LAST;
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2014-04-17 12:33:26 +00:00
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}
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} else {
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2014-06-26 16:49:45 +00:00
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md |= NF10BMAC_DATA_STRB;
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2014-04-17 12:33:26 +00:00
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}
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2014-06-26 16:49:45 +00:00
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NF10BMAC_WRITE(sc, NF10BMAC_TX_META, md);
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bcopy(&sc->nf10bmac_tx_buf[l*sizeof(val)], &val, cl);
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NF10BMAC_WRITE_BE(sc, NF10BMAC_TX_DATA, val);
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2014-04-17 12:33:26 +00:00
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}
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/* If anyone is interested give them a copy. */
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BPF_MTAP(sc->nf10bmac_ifp, m);
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m_freem(m);
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return (0);
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}
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static void
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nf10bmac_start_locked(struct ifnet *ifp)
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{
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struct nf10bmac_softc *sc;
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int count, error;
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sc = ifp->if_softc;
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NF10BMAC_LOCK_ASSERT(sc);
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if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
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IFF_DRV_RUNNING || (sc->nf10bmac_flags & NF10BMAC_FLAGS_LINK) == 0)
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return;
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#ifdef ENABLE_WATCHDOG
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/*
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* Disable the watchdog while sending, we are batching packets.
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* Though we should never reach 5 seconds, and are holding the lock,
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* but who knows.
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*/
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sc->nf10bmac_watchdog_timer = 0;
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|
|
#endif
|
|
|
|
|
|
|
|
/* Send up to MAX_PKTS_PER_TX_LOOP packets. */
|
|
|
|
for (count = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd) &&
|
|
|
|
count < NF10BMAC_MAX_PKTS; count++) {
|
|
|
|
struct mbuf *m;
|
|
|
|
|
|
|
|
IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
|
|
|
|
if (m == NULL)
|
|
|
|
break;
|
|
|
|
error = nf10bmac_tx_locked(sc, m);
|
|
|
|
if (error != 0)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef ENABLE_WATCHDOG
|
|
|
|
done:
|
|
|
|
/* If the IP core walks into Nekromanteion try to bail out. */
|
|
|
|
/* XXX-BZ useless until we have direct FIFO fill status feedback. */
|
|
|
|
if (count > 0)
|
|
|
|
sc->nf10bmac_watchdog_timer = NF10BMAC_WATCHDOG_TIME;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
nf10bmac_start(struct ifnet *ifp)
|
|
|
|
{
|
|
|
|
struct nf10bmac_softc *sc;
|
|
|
|
|
|
|
|
sc = ifp->if_softc;
|
|
|
|
NF10BMAC_LOCK(sc);
|
|
|
|
nf10bmac_start_locked(ifp);
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
nf10bmac_eat_packet_munch_munch(struct nf10bmac_softc *sc)
|
|
|
|
{
|
2014-06-26 17:10:07 +00:00
|
|
|
REGWTYPE md, val;
|
2014-04-17 12:33:26 +00:00
|
|
|
|
|
|
|
do {
|
2014-06-26 16:49:45 +00:00
|
|
|
md = NF10BMAC_READ_BE(sc, NF10BMAC_RX_META);
|
|
|
|
if ((md & NF10BMAC_DATA_STRB) != 0)
|
|
|
|
val = NF10BMAC_READ_BE(sc, NF10BMAC_RX_DATA);
|
|
|
|
} while ((md & NF10BMAC_DATA_STRB) != 0 &&
|
|
|
|
(md & NF10BMAC_DATA_LAST) == 0);
|
2014-04-17 12:33:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
nf10bmac_rx_locked(struct nf10bmac_softc *sc)
|
|
|
|
{
|
|
|
|
struct ifnet *ifp;
|
|
|
|
struct mbuf *m;
|
2014-06-26 17:10:07 +00:00
|
|
|
REGWTYPE md, val;
|
2014-04-17 12:33:26 +00:00
|
|
|
int32_t len, l;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* General problem here in case we need to sync ourselves to the
|
|
|
|
* beginning of a packet. Length will only be set for the first
|
2016-05-03 03:41:25 +00:00
|
|
|
* read, and together with strb we can detect the beginning (or
|
2014-04-17 12:33:26 +00:00
|
|
|
* skip to tlast).
|
|
|
|
*/
|
|
|
|
|
2014-06-26 16:49:45 +00:00
|
|
|
len = NF10BMAC_READ(sc, NF10BMAC_RX_LEN) & NF10BMAC_DATA_LEN_MASK;
|
2014-04-17 12:33:26 +00:00
|
|
|
if (len > (MCLBYTES - ETHER_ALIGN)) {
|
|
|
|
nf10bmac_eat_packet_munch_munch(sc);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2014-06-26 16:49:45 +00:00
|
|
|
md = NF10BMAC_READ(sc, NF10BMAC_RX_META);
|
|
|
|
if (len == 0 && (md & NF10BMAC_DATA_STRB) == 0) {
|
2014-04-17 12:33:26 +00:00
|
|
|
/* No packet data available. */
|
|
|
|
return (0);
|
2014-06-26 16:49:45 +00:00
|
|
|
} else if (len == 0 && (md & NF10BMAC_DATA_STRB) != 0) {
|
2014-04-17 12:33:26 +00:00
|
|
|
/* We are in the middle of a packet. */
|
|
|
|
nf10bmac_eat_packet_munch_munch(sc);
|
|
|
|
return (0);
|
2014-06-26 16:49:45 +00:00
|
|
|
} else if ((md & NF10BMAC_DATA_STRB) == 0) {
|
2014-04-17 12:33:26 +00:00
|
|
|
/* Invalid length "hint". */
|
|
|
|
device_printf(sc->nf10bmac_dev,
|
|
|
|
"Unexpected length %d on zero strb\n", len);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Assume at this point that we have data and a full packet. */
|
|
|
|
if ((len + ETHER_ALIGN) >= MINCLSIZE) {
|
|
|
|
/* Get a cluster. */
|
|
|
|
m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
|
|
|
|
if (m == NULL)
|
|
|
|
return (0);
|
|
|
|
m->m_len = m->m_pkthdr.len = MCLBYTES;
|
|
|
|
} else {
|
|
|
|
/* Hey this still fits into the mbuf+pkthdr. */
|
|
|
|
m = m_gethdr(M_NOWAIT, MT_DATA);
|
|
|
|
if (m == NULL)
|
|
|
|
return (0);
|
|
|
|
m->m_len = m->m_pkthdr.len = MHLEN;
|
|
|
|
}
|
|
|
|
/* Make sure upper layers will be aligned. */
|
|
|
|
m_adj(m, ETHER_ALIGN);
|
|
|
|
|
|
|
|
ifp = sc->nf10bmac_ifp;
|
|
|
|
l = 0;
|
|
|
|
/*
|
2014-06-26 16:49:45 +00:00
|
|
|
while ((md & NF10BMAC_DATA_STRB) != 0 && l < len) {
|
2014-04-17 12:33:26 +00:00
|
|
|
*/
|
|
|
|
while (l < len) {
|
|
|
|
size_t cl;
|
|
|
|
|
2014-06-26 16:49:45 +00:00
|
|
|
if ((md & NF10BMAC_DATA_LAST) == 0 &&
|
|
|
|
(len - l) < sizeof(val)) {
|
2014-04-17 12:33:26 +00:00
|
|
|
/*
|
|
|
|
* Our length and LAST disagree. We have a valid STRB.
|
|
|
|
* We could continue until we fill the mbuf and just
|
|
|
|
* log the invlid length "hint". For now drop the
|
|
|
|
* packet on the floor and count the error.
|
|
|
|
*/
|
|
|
|
nf10bmac_eat_packet_munch_munch(sc);
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
|
2014-04-17 12:33:26 +00:00
|
|
|
m_freem(m);
|
|
|
|
return (0);
|
2014-06-26 16:49:45 +00:00
|
|
|
} else if ((len - l) <= sizeof(val)) {
|
2014-04-17 12:33:26 +00:00
|
|
|
cl = len - l;
|
|
|
|
} else {
|
2014-06-26 16:49:45 +00:00
|
|
|
cl = sizeof(val);
|
2014-04-17 12:33:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Read the first bytes of data as well. */
|
2014-06-26 16:49:45 +00:00
|
|
|
val = NF10BMAC_READ_BE(sc, NF10BMAC_RX_DATA);
|
|
|
|
bcopy(&val, (uint8_t *)(m->m_data + l), cl);
|
2014-04-17 12:33:26 +00:00
|
|
|
l += cl;
|
|
|
|
|
2014-06-26 16:49:45 +00:00
|
|
|
if ((md & NF10BMAC_DATA_LAST) != 0 || l >= len)
|
2014-04-17 12:33:26 +00:00
|
|
|
break;
|
|
|
|
else {
|
|
|
|
DELAY(50);
|
2014-06-26 16:49:45 +00:00
|
|
|
md = NF10BMAC_READ(sc, NF10BMAC_RX_META);
|
2014-04-17 12:33:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
cl = 10;
|
2014-06-26 16:49:45 +00:00
|
|
|
while ((md & NF10BMAC_DATA_STRB) == 0 && cl-- > 0) {
|
2014-04-17 12:33:26 +00:00
|
|
|
DELAY(10);
|
2014-06-26 16:49:45 +00:00
|
|
|
md = NF10BMAC_READ(sc, NF10BMAC_RX_META);
|
2014-04-17 12:33:26 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
/* We should get out of this loop with tlast and tsrb. */
|
2014-06-26 16:49:45 +00:00
|
|
|
if ((md & NF10BMAC_DATA_LAST) == 0 || (md & NF10BMAC_DATA_STRB) == 0) {
|
2014-04-17 12:33:26 +00:00
|
|
|
device_printf(sc->nf10bmac_dev, "Unexpected rx loop end state: "
|
2014-06-26 17:10:07 +00:00
|
|
|
"md=0x%08jx len=%d l=%d\n", (uintmax_t)md, len, l);
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
|
2014-04-17 12:33:26 +00:00
|
|
|
m_freem(m);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
m->m_pkthdr.len = m->m_len = len;
|
|
|
|
m->m_pkthdr.rcvif = ifp;
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
|
2014-04-17 12:33:26 +00:00
|
|
|
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
(*ifp->if_input)(ifp, m);
|
|
|
|
NF10BMAC_LOCK(sc);
|
|
|
|
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
nf10bmac_stop_locked(struct nf10bmac_softc *sc)
|
|
|
|
{
|
|
|
|
struct ifnet *ifp;
|
|
|
|
|
|
|
|
NF10BMAC_LOCK_ASSERT(sc);
|
|
|
|
|
|
|
|
#ifdef ENABLE_WATCHDOG
|
|
|
|
sc->nf10bmac_watchdog_timer = 0;
|
|
|
|
callout_stop(&sc->nf10bmac_tick);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
ifp = sc->nf10bmac_ifp;
|
|
|
|
ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
|
2014-05-09 12:59:38 +00:00
|
|
|
NF10BMAC_RX_INTR_CLEAR_DIS(sc);
|
2014-04-17 12:33:26 +00:00
|
|
|
|
|
|
|
sc->nf10bmac_flags &= ~NF10BMAC_FLAGS_LINK;
|
|
|
|
if_link_state_change(ifp, LINK_STATE_DOWN);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
nf10bmac_reset(struct nf10bmac_softc *sc)
|
|
|
|
{
|
|
|
|
|
2014-04-18 14:21:10 +00:00
|
|
|
/*
|
|
|
|
* If we do not have an ether address set, initialize to the same
|
|
|
|
* OUI as NetFPGA-10G Linux driver does (which luckily seems
|
|
|
|
* unallocated). We just change the NIC specific part from
|
|
|
|
* the slightly long "\0NF10C0" to "\0NFBSD".
|
|
|
|
* Oh and we keep the way of setting it from a string as they do.
|
|
|
|
* It's an amazing way to hide it.
|
|
|
|
* XXX-BZ If NetFPGA gets their own OUI we should fix this.
|
|
|
|
*/
|
|
|
|
if (sc->nf10bmac_eth_addr[0] == 0x00 &&
|
|
|
|
sc->nf10bmac_eth_addr[1] == 0x00 &&
|
|
|
|
sc->nf10bmac_eth_addr[2] == 0x00 &&
|
|
|
|
sc->nf10bmac_eth_addr[3] == 0x00 &&
|
|
|
|
sc->nf10bmac_eth_addr[4] == 0x00 &&
|
|
|
|
sc->nf10bmac_eth_addr[5] == 0x00) {
|
|
|
|
memcpy(&sc->nf10bmac_eth_addr, "\0NFBSD", ETHER_ADDR_LEN);
|
|
|
|
sc->nf10bmac_eth_addr[5] += sc->nf10bmac_unit;
|
|
|
|
}
|
|
|
|
|
2014-04-17 12:33:26 +00:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
nf10bmac_init_locked(struct nf10bmac_softc *sc)
|
|
|
|
{
|
|
|
|
struct ifnet *ifp;
|
|
|
|
uint8_t *eaddr;
|
|
|
|
|
|
|
|
NF10BMAC_LOCK_ASSERT(sc);
|
|
|
|
ifp = sc->nf10bmac_ifp;
|
|
|
|
|
|
|
|
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Must update the ether address if changed. Given we do not handle
|
|
|
|
* in nf10bmac_ioctl() but it's in the general framework, just always
|
|
|
|
* do it here before nf10bmac_reset().
|
|
|
|
*/
|
|
|
|
eaddr = IF_LLADDR(sc->nf10bmac_ifp);
|
|
|
|
bcopy(eaddr, &sc->nf10bmac_eth_addr, ETHER_ADDR_LEN);
|
|
|
|
/* XXX-BZ we do not have any way to tell the NIC our ether address. */
|
|
|
|
|
|
|
|
/* Make things frind to halt, cleanup, ... */
|
|
|
|
nf10bmac_stop_locked(sc);
|
|
|
|
/* ... reset, ... */
|
|
|
|
nf10bmac_reset(sc);
|
|
|
|
|
|
|
|
/* Memory rings? DMA engine? MC filter? MII? */
|
|
|
|
/* Instead drain the FIFO; or at least a possible first packet.. */
|
|
|
|
nf10bmac_eat_packet_munch_munch(sc);
|
|
|
|
|
2014-05-09 12:59:38 +00:00
|
|
|
#ifdef DEVICE_POLLING
|
|
|
|
/* Only enable interrupts if we are not polling. */
|
|
|
|
if (ifp->if_capenable & IFCAP_POLLING) {
|
|
|
|
NF10BMAC_RX_INTR_CLEAR_DIS(sc);
|
|
|
|
} else
|
|
|
|
#endif
|
|
|
|
{
|
|
|
|
NF10BMAC_RX_INTR_ENABLE(sc);
|
|
|
|
}
|
|
|
|
|
2014-04-17 12:33:26 +00:00
|
|
|
ifp->if_drv_flags |= IFF_DRV_RUNNING;
|
|
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
|
|
|
|
|
|
/* We have no underlying media, fake link state. */
|
|
|
|
sc->nf10bmac_flags = NF10BMAC_FLAGS_LINK; /* Always up. */
|
|
|
|
if_link_state_change(sc->nf10bmac_ifp, LINK_STATE_UP);
|
|
|
|
|
|
|
|
#ifdef ENABLE_WATCHDOG
|
|
|
|
callout_reset(&sc->nf10bmac_tick, hz, nf10bmac_tick, sc);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
nf10bmac_init(void *xsc)
|
|
|
|
{
|
|
|
|
struct nf10bmac_softc *sc;
|
|
|
|
|
|
|
|
sc = (struct nf10bmac_softc *)xsc;
|
|
|
|
NF10BMAC_LOCK(sc);
|
|
|
|
nf10bmac_init_locked(sc);
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef ENABLE_WATCHDOG
|
|
|
|
static void
|
|
|
|
nf10bmac_watchdog(struct nf10bmac_softc *sc)
|
|
|
|
{
|
|
|
|
|
|
|
|
NF10BMAC_LOCK_ASSERT(sc);
|
|
|
|
|
|
|
|
if (sc->nf10bmac_watchdog_timer == 0 || --sc->nf10bmac_watchdog_timer > 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
device_printf(sc->nf10bmac_dev, "watchdog timeout\n");
|
2014-09-19 03:51:26 +00:00
|
|
|
sc->nf10if_inc_counter(bmac_ifp, IFCOUNTER_OERRORS, 1);
|
2014-04-17 12:33:26 +00:00
|
|
|
|
|
|
|
sc->nf10bmac_ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
|
|
|
|
nf10bmac_init_locked(sc);
|
|
|
|
|
|
|
|
if (!IFQ_DRV_IS_EMPTY(&sc->nf10bmac_ifp->if_snd))
|
|
|
|
nf10bmac_start_locked(sc->nf10bmac_ifp);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
nf10bmac_tick(void *xsc)
|
|
|
|
{
|
|
|
|
struct nf10bmac_softc *sc;
|
|
|
|
struct ifnet *ifp;
|
|
|
|
|
|
|
|
sc = (struct nf10bmac_softc *)xsc;
|
|
|
|
NF10BMAC_LOCK_ASSERT(sc);
|
|
|
|
ifp = sc->nf10bmac_ifp;
|
|
|
|
|
|
|
|
nf10bmac_watchdog(sc);
|
|
|
|
callout_reset(&sc->nf10bmac_tick, hz, nf10bmac_tick, sc);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2014-05-09 12:59:38 +00:00
|
|
|
static void
|
|
|
|
nf10bmac_intr(void *arg)
|
|
|
|
{
|
|
|
|
struct nf10bmac_softc *sc;
|
|
|
|
struct ifnet *ifp;
|
|
|
|
int rx_npkts;
|
|
|
|
|
|
|
|
sc = (struct nf10bmac_softc *)arg;
|
|
|
|
ifp = sc->nf10bmac_ifp;
|
|
|
|
|
|
|
|
NF10BMAC_LOCK(sc);
|
|
|
|
#ifdef DEVICE_POLLING
|
|
|
|
if (ifp->if_capenable & IFCAP_POLLING) {
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* NF10BMAC_RX_INTR_DISABLE(sc); */
|
|
|
|
NF10BMAC_RX_INTR_CLEAR_DIS(sc);
|
|
|
|
|
|
|
|
/* We only have an RX interrupt and no status information. */
|
|
|
|
rx_npkts = 0;
|
|
|
|
while (rx_npkts < NF10BMAC_MAX_PKTS) {
|
|
|
|
int c;
|
|
|
|
|
|
|
|
c = nf10bmac_rx_locked(sc);
|
|
|
|
rx_npkts += c;
|
|
|
|
if (c == 0)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
|
|
|
|
/* Re-enable interrupts. */
|
|
|
|
NF10BMAC_RX_INTR_ENABLE(sc);
|
|
|
|
|
|
|
|
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
|
|
|
|
nf10bmac_start_locked(ifp);
|
|
|
|
}
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2014-04-17 12:33:26 +00:00
|
|
|
#ifdef DEVICE_POLLING
|
|
|
|
static int
|
|
|
|
nf10bmac_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
|
|
|
|
{
|
|
|
|
struct nf10bmac_softc *sc;
|
|
|
|
int rx_npkts = 0;
|
|
|
|
|
|
|
|
sc = ifp->if_softc;
|
|
|
|
NF10BMAC_LOCK(sc);
|
|
|
|
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
return (rx_npkts);
|
|
|
|
}
|
|
|
|
|
|
|
|
while (rx_npkts < count) {
|
|
|
|
int c;
|
|
|
|
|
|
|
|
c = nf10bmac_rx_locked(sc);
|
|
|
|
rx_npkts += c;
|
|
|
|
if (c == 0)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
nf10bmac_start_locked(ifp);
|
|
|
|
|
|
|
|
if (rx_npkts > 0 || cmd == POLL_AND_CHECK_STATUS) {
|
|
|
|
/* We currently cannot do much. */
|
|
|
|
;
|
|
|
|
}
|
|
|
|
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
return (rx_npkts);
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
#error We only support polling mode
|
|
|
|
#endif /* DEVICE_POLLING */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nf10bmac_media_change(struct ifnet *ifp __unused)
|
|
|
|
{
|
|
|
|
|
|
|
|
/* Do nothing. */
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
nf10bmac_media_status(struct ifnet *ifp __unused, struct ifmediareq *imr)
|
|
|
|
{
|
|
|
|
|
|
|
|
imr->ifm_status = IFM_AVALID | IFM_ACTIVE;
|
|
|
|
imr->ifm_active = IFM_ETHER | IFM_10G_T | IFM_FDX;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
nf10bmac_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
|
|
|
|
{
|
|
|
|
struct nf10bmac_softc *sc;
|
|
|
|
struct ifreq *ifr;
|
|
|
|
int error, mask;
|
|
|
|
|
|
|
|
error = 0;
|
|
|
|
sc = ifp->if_softc;
|
|
|
|
ifr = (struct ifreq *)data;
|
|
|
|
|
|
|
|
switch (command) {
|
|
|
|
case SIOCSIFFLAGS:
|
|
|
|
NF10BMAC_LOCK(sc);
|
|
|
|
if (ifp->if_flags & IFF_UP) {
|
|
|
|
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0 &&
|
|
|
|
((ifp->if_flags ^ sc->nf10bmac_if_flags) &
|
|
|
|
(IFF_PROMISC | IFF_ALLMULTI)) != 0)
|
|
|
|
/* Nothing we can do. */ ;
|
|
|
|
else
|
|
|
|
nf10bmac_init_locked(sc);
|
|
|
|
} else if (ifp->if_drv_flags & IFF_DRV_RUNNING)
|
|
|
|
nf10bmac_stop_locked(sc);
|
|
|
|
sc->nf10bmac_if_flags = ifp->if_flags;
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
break;
|
|
|
|
case SIOCSIFCAP:
|
|
|
|
NF10BMAC_LOCK(sc);
|
|
|
|
mask = ifr->ifr_reqcap ^ ifp->if_capenable;
|
|
|
|
#ifdef DEVICE_POLLING
|
|
|
|
if ((mask & IFCAP_POLLING) != 0 &&
|
|
|
|
(IFCAP_POLLING & ifp->if_capabilities) != 0) {
|
|
|
|
ifp->if_capenable ^= IFCAP_POLLING;
|
|
|
|
if ((IFCAP_POLLING & ifp->if_capenable) != 0) {
|
|
|
|
|
|
|
|
error = ether_poll_register(nf10bmac_poll, ifp);
|
|
|
|
if (error != 0) {
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2014-05-09 12:59:38 +00:00
|
|
|
NF10BMAC_RX_INTR_CLEAR_DIS(sc);
|
|
|
|
|
2014-04-17 12:33:26 +00:00
|
|
|
/*
|
|
|
|
* Do not allow disabling of polling if we do
|
|
|
|
* not have interrupts.
|
|
|
|
*/
|
2014-05-09 12:59:38 +00:00
|
|
|
} else if (sc->nf10bmac_rx_irq_res != NULL) {
|
|
|
|
error = ether_poll_deregister(ifp);
|
|
|
|
/* Enable interrupts. */
|
|
|
|
NF10BMAC_RX_INTR_ENABLE(sc);
|
2014-04-17 12:33:26 +00:00
|
|
|
} else {
|
|
|
|
ifp->if_capenable ^= IFCAP_POLLING;
|
|
|
|
error = EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif /* DEVICE_POLLING */
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
break;
|
|
|
|
case SIOCGIFMEDIA:
|
|
|
|
case SIOCSIFMEDIA:
|
|
|
|
error = ifmedia_ioctl(ifp, ifr, &sc->nf10bmac_media, command);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
error = ether_ioctl(ifp, command, data);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Generic device handling routines.
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
nf10bmac_attach(device_t dev)
|
|
|
|
{
|
|
|
|
struct nf10bmac_softc *sc;
|
|
|
|
struct ifnet *ifp;
|
|
|
|
int error;
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
|
|
|
|
mtx_init(&sc->nf10bmac_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
|
|
|
|
MTX_DEF);
|
|
|
|
|
|
|
|
#ifdef ENABLE_WATCHDOG
|
|
|
|
callout_init_mtx(&sc->nf10bmac_tick, &sc->nf10bmac_mtx, 0);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
sc->nf10bmac_tx_buf = malloc(ETHER_MAX_LEN_JUMBO, M_DEVBUF, M_WAITOK);
|
|
|
|
|
|
|
|
/* Reset the adapter. */
|
|
|
|
nf10bmac_reset(sc);
|
|
|
|
|
|
|
|
/* Setup interface. */
|
|
|
|
ifp = sc->nf10bmac_ifp = if_alloc(IFT_ETHER);
|
|
|
|
if (ifp == NULL) {
|
|
|
|
device_printf(dev, "if_alloc() failed\n");
|
|
|
|
error = ENOSPC;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
ifp->if_softc = sc;
|
|
|
|
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
|
|
|
|
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; /* | IFF_MULTICAST; */
|
|
|
|
ifp->if_ioctl = nf10bmac_ioctl;
|
|
|
|
ifp->if_start = nf10bmac_start;
|
|
|
|
ifp->if_init = nf10bmac_init;
|
|
|
|
IFQ_SET_MAXLEN(&ifp->if_snd, NF10BMAC_MAX_PKTS - 1);
|
|
|
|
ifp->if_snd.ifq_drv_maxlen = NF10BMAC_MAX_PKTS - 1;
|
|
|
|
IFQ_SET_READY(&ifp->if_snd);
|
|
|
|
|
|
|
|
/* Call media-indepedent attach routine. */
|
|
|
|
ether_ifattach(ifp, sc->nf10bmac_eth_addr);
|
|
|
|
|
|
|
|
/* Tell the upper layer(s) about vlan mtu support. */
|
2014-08-30 19:55:54 +00:00
|
|
|
ifp->if_hdrlen = sizeof(struct ether_vlan_header);
|
2014-04-17 12:33:26 +00:00
|
|
|
ifp->if_capabilities |= IFCAP_VLAN_MTU;
|
|
|
|
ifp->if_capenable = ifp->if_capabilities;
|
|
|
|
#ifdef DEVICE_POLLING
|
|
|
|
/* We will enable polling by default if no irqs available. See below. */
|
|
|
|
ifp->if_capabilities |= IFCAP_POLLING;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* We need more media attention. Fake it! */
|
|
|
|
ifmedia_init(&sc->nf10bmac_media, 0, nf10bmac_media_change,
|
|
|
|
nf10bmac_media_status);
|
|
|
|
ifmedia_add(&sc->nf10bmac_media, IFM_ETHER | IFM_10G_T, 0, NULL);
|
|
|
|
ifmedia_set(&sc->nf10bmac_media, IFM_ETHER | IFM_10G_T);
|
|
|
|
|
2014-05-09 12:59:38 +00:00
|
|
|
/* Initialise. */
|
|
|
|
error = 0;
|
|
|
|
|
|
|
|
/* Hook up interrupts. Well the one. */
|
|
|
|
if (sc->nf10bmac_rx_irq_res != NULL) {
|
|
|
|
error = bus_setup_intr(dev, sc->nf10bmac_rx_irq_res,
|
|
|
|
INTR_TYPE_NET | INTR_MPSAFE, NULL, nf10bmac_intr,
|
|
|
|
sc, &sc->nf10bmac_rx_intrhand);
|
|
|
|
if (error != 0) {
|
|
|
|
device_printf(dev, "enabling RX IRQ failed\n");
|
|
|
|
ether_ifdetach(ifp);
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
}
|
2014-04-17 12:33:26 +00:00
|
|
|
|
2014-05-09 12:59:38 +00:00
|
|
|
if ((ifp->if_capenable & IFCAP_POLLING) != 0 ||
|
|
|
|
sc->nf10bmac_rx_irq_res == NULL) {
|
2014-04-17 12:33:26 +00:00
|
|
|
#ifdef DEVICE_POLLING
|
2014-05-09 12:59:38 +00:00
|
|
|
/* If not on and no IRQs force it on. */
|
|
|
|
if (sc->nf10bmac_rx_irq_res == NULL) {
|
|
|
|
ifp->if_capenable |= IFCAP_POLLING;
|
|
|
|
device_printf(dev,
|
|
|
|
"forcing to polling due to no interrupts\n");
|
|
|
|
}
|
|
|
|
error = ether_poll_register(nf10bmac_poll, ifp);
|
|
|
|
if (error != 0)
|
|
|
|
goto err;
|
2014-04-17 12:33:26 +00:00
|
|
|
#else
|
2014-05-09 12:59:38 +00:00
|
|
|
device_printf(dev, "no DEVICE_POLLING in kernel and no IRQs\n");
|
|
|
|
error = ENXIO;
|
2014-04-17 12:33:26 +00:00
|
|
|
#endif
|
2014-05-09 12:59:38 +00:00
|
|
|
} else {
|
|
|
|
NF10BMAC_RX_INTR_ENABLE(sc);
|
|
|
|
}
|
2014-04-17 12:33:26 +00:00
|
|
|
|
|
|
|
err:
|
|
|
|
if (error != 0)
|
|
|
|
nf10bmac_detach(dev);
|
|
|
|
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
nf10bmac_detach(device_t dev)
|
|
|
|
{
|
|
|
|
struct nf10bmac_softc *sc;
|
|
|
|
struct ifnet *ifp;
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
KASSERT(mtx_initialized(&sc->nf10bmac_mtx),
|
|
|
|
("%s: mutex not initialized", device_get_nameunit(dev)));
|
|
|
|
ifp = sc->nf10bmac_ifp;
|
|
|
|
|
|
|
|
#ifdef DEVICE_POLLING
|
|
|
|
if (ifp->if_capenable & IFCAP_POLLING)
|
|
|
|
ether_poll_deregister(ifp);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Only cleanup if attach succeeded. */
|
|
|
|
if (device_is_attached(dev)) {
|
|
|
|
NF10BMAC_LOCK(sc);
|
|
|
|
nf10bmac_stop_locked(sc);
|
|
|
|
NF10BMAC_UNLOCK(sc);
|
|
|
|
#ifdef ENABLE_WATCHDOG
|
|
|
|
callout_drain(&sc->nf10bmac_tick);
|
|
|
|
#endif
|
|
|
|
ether_ifdetach(ifp);
|
|
|
|
}
|
|
|
|
|
2014-05-09 12:59:38 +00:00
|
|
|
if (sc->nf10bmac_rx_intrhand)
|
|
|
|
bus_teardown_intr(dev, sc->nf10bmac_rx_irq_res,
|
|
|
|
sc->nf10bmac_rx_intrhand);
|
|
|
|
|
2014-04-17 12:33:26 +00:00
|
|
|
if (ifp != NULL)
|
|
|
|
if_free(ifp);
|
|
|
|
ifmedia_removeall(&sc->nf10bmac_media);
|
|
|
|
|
|
|
|
mtx_destroy(&sc->nf10bmac_mtx);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Shared with the attachment specific (e.g., fdt) implementation. */
|
|
|
|
void
|
|
|
|
nf10bmac_detach_resources(device_t dev)
|
|
|
|
{
|
|
|
|
struct nf10bmac_softc *sc;
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
|
2014-05-09 12:59:38 +00:00
|
|
|
if (sc->nf10bmac_rx_irq_res != NULL) {
|
|
|
|
bus_release_resource(dev, SYS_RES_IRQ, sc->nf10bmac_rx_irq_rid,
|
|
|
|
sc->nf10bmac_rx_irq_res);
|
|
|
|
sc->nf10bmac_rx_irq_res = NULL;
|
|
|
|
}
|
|
|
|
if (sc->nf10bmac_intr_res != NULL) {
|
2014-04-17 12:33:26 +00:00
|
|
|
bus_release_resource(dev, SYS_RES_MEMORY,
|
2014-05-09 12:59:38 +00:00
|
|
|
sc->nf10bmac_intr_rid, sc->nf10bmac_intr_res);
|
|
|
|
sc->nf10bmac_intr_res = NULL;
|
2014-04-17 12:33:26 +00:00
|
|
|
}
|
|
|
|
if (sc->nf10bmac_rx_mem_res != NULL) {
|
|
|
|
bus_release_resource(dev, SYS_RES_MEMORY,
|
|
|
|
sc->nf10bmac_rx_mem_rid, sc->nf10bmac_rx_mem_res);
|
|
|
|
sc->nf10bmac_rx_mem_res = NULL;
|
|
|
|
}
|
|
|
|
if (sc->nf10bmac_tx_mem_res != NULL) {
|
|
|
|
bus_release_resource(dev, SYS_RES_MEMORY,
|
|
|
|
sc->nf10bmac_tx_mem_rid, sc->nf10bmac_tx_mem_res);
|
|
|
|
sc->nf10bmac_tx_mem_res = NULL;
|
|
|
|
}
|
2014-05-09 12:59:38 +00:00
|
|
|
if (sc->nf10bmac_ctrl_res != NULL) {
|
|
|
|
bus_release_resource(dev, SYS_RES_MEMORY,
|
|
|
|
sc->nf10bmac_ctrl_rid, sc->nf10bmac_ctrl_res);
|
|
|
|
sc->nf10bmac_ctrl_res = NULL;
|
|
|
|
}
|
2014-04-17 12:33:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
nf10bmac_detach_dev(device_t dev)
|
|
|
|
{
|
|
|
|
int error;
|
|
|
|
|
|
|
|
error = nf10bmac_detach(dev);
|
|
|
|
if (error) {
|
|
|
|
/* We are basically in undefined state now. */
|
|
|
|
device_printf(dev, "nf10bmac_detach() failed: %d\n", error);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
nf10bmac_detach_resources(dev);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* end */
|