2005-01-07 02:29:27 +00:00
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/*-
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2000-04-22 02:16:41 +00:00
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* Copyright (c) 1997, 1998, 1999, 2000
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1999-07-09 04:30:09 +00:00
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* Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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1999-08-28 01:08:13 +00:00
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* $FreeBSD$
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1999-07-09 04:30:09 +00:00
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*/
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/*
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* Registers and data structures for the XaQti Corporation XMAC II
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* Gigabit Ethernet MAC. Datasheet is available from http://www.xaqti.com.
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* The XMAC can be programmed for 16-bit or 32-bit register access modes.
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* The SysKonnect gigabit ethernet adapters use 16-bit mode, so that's
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* how the registers are laid out here.
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*/
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#define XM_DEVICEID 0x00E0AE20
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#define XM_XAQTI_OUI 0x00E0AE
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#define XM_XMAC_REV(x) (((x) & 0x000000E0) >> 5)
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#define XM_XMAC_REV_B2 0x0
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#define XM_XMAC_REV_C1 0x1
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#define XM_MMUCMD 0x0000
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#define XM_POFF 0x0008
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#define XM_BURST 0x000C
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#define XM_VLAN_TAGLEV1 0x0010
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#define XM_VLAN_TAGLEV2 0x0014
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#define XM_TXCMD 0x0020
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#define XM_TX_RETRYLIMIT 0x0024
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#define XM_TX_SLOTTIME 0x0028
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#define XM_TX_IPG 0x003C
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#define XM_RXCMD 0x0030
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#define XM_PHY_ADDR 0x0034
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#define XM_PHY_DATA 0x0038
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#define XM_GPIO 0x0040
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#define XM_IMR 0x0044
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#define XM_ISR 0x0048
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#define XM_HWCFG 0x004C
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#define XM_TX_LOWAT 0x0060
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#define XM_TX_HIWAT 0x0062
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#define XM_TX_REQTHRESH_LO 0x0064
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#define XM_TX_REQTHRESH_HI 0x0066
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#define XM_TX_REQTHRESH XM_TX_REQTHRESH_LO
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#define XM_PAUSEDST0 0x0068
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#define XM_PAUSEDST1 0x006A
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#define XM_PAUSEDST2 0x006C
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#define XM_CTLPARM_LO 0x0070
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#define XM_CTLPARM_HI 0x0072
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#define XM_CTLPARM XM_CTLPARM_LO
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#define XM_OPCODE_PAUSE_TIMER 0x0074
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#define XM_TXSTAT_LIFO 0x0078
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/*
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* Perfect filter registers. The XMAC has a table of 16 perfect
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* filter entries, spaced 8 bytes apart. This is in addition to
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* the station address registers, which appear below.
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*/
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#define XM_RXFILT_BASE 0x0080
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#define XM_RXFILT_END 0x0107
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#define XM_RXFILT_MAX 16
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#define XM_RXFILT_ENTRY(ent) (XM_RXFILT_BASE + ((ent * 8)))
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/* Primary station address. */
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#define XM_PAR0 0x0108
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#define XM_PAR1 0x010A
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#define XM_PAR2 0x010C
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/* 64-bit multicast hash table registers */
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#define XM_MAR0 0x0110
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#define XM_MAR1 0x0112
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#define XM_MAR2 0x0114
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#define XM_MAR3 0x0116
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#define XM_RX_LOWAT 0x0118
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#define XM_RX_HIWAT 0x011A
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#define XM_RX_REQTHRESH_LO 0x011C
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#define XM_RX_REQTHRESH_HI 0x011E
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#define XM_RX_REQTHRESH XM_RX_REQTHRESH_LO
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#define XM_DEVID_LO 0x0120
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#define XM_DEVID_HI 0x0122
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#define XM_DEVID XM_DEVID_LO
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#define XM_MODE_LO 0x0124
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#define XM_MODE_HI 0x0126
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#define XM_MODE XM_MODE_LO
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#define XM_LASTSRC0 0x0128
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#define XM_LASTSRC1 0x012A
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#define XM_LASTSRC2 0x012C
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#define XM_TSTAMP_READ 0x0130
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#define XM_TSTAMP_LOAD 0x0134
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#define XM_STATS_CMD 0x0200
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#define XM_RXCNT_EVENT_LO 0x0204
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#define XM_RXCNT_EVENT_HI 0x0206
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#define XM_RXCNT_EVENT XM_RXCNT_EVENT_LO
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#define XM_TXCNT_EVENT_LO 0x0208
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#define XM_TXCNT_EVENT_HI 0x020A
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#define XM_TXCNT_EVENT XM_TXCNT_EVENT_LO
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#define XM_RXCNT_EVMASK_LO 0x020C
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#define XM_RXCNT_EVMASK_HI 0x020E
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#define XM_RXCNT_EVMASK XM_RXCNT_EVMASK_LO
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#define XM_TXCNT_EVMASK_LO 0x0210
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#define XM_TXCNT_EVMASK_HI 0x0212
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#define XM_TXCNT_EVMASK XM_TXCNT_EVMASK_LO
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/* Statistics command register */
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#define XM_STATCMD_CLR_TX 0x0001
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#define XM_STATCMD_CLR_RX 0x0002
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#define XM_STATCMD_COPY_TX 0x0004
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#define XM_STATCMD_COPY_RX 0x0008
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#define XM_STATCMD_SNAP_TX 0x0010
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#define XM_STATCMD_SNAP_RX 0x0020
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/* TX statistics registers */
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#define XM_TXSTATS_PKTSOK 0x280
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#define XM_TXSTATS_BYTESOK_HI 0x284
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#define XM_TXSTATS_BYTESOK_LO 0x288
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#define XM_TXSTATS_BCASTSOK 0x28C
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#define XM_TXSTATS_MCASTSOK 0x290
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#define XM_TXSTATS_UCASTSOK 0x294
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#define XM_TXSTATS_GIANTS 0x298
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#define XM_TXSTATS_BURSTCNT 0x29C
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#define XM_TXSTATS_PAUSEPKTS 0x2A0
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#define XM_TXSTATS_MACCTLPKTS 0x2A4
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#define XM_TXSTATS_SINGLECOLS 0x2A8
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#define XM_TXSTATS_MULTICOLS 0x2AC
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#define XM_TXSTATS_EXCESSCOLS 0x2B0
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#define XM_TXSTATS_LATECOLS 0x2B4
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#define XM_TXSTATS_DEFER 0x2B8
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#define XM_TXSTATS_EXCESSDEFER 0x2BC
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#define XM_TXSTATS_UNDERRUN 0x2C0
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#define XM_TXSTATS_CARRIERSENSE 0x2C4
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#define XM_TXSTATS_UTILIZATION 0x2C8
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#define XM_TXSTATS_64 0x2D0
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#define XM_TXSTATS_65_127 0x2D4
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#define XM_TXSTATS_128_255 0x2D8
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#define XM_TXSTATS_256_511 0x2DC
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#define XM_TXSTATS_512_1023 0x2E0
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#define XM_TXSTATS_1024_MAX 0x2E4
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/* RX statistics registers */
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#define XM_RXSTATS_PKTSOK 0x300
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#define XM_RXSTATS_BYTESOK_HI 0x304
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#define XM_RXSTATS_BYTESOK_LO 0x308
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#define XM_RXSTATS_BCASTSOK 0x30C
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#define XM_RXSTATS_MCASTSOK 0x310
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#define XM_RXSTATS_UCASTSOK 0x314
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#define XM_RXSTATS_PAUSEPKTS 0x318
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#define XM_RXSTATS_MACCTLPKTS 0x31C
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#define XM_RXSTATS_BADPAUSEPKTS 0x320
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#define XM_RXSTATS_BADMACCTLPKTS 0x324
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#define XM_RXSTATS_BURSTCNT 0x328
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#define XM_RXSTATS_MISSEDPKTS 0x32C
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#define XM_RXSTATS_FRAMEERRS 0x330
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#define XM_RXSTATS_OVERRUN 0x334
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#define XM_RXSTATS_JABBER 0x338
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#define XM_RXSTATS_CARRLOSS 0x33C
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#define XM_RXSTATS_INRNGLENERR 0x340
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#define XM_RXSTATS_SYMERR 0x344
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#define XM_RXSTATS_SHORTEVENT 0x348
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#define XM_RXSTATS_RUNTS 0x34C
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#define XM_RXSTATS_GIANTS 0x350
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#define XM_RXSTATS_CRCERRS 0x354
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#define XM_RXSTATS_CEXTERRS 0x35C
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#define XM_RXSTATS_UTILIZATION 0x360
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#define XM_RXSTATS_64 0x368
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#define XM_RXSTATS_65_127 0x36C
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#define XM_RXSTATS_128_255 0x370
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#define XM_RXSTATS_256_511 0x374
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#define XM_RXSTATS_512_1023 0x378
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#define XM_RXSTATS_1024_MAX 0x37C
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#define XM_MMUCMD_TX_ENB 0x0001
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#define XM_MMUCMD_RX_ENB 0x0002
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#define XM_MMUCMD_GMIILOOP 0x0004
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#define XM_MMUCMD_RATECTL 0x0008
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#define XM_MMUCMD_GMIIFDX 0x0010
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#define XM_MMUCMD_NO_MGMT_PRMB 0x0020
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#define XM_MMUCMD_SIMCOL 0x0040
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#define XM_MMUCMD_FORCETX 0x0080
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#define XM_MMUCMD_LOOPENB 0x0200
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#define XM_MMUCMD_IGNPAUSE 0x0400
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#define XM_MMUCMD_PHYBUSY 0x0800
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#define XM_MMUCMD_PHYDATARDY 0x1000
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#define XM_TXCMD_AUTOPAD 0x0001
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#define XM_TXCMD_NOCRC 0x0002
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#define XM_TXCMD_NOPREAMBLE 0x0004
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#define XM_TXCMD_NOGIGAMODE 0x0008
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#define XM_TXCMD_SAMPLELINE 0x0010
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#define XM_TXCMD_ENCBYPASS 0x0020
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#define XM_TXCMD_XMITBK2BK 0x0040
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#define XM_TXCMD_FAIRSHARE 0x0080
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#define XM_RXCMD_DISABLE_CEXT 0x0001
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#define XM_RXCMD_STRIPPAD 0x0002
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#define XM_RXCMD_SAMPLELINE 0x0004
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#define XM_RXCMD_SELFRX 0x0008
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#define XM_RXCMD_STRIPFCS 0x0010
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#define XM_RXCMD_TRANSPARENT 0x0020
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#define XM_RXCMD_IPGCAPTURE 0x0040
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#define XM_RXCMD_BIGPKTOK 0x0080
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#define XM_RXCMD_LENERROK 0x0100
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2000-04-22 02:16:41 +00:00
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#define XM_GPIO_GP0_SET 0x0001
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#define XM_GPIO_RESETSTATS 0x0004
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#define XM_GPIO_RESETMAC 0x0008
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#define XM_GPIO_FORCEINT 0x0020
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#define XM_GPIO_ANEGINPROG 0x0040
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1999-07-09 04:30:09 +00:00
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#define XM_IMR_RX_EOF 0x0001
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#define XM_IMR_TX_EOF 0x0002
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#define XM_IMR_TX_UNDERRUN 0x0004
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#define XM_IMR_RX_OVERRUN 0x0008
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#define XM_IMR_TX_STATS_OFLOW 0x0010
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#define XM_IMR_RX_STATS_OFLOW 0x0020
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#define XM_IMR_TSTAMP_OFLOW 0x0040
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#define XM_IMR_AUTONEG_DONE 0x0080
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#define XM_IMR_NEXTPAGE_RDY 0x0100
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#define XM_IMR_PAGE_RECEIVED 0x0200
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#define XM_IMR_LP_REQCFG 0x0400
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#define XM_IMR_GP0_SET 0x0800
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#define XM_IMR_FORCEINTR 0x1000
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#define XM_IMR_TX_ABORT 0x2000
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#define XM_IMR_LINKEVENT 0x4000
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#define XM_INTRS \
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2000-04-22 02:16:41 +00:00
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(~(XM_IMR_GP0_SET|XM_IMR_AUTONEG_DONE|XM_IMR_TX_UNDERRUN))
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#define XM_ISR_RX_EOF 0x0001
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#define XM_ISR_TX_EOF 0x0002
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#define XM_ISR_TX_UNDERRUN 0x0004
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#define XM_ISR_RX_OVERRUN 0x0008
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#define XM_ISR_TX_STATS_OFLOW 0x0010
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#define XM_ISR_RX_STATS_OFLOW 0x0020
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#define XM_ISR_TSTAMP_OFLOW 0x0040
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#define XM_ISR_AUTONEG_DONE 0x0080
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#define XM_ISR_NEXTPAGE_RDY 0x0100
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#define XM_ISR_PAGE_RECEIVED 0x0200
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#define XM_ISR_LP_REQCFG 0x0400
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#define XM_ISR_GP0_SET 0x0800
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#define XM_ISR_FORCEINTR 0x1000
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#define XM_ISR_TX_ABORT 0x2000
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#define XM_ISR_LINKEVENT 0x4000
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2000-04-22 02:16:41 +00:00
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#define XM_HWCFG_GENEOP 0x0008
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#define XM_HWCFG_SIGSTATCKH 0x0004
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#define XM_HWCFG_GMIIMODE 0x0001
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1999-07-09 04:30:09 +00:00
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#define XM_MODE_FLUSH_RXFIFO 0x00000001
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#define XM_MODE_FLUSH_TXFIFO 0x00000002
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#define XM_MODE_BIGENDIAN 0x00000004
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#define XM_MODE_RX_PROMISC 0x00000008
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#define XM_MODE_RX_NOBROAD 0x00000010
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#define XM_MODE_RX_NOMULTI 0x00000020
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#define XM_MODE_RX_NOUNI 0x00000040
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#define XM_MODE_RX_BADFRAMES 0x00000080
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#define XM_MODE_RX_CRCERRS 0x00000100
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#define XM_MODE_RX_GIANTS 0x00000200
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#define XM_MODE_RX_INRANGELEN 0x00000400
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#define XM_MODE_RX_RUNTS 0x00000800
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#define XM_MODE_RX_MACCTL 0x00001000
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#define XM_MODE_RX_USE_PERFECT 0x00002000
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#define XM_MODE_RX_USE_STATION 0x00004000
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#define XM_MODE_RX_USE_HASH 0x00008000
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#define XM_MODE_RX_ADDRPAIR 0x00010000
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#define XM_MODE_PAUSEONHI 0x00020000
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#define XM_MODE_PAUSEONLO 0x00040000
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#define XM_MODE_TIMESTAMP 0x00080000
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#define XM_MODE_SENDPAUSE 0x00100000
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#define XM_MODE_SENDCONTINUOUS 0x00200000
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#define XM_MODE_LE_STATUSWORD 0x00400000
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#define XM_MODE_AUTOFIFOPAUSE 0x00800000
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#define XM_MODE_EXPAUSEGEN 0x02000000
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#define XM_MODE_RX_INVERSE 0x04000000
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#define XM_RXSTAT_MACCTL 0x00000001
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#define XM_RXSTAT_ERRFRAME 0x00000002
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#define XM_RXSTAT_CRCERR 0x00000004
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#define XM_RXSTAT_GIANT 0x00000008
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#define XM_RXSTAT_RUNT 0x00000010
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#define XM_RXSTAT_FRAMEERR 0x00000020
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#define XM_RXSTAT_INRANGEERR 0x00000040
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#define XM_RXSTAT_CARRIERERR 0x00000080
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#define XM_RXSTAT_COLLERR 0x00000100
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#define XM_RXSTAT_802_3 0x00000200
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#define XM_RXSTAT_CARREXTERR 0x00000400
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#define XM_RXSTAT_BURSTMODE 0x00000800
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#define XM_RXSTAT_UNICAST 0x00002000
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#define XM_RXSTAT_MULTICAST 0x00004000
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#define XM_RXSTAT_BROADCAST 0x00008000
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#define XM_RXSTAT_VLAN_LEV1 0x00010000
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#define XM_RXSTAT_VLAN_LEV2 0x00020000
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#define XM_RXSTAT_LEN 0xFFFC0000
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2006-04-27 05:59:09 +00:00
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#define XM_RXSTAT_LENSHIFT 18
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#define XM_RXSTAT_BYTES(x) ((x) >> XM_RXSTAT_LENSHIFT)
|
1999-07-09 04:30:09 +00:00
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/*
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* XMAC PHY registers, indirectly accessed through
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* XM_PHY_ADDR and XM_PHY_REG.
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*/
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#define XM_PHY_BMCR 0x0000 /* control */
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#define XM_PHY_BMSR 0x0001 /* status */
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#define XM_PHY_VENID 0x0002 /* vendor id */
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#define XM_PHY_DEVID 0x0003 /* device id */
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#define XM_PHY_ANAR 0x0004 /* autoneg advertisenemt */
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#define XM_PHY_LPAR 0x0005 /* link partner ability */
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#define XM_PHY_ANEXP 0x0006 /* autoneg expansion */
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#define XM_PHY_NEXTP 0x0007 /* nextpage */
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#define XM_PHY_LPNEXTP 0x0008 /* link partner's nextpage */
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#define XM_PHY_EXTSTS 0x000F /* extented status */
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#define XM_PHY_RESAB 0x0010 /* resolved ability */
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#define XM_BMCR_DUPLEX 0x0100
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#define XM_BMCR_RENEGOTIATE 0x0200
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#define XM_BMCR_AUTONEGENBL 0x1000
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#define XM_BMCR_LOOPBACK 0x4000
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#define XM_BMCR_RESET 0x8000
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#define XM_BMSR_EXTCAP 0x0001
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#define XM_BMSR_LINKSTAT 0x0004
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#define XM_BMSR_AUTONEGABLE 0x0008
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#define XM_BMSR_REMFAULT 0x0010
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#define XM_BMSR_AUTONEGDONE 0x0020
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#define XM_BMSR_EXTSTAT 0x0100
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#define XM_VENID_XAQTI 0xD14C
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#define XM_DEVID_XMAC 0x0002
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#define XM_ANAR_FULLDUPLEX 0x0020
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#define XM_ANAR_HALFDUPLEX 0x0040
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#define XM_ANAR_PAUSEBITS 0x0180
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#define XM_ANAR_REMFAULTBITS 0x1800
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#define XM_ANAR_ACK 0x4000
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#define XM_ANAR_NEXTPAGE 0x8000
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#define XM_LPAR_FULLDUPLEX 0x0020
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|
#define XM_LPAR_HALFDUPLEX 0x0040
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|
#define XM_LPAR_PAUSEBITS 0x0180
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|
#define XM_LPAR_REMFAULTBITS 0x1800
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|
|
#define XM_LPAR_ACK 0x4000
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|
#define XM_LPAR_NEXTPAGE 0x8000
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|
#define XM_PAUSE_NOPAUSE 0x0000
|
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|
|
#define XM_PAUSE_SYMPAUSE 0x0080
|
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|
|
#define XM_PAUSE_ASYMPAUSE 0x0100
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|
|
#define XM_PAUSE_BOTH 0x0180
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|
#define XM_REMFAULT_LINKOK 0x0000
|
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|
|
#define XM_REMFAULT_LINKFAIL 0x0800
|
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|
|
|
#define XM_REMFAULT_OFFLINE 0x1000
|
|
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|
|
#define XM_REMFAULT_ANEGERR 0x1800
|
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|
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|
|
#define XM_ANEXP_GOTPAGE 0x0002
|
|
|
|
|
#define XM_ANEXP_NEXTPAGE_SELF 0x0004
|
|
|
|
|
#define XM_ANEXP_NEXTPAGE_LP 0x0008
|
|
|
|
|
|
|
|
|
|
#define XM_NEXTP_MESSAGE 0x07FF
|
|
|
|
|
#define XM_NEXTP_TOGGLE 0x0800
|
|
|
|
|
#define XM_NEXTP_ACK2 0x1000
|
|
|
|
|
#define XM_NEXTP_MPAGE 0x2000
|
|
|
|
|
#define XM_NEXTP_ACK1 0x4000
|
|
|
|
|
#define XM_NEXTP_NPAGE 0x8000
|
|
|
|
|
|
|
|
|
|
#define XM_LPNEXTP_MESSAGE 0x07FF
|
|
|
|
|
#define XM_LPNEXTP_TOGGLE 0x0800
|
|
|
|
|
#define XM_LPNEXTP_ACK2 0x1000
|
|
|
|
|
#define XM_LPNEXTP_MPAGE 0x2000
|
|
|
|
|
#define XM_LPNEXTP_ACK1 0x4000
|
|
|
|
|
#define XM_LPNEXTP_NPAGE 0x8000
|
|
|
|
|
|
|
|
|
|
#define XM_EXTSTS_HALFDUPLEX 0x4000
|
|
|
|
|
#define XM_EXTSTS_FULLDUPLEX 0x8000
|
|
|
|
|
|
|
|
|
|
#define XM_RESAB_PAUSEMISMATCH 0x0008
|
|
|
|
|
#define XM_RESAB_ABLMISMATCH 0x0010
|
|
|
|
|
#define XM_RESAB_FDMODESEL 0x0020
|
|
|
|
|
#define XM_RESAB_HDMODESEL 0x0040
|
|
|
|
|
#define XM_RESAB_PAUSEBITS 0x0180
|
