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freebsd-skq/sys/dev/dc/dcphy.c

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Start each of the license/copyright comments with /*-, minor shuffle of lines
2005-01-06 01:43:34 +00:00
/*-
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
* Copyright (c) 1997, 1998, 1999
* Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
Use __FBSDID(). Also some minor style cleanups.
2003-08-24 17:55:58 +00:00
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
/*
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
* Pseudo-driver for internal NWAY support on DEC 21143 and workalike
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
* controllers. Technically we're abusing the miibus code to handle
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
* media selection and NWAY support here since there is no MII
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
* interface. However the logical operations are roughly the same,
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
* and the alternative is to create a fake MII interface in the driver,
* which is harder to do.
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/socket.h>
#include <sys/errno.h>
Catch up to header include changes: - <sys/mutex.h> now requires <sys/systm.h> - <sys/mutex.h> and <sys/sx.h> now require <sys/lock.h>
2001-03-28 09:17:56 +00:00
#include <sys/lock.h>
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
#include <sys/module.h>
Catch up to moving headers: - machine/ipl.h -> sys/ipl.h - machine/mutex.h -> sys/mutex.h
2000-10-20 07:58:15 +00:00
#include <sys/mutex.h>
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
#include <sys/bus.h>
#include <net/if.h>
#include <net/if_arp.h>
#include <net/if_media.h>
#include <dev/mii/mii.h>
#include <dev/mii/miivar.h>
Remove miidevs.h and generate it from miidevs at compile time. The devlist2h.awk tool to do this has been repocopied to sys/tools/.
2003-01-19 02:59:34 +00:00
#include "miidevs.h"
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
#include <machine/bus.h>
#include <machine/resource.h>
Prefer new location of pci include files (which have only been in the tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
2003-08-22 06:42:59 +00:00
#include <dev/pci/pcivar.h>
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
Make dc compile after repo-copy.
2005-10-18 06:09:42 +00:00
#include <dev/dc/if_dcreg.h>
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
#include "miibus_if.h"
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
#define DC_SETBIT(sc, reg, x) \
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
CSR_WRITE_4(sc, reg, \
CSR_READ_4(sc, reg) | x)
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
#define DC_CLRBIT(sc, reg, x) \
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
CSR_WRITE_4(sc, reg, \
CSR_READ_4(sc, reg) & ~x)
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
#define MIIF_AUTOTIMEOUT 0x0004
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
Fix some problems reported by Mike Pritchard: - Add a flag DC_TX_INTR_ALWAYS which causes the transmit code to request a TX done interrupt for every packet. The PNIC seems to need this to insure that the sent TX buffers get reaped in a timely fashion. - Try to unreset the SIA as soon as possible after resetting the whole chip. - Change dcphy to support either 10/100 or 10Mbps only NICs. The built-in 21143 ethernet in Compaq Presario machines is 10Mbps only and it doesn't work right if we try to advertise 100Mbps modes during autoneg. When restricted to only 10mbps modes, it works fine. Note that for now, I detect this condition by checking the PCI subsystem ID on this NIC (which has a Compaq vendor/device ID). Yes, I know that's what the SROM is supposed to be for. I'm deliberately ignoring the SROM wherever possible. Sue me. The latter two fixes allow if_dc to work correctly with the built-in ethernet on certain Compaq Presario boxes. There are liable to be quite a few people using these as their home systems who might want to try FreeBSD; may as well be nice to them. Now if anybody out there has an Alpha miata with 10Mbps ethernet and can show me the output from pciconf -l on their system, I'd be grateful.
1999-12-13 21:45:13 +00:00
/*
* This is the subsystem ID for the built-in 21143 ethernet
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
* in several Compaq Presario systems. Apparently these are
Fix some problems reported by Mike Pritchard: - Add a flag DC_TX_INTR_ALWAYS which causes the transmit code to request a TX done interrupt for every packet. The PNIC seems to need this to insure that the sent TX buffers get reaped in a timely fashion. - Try to unreset the SIA as soon as possible after resetting the whole chip. - Change dcphy to support either 10/100 or 10Mbps only NICs. The built-in 21143 ethernet in Compaq Presario machines is 10Mbps only and it doesn't work right if we try to advertise 100Mbps modes during autoneg. When restricted to only 10mbps modes, it works fine. Note that for now, I detect this condition by checking the PCI subsystem ID on this NIC (which has a Compaq vendor/device ID). Yes, I know that's what the SROM is supposed to be for. I'm deliberately ignoring the SROM wherever possible. Sue me. The latter two fixes allow if_dc to work correctly with the built-in ethernet on certain Compaq Presario boxes. There are liable to be quite a few people using these as their home systems who might want to try FreeBSD; may as well be nice to them. Now if anybody out there has an Alpha miata with 10Mbps ethernet and can show me the output from pciconf -l on their system, I'd be grateful.
1999-12-13 21:45:13 +00:00
* 10Mbps only, so we need to treat them specially.
*/
#define COMPAQ_PRESARIO_ID 0xb0bb0e11
Put function return types on a line by themselves. Cleanup my earlier de-__P sweep and remove whitespace between function names and paramters.
2002-10-14 22:31:52 +00:00
static int dcphy_probe(device_t);
static int dcphy_attach(device_t);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
static device_method_t dcphy_methods[] = {
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
/* device interface */
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
DEVMETHOD(device_probe, dcphy_probe),
DEVMETHOD(device_attach, dcphy_attach),
Make one generic mii_phy_detach() to replace 19 slightly different ones. Rename mii_phy_auto_stop() mii_phy_down(). Introduce mii_down(), use it from nge. Do not indirect it to 19 identical case's in 19 switchstatements like NetBSD did.
2002-04-29 13:07:38 +00:00
DEVMETHOD(device_detach, mii_phy_detach),
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
DEVMETHOD(device_shutdown, bus_generic_shutdown),
Use DEVMETHOD_END.
2011-11-23 20:27:26 +00:00
DEVMETHOD_END
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
};
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
static devclass_t dcphy_devclass;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
static driver_t dcphy_driver = {
"dcphy",
dcphy_methods,
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
sizeof(struct mii_softc)
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
};
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
Remove __P.
2002-03-20 02:08:01 +00:00
static int dcphy_service(struct mii_softc *, struct mii_data *, int);
static void dcphy_status(struct mii_softc *);
static void dcphy_reset(struct mii_softc *);
Clean up mii/phy drivers: Remove the MIIF_DOINGAUTO which doesn't really do anything at the end of the day except bloat the drivers which has copy&pasted it.
2002-05-04 11:00:30 +00:00
static int dcphy_auto(struct mii_softc *);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
- Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP (reporting IFM_LOOP based on BMCR_LOOP is left in place though as it might provide useful for debugging). For most mii(4) drivers it was unclear whether the PHYs driven by them actually support loopback or not. Moreover, typically loopback mode also needs to be activated on the MAC, which none of the Ethernet drivers using mii(4) implements. Given that loopback media has no real use (and obviously hardly had a chance to actually work) besides for driver development (which just loopback mode should be sufficient for though, i.e one doesn't necessary need support for loopback media) support for it is just dropped as both NetBSD and OpenBSD already did quite some time ago. - Let mii_phy_add_media() also announce the support of IFM_NONE. - Restructure the PHY entry points to use a structure of entry points instead of discrete function pointers, and extend this to include a "reset" entry point. Make sure any PHY-specific reset routine is always used, and provide one for lxtphy(4) which disables MII interrupts (as is done for a few other PHYs we have drivers for). This includes changing NIC drivers which previously just called the generic mii_phy_reset() to now actually call the PHY-specific reset routine, which might be crucial in some cases. While at it, the redundant checks in these NIC drivers for mii->mii_instance not being zero before calling the reset routines were removed because as soon as one PHY driver attaches mii->mii_instance is incremented and we hardly can end up in their media change callbacks etc if no PHY driver has attached as mii_attach() would have failed in that case and not attach a miibus(4) instance. Consequently, NIC drivers now no longer should call mii_phy_reset() directly, so it was removed from EXPORT_SYMS. - Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe(). The purpose of that function is to perform the common steps to attach a PHY driver instance and to hook it up to the miibus(4) instance and to optionally also handle the probing, addition and initialization of the supported media. So all a PHY driver without any special requirements has to do in its bus attach method is to call mii_phy_dev_attach() along with PHY-specific MIIF_* flags, a pointer to its PHY functions and the add_media set to one. All PHY drivers were updated to take advantage of mii_phy_dev_attach() as appropriate. Along with these changes the capability mask was added to the mii_softc structure so PHY drivers taking advantage of mii_phy_dev_attach() but still handling media on their own do not need to fiddle with the MII attach arguments anyway. - Keep track of the PHY offset in the mii_softc structure. This is done for compatibility with NetBSD/OpenBSD. - Keep track of the PHY's OUI, model and revision in the mii_softc structure. Several PHY drivers require this information also after attaching and previously had to wrap their own softc around mii_softc. NetBSD/OpenBSD also keep track of the model and revision on their mii_softc structure. All PHY drivers were updated to take advantage as appropriate. - Convert the mebers of the MII data structure to unsigned where appropriate. This is partly inspired by NetBSD/OpenBSD. - According to IEEE 802.3-2002 the bits actually have to be reversed when mapping an OUI to the MII ID registers. All PHY drivers and miidevs where changed as necessary. Actually this now again allows to largely share miidevs with NetBSD, which fixed this problem already 9 years ago. Consequently miidevs was synced as far as possible. - Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that weren't explicitly converted to support flow control before. It's unclear whether flow control actually works with these but typically it should and their net behavior should be more correct with these changes in place than without if the MAC driver sets MIIF_DOPAUSE. Obtained from: NetBSD (partially) Reviewed by: yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
static const struct mii_phy_funcs dcphy_funcs = {
dcphy_service,
dcphy_status,
dcphy_reset
};
Put function return types on a line by themselves. Cleanup my earlier de-__P sweep and remove whitespace between function names and paramters.
2002-10-14 22:31:52 +00:00
static int
Use ansi function definitions in preference to K&R to reduce diffs with NetBSD (and cause it looks cooler).
2005-09-30 19:39:27 +00:00
dcphy_probe(device_t dev)
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
{
struct mii_attach_args *ma;
ma = device_get_ivars(dev);
/*
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
* The dc driver will report the 21143 vendor and device
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
* ID to let us know that it wants us to attach.
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
*/
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
if (ma->mii_id1 != DC_VENDORID_DEC ||
ma->mii_id2 != DC_DEVICEID_21143)
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
return (ENXIO);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
device_set_desc(dev, "Intel 21143 NWAY media interface");
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
Replace hard-coded magic constants to system defined constants (BUS_PROBE_DEFAULT, BUS_PROBE_GENERIC etc). These pseudo PHY drivers were forgotten from the conversion due to the repo copy to dc driver location.
2006-08-02 05:28:52 +00:00
return (BUS_PROBE_DEFAULT);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
}
Put function return types on a line by themselves. Cleanup my earlier de-__P sweep and remove whitespace between function names and paramters.
2002-10-14 22:31:52 +00:00
static int
Use ansi function definitions in preference to K&R to reduce diffs with NetBSD (and cause it looks cooler).
2005-09-30 19:39:27 +00:00
dcphy_attach(device_t dev)
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
{
struct mii_softc *sc;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
struct dc_softc *dc_sc;
Use PCI bus accessors rather than reading config registers directly to get the subvendor device id.
2006-06-03 20:37:56 +00:00
device_t brdev;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
sc = device_get_softc(dev);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
- Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP (reporting IFM_LOOP based on BMCR_LOOP is left in place though as it might provide useful for debugging). For most mii(4) drivers it was unclear whether the PHYs driven by them actually support loopback or not. Moreover, typically loopback mode also needs to be activated on the MAC, which none of the Ethernet drivers using mii(4) implements. Given that loopback media has no real use (and obviously hardly had a chance to actually work) besides for driver development (which just loopback mode should be sufficient for though, i.e one doesn't necessary need support for loopback media) support for it is just dropped as both NetBSD and OpenBSD already did quite some time ago. - Let mii_phy_add_media() also announce the support of IFM_NONE. - Restructure the PHY entry points to use a structure of entry points instead of discrete function pointers, and extend this to include a "reset" entry point. Make sure any PHY-specific reset routine is always used, and provide one for lxtphy(4) which disables MII interrupts (as is done for a few other PHYs we have drivers for). This includes changing NIC drivers which previously just called the generic mii_phy_reset() to now actually call the PHY-specific reset routine, which might be crucial in some cases. While at it, the redundant checks in these NIC drivers for mii->mii_instance not being zero before calling the reset routines were removed because as soon as one PHY driver attaches mii->mii_instance is incremented and we hardly can end up in their media change callbacks etc if no PHY driver has attached as mii_attach() would have failed in that case and not attach a miibus(4) instance. Consequently, NIC drivers now no longer should call mii_phy_reset() directly, so it was removed from EXPORT_SYMS. - Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe(). The purpose of that function is to perform the common steps to attach a PHY driver instance and to hook it up to the miibus(4) instance and to optionally also handle the probing, addition and initialization of the supported media. So all a PHY driver without any special requirements has to do in its bus attach method is to call mii_phy_dev_attach() along with PHY-specific MIIF_* flags, a pointer to its PHY functions and the add_media set to one. All PHY drivers were updated to take advantage of mii_phy_dev_attach() as appropriate. Along with these changes the capability mask was added to the mii_softc structure so PHY drivers taking advantage of mii_phy_dev_attach() but still handling media on their own do not need to fiddle with the MII attach arguments anyway. - Keep track of the PHY offset in the mii_softc structure. This is done for compatibility with NetBSD/OpenBSD. - Keep track of the PHY's OUI, model and revision in the mii_softc structure. Several PHY drivers require this information also after attaching and previously had to wrap their own softc around mii_softc. NetBSD/OpenBSD also keep track of the model and revision on their mii_softc structure. All PHY drivers were updated to take advantage as appropriate. - Convert the mebers of the MII data structure to unsigned where appropriate. This is partly inspired by NetBSD/OpenBSD. - According to IEEE 802.3-2002 the bits actually have to be reversed when mapping an OUI to the MII ID registers. All PHY drivers and miidevs where changed as necessary. Actually this now again allows to largely share miidevs with NetBSD, which fixed this problem already 9 years ago. Consequently miidevs was synced as far as possible. - Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that weren't explicitly converted to support flow control before. It's unclear whether flow control actually works with these but typically it should and their net behavior should be more correct with these changes in place than without if the MAC driver sets MIIF_DOPAUSE. Obtained from: NetBSD (partially) Reviewed by: yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
&dcphy_funcs, 0);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
- Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP (reporting IFM_LOOP based on BMCR_LOOP is left in place though as it might provide useful for debugging). For most mii(4) drivers it was unclear whether the PHYs driven by them actually support loopback or not. Moreover, typically loopback mode also needs to be activated on the MAC, which none of the Ethernet drivers using mii(4) implements. Given that loopback media has no real use (and obviously hardly had a chance to actually work) besides for driver development (which just loopback mode should be sufficient for though, i.e one doesn't necessary need support for loopback media) support for it is just dropped as both NetBSD and OpenBSD already did quite some time ago. - Let mii_phy_add_media() also announce the support of IFM_NONE. - Restructure the PHY entry points to use a structure of entry points instead of discrete function pointers, and extend this to include a "reset" entry point. Make sure any PHY-specific reset routine is always used, and provide one for lxtphy(4) which disables MII interrupts (as is done for a few other PHYs we have drivers for). This includes changing NIC drivers which previously just called the generic mii_phy_reset() to now actually call the PHY-specific reset routine, which might be crucial in some cases. While at it, the redundant checks in these NIC drivers for mii->mii_instance not being zero before calling the reset routines were removed because as soon as one PHY driver attaches mii->mii_instance is incremented and we hardly can end up in their media change callbacks etc if no PHY driver has attached as mii_attach() would have failed in that case and not attach a miibus(4) instance. Consequently, NIC drivers now no longer should call mii_phy_reset() directly, so it was removed from EXPORT_SYMS. - Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe(). The purpose of that function is to perform the common steps to attach a PHY driver instance and to hook it up to the miibus(4) instance and to optionally also handle the probing, addition and initialization of the supported media. So all a PHY driver without any special requirements has to do in its bus attach method is to call mii_phy_dev_attach() along with PHY-specific MIIF_* flags, a pointer to its PHY functions and the add_media set to one. All PHY drivers were updated to take advantage of mii_phy_dev_attach() as appropriate. Along with these changes the capability mask was added to the mii_softc structure so PHY drivers taking advantage of mii_phy_dev_attach() but still handling media on their own do not need to fiddle with the MII attach arguments anyway. - Keep track of the PHY offset in the mii_softc structure. This is done for compatibility with NetBSD/OpenBSD. - Keep track of the PHY's OUI, model and revision in the mii_softc structure. Several PHY drivers require this information also after attaching and previously had to wrap their own softc around mii_softc. NetBSD/OpenBSD also keep track of the model and revision on their mii_softc structure. All PHY drivers were updated to take advantage as appropriate. - Convert the mebers of the MII data structure to unsigned where appropriate. This is partly inspired by NetBSD/OpenBSD. - According to IEEE 802.3-2002 the bits actually have to be reversed when mapping an OUI to the MII ID registers. All PHY drivers and miidevs where changed as necessary. Actually this now again allows to largely share miidevs with NetBSD, which fixed this problem already 9 years ago. Consequently miidevs was synced as far as possible. - Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that weren't explicitly converted to support flow control before. It's unclear whether flow control actually works with these but typically it should and their net behavior should be more correct with these changes in place than without if the MAC driver sets MIIF_DOPAUSE. Obtained from: NetBSD (partially) Reviewed by: yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
/*PHY_RESET(sc);*/
dc_sc = sc->mii_pdata->mii_ifp->if_softc;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
Use PCI bus accessors rather than reading config registers directly to get the subvendor device id.
2006-06-03 20:37:56 +00:00
brdev = device_get_parent(sc->mii_dev);
switch (pci_get_subdevice(brdev) << 16 | pci_get_subvendor(brdev)) {
Fix some problems reported by Mike Pritchard: - Add a flag DC_TX_INTR_ALWAYS which causes the transmit code to request a TX done interrupt for every packet. The PNIC seems to need this to insure that the sent TX buffers get reaped in a timely fashion. - Try to unreset the SIA as soon as possible after resetting the whole chip. - Change dcphy to support either 10/100 or 10Mbps only NICs. The built-in 21143 ethernet in Compaq Presario machines is 10Mbps only and it doesn't work right if we try to advertise 100Mbps modes during autoneg. When restricted to only 10mbps modes, it works fine. Note that for now, I detect this condition by checking the PCI subsystem ID on this NIC (which has a Compaq vendor/device ID). Yes, I know that's what the SROM is supposed to be for. I'm deliberately ignoring the SROM wherever possible. Sue me. The latter two fixes allow if_dc to work correctly with the built-in ethernet on certain Compaq Presario boxes. There are liable to be quite a few people using these as their home systems who might want to try FreeBSD; may as well be nice to them. Now if anybody out there has an Alpha miata with 10Mbps ethernet and can show me the output from pciconf -l on their system, I'd be grateful.
1999-12-13 21:45:13 +00:00
case COMPAQ_PRESARIO_ID:
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
/* Example of how to only allow 10Mbps modes. */
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
sc->mii_capabilities = BMSR_ANEG | BMSR_10TFDX | BMSR_10THDX;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
break;
default:
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
if (dc_sc->dc_pmode == DC_PMODE_SIA)
Add support for parsing the media blocks from the SROM on 21143 adapters. This is necessary in order to make this driver work with the built-in ethernet on the alpha Miata machines. These systems have a 21143-PC chip on-board and optional daughtercards with either a 10/100 MII transceiver or a 10baseT/10base2 transceiver. In both cases, you need to twiddle the GPIO bits on the controller in order to turn the transceivers on, and you have to read the media info from the SROM in order to find out what bits to twiddle.
2000-10-05 17:36:14 +00:00
sc->mii_capabilities =
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
BMSR_ANEG | BMSR_10TFDX | BMSR_10THDX;
else
Add support for parsing the media blocks from the SROM on 21143 adapters. This is necessary in order to make this driver work with the built-in ethernet on the alpha Miata machines. These systems have a 21143-PC chip on-board and optional daughtercards with either a 10/100 MII transceiver or a 10baseT/10base2 transceiver. In both cases, you need to twiddle the GPIO bits on the controller in order to turn the transceivers on, and you have to read the media info from the SROM in order to find out what bits to twiddle.
2000-10-05 17:36:14 +00:00
sc->mii_capabilities =
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
BMSR_ANEG | BMSR_100TXFDX | BMSR_100TXHDX |
BMSR_10TFDX | BMSR_10THDX;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
break;
}
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
- Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP (reporting IFM_LOOP based on BMCR_LOOP is left in place though as it might provide useful for debugging). For most mii(4) drivers it was unclear whether the PHYs driven by them actually support loopback or not. Moreover, typically loopback mode also needs to be activated on the MAC, which none of the Ethernet drivers using mii(4) implements. Given that loopback media has no real use (and obviously hardly had a chance to actually work) besides for driver development (which just loopback mode should be sufficient for though, i.e one doesn't necessary need support for loopback media) support for it is just dropped as both NetBSD and OpenBSD already did quite some time ago. - Let mii_phy_add_media() also announce the support of IFM_NONE. - Restructure the PHY entry points to use a structure of entry points instead of discrete function pointers, and extend this to include a "reset" entry point. Make sure any PHY-specific reset routine is always used, and provide one for lxtphy(4) which disables MII interrupts (as is done for a few other PHYs we have drivers for). This includes changing NIC drivers which previously just called the generic mii_phy_reset() to now actually call the PHY-specific reset routine, which might be crucial in some cases. While at it, the redundant checks in these NIC drivers for mii->mii_instance not being zero before calling the reset routines were removed because as soon as one PHY driver attaches mii->mii_instance is incremented and we hardly can end up in their media change callbacks etc if no PHY driver has attached as mii_attach() would have failed in that case and not attach a miibus(4) instance. Consequently, NIC drivers now no longer should call mii_phy_reset() directly, so it was removed from EXPORT_SYMS. - Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe(). The purpose of that function is to perform the common steps to attach a PHY driver instance and to hook it up to the miibus(4) instance and to optionally also handle the probing, addition and initialization of the supported media. So all a PHY driver without any special requirements has to do in its bus attach method is to call mii_phy_dev_attach() along with PHY-specific MIIF_* flags, a pointer to its PHY functions and the add_media set to one. All PHY drivers were updated to take advantage of mii_phy_dev_attach() as appropriate. Along with these changes the capability mask was added to the mii_softc structure so PHY drivers taking advantage of mii_phy_dev_attach() but still handling media on their own do not need to fiddle with the MII attach arguments anyway. - Keep track of the PHY offset in the mii_softc structure. This is done for compatibility with NetBSD/OpenBSD. - Keep track of the PHY's OUI, model and revision in the mii_softc structure. Several PHY drivers require this information also after attaching and previously had to wrap their own softc around mii_softc. NetBSD/OpenBSD also keep track of the model and revision on their mii_softc structure. All PHY drivers were updated to take advantage as appropriate. - Convert the mebers of the MII data structure to unsigned where appropriate. This is partly inspired by NetBSD/OpenBSD. - According to IEEE 802.3-2002 the bits actually have to be reversed when mapping an OUI to the MII ID registers. All PHY drivers and miidevs where changed as necessary. Actually this now again allows to largely share miidevs with NetBSD, which fixed this problem already 9 years ago. Consequently miidevs was synced as far as possible. - Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that weren't explicitly converted to support flow control before. It's unclear whether flow control actually works with these but typically it should and their net behavior should be more correct with these changes in place than without if the MAC driver sets MIIF_DOPAUSE. Obtained from: NetBSD (partially) Reviewed by: yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
sc->mii_capabilities &= sc->mii_capmask;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
device_printf(dev, " ");
- Set MIIF_NOLOOP and don't add IFM_LOOP as loopback apparently isn't supported with these pseudo-PHYs. The MIIF_NOLOOP flag currently triggers nothing but hopefully will be respected by mii_phy_setmedia() later on. - Don't add IFM_NONE as isolation isn't supported by these pseudo-PHYs. - Use mii_phy_add_media() instead of mii_add_media() so the latter can be eventually retired.
2009-03-19 22:34:55 +00:00
mii_phy_add_media(sc);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
printf("\n");
MIIBUS_MEDIAINIT(sc->mii_dev);
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
return (0);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
}
Cleanup pass for mii drivers. . Make internal service routines static. . Use a consistent ordering of checks in MII_TICK. Do the work in the mii_phy_tick() subroutine if appropriate. . Call mii_phy_update() to trigger the callbacks.
2001-09-29 19:18:52 +00:00
static int
Use ansi function definitions in preference to K&R to reduce diffs with NetBSD (and cause it looks cooler).
2005-09-30 19:39:27 +00:00
dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
{
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
struct dc_softc *dc_sc;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
int reg;
u_int32_t mode;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
dc_sc = mii->mii_ifp->if_softc;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
switch (cmd) {
case MII_POLLSTAT:
break;
case MII_MEDIACHG:
/*
* If the interface is not up, don't do anything.
*/
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
break;
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
mii->mii_media_active = IFM_NONE;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
mode = CSR_READ_4(dc_sc, DC_NETCFG);
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
mode &= ~(DC_NETCFG_FULLDUPLEX | DC_NETCFG_PORTSEL |
DC_NETCFG_PCS | DC_NETCFG_SCRAMBLER | DC_NETCFG_SPEEDSEL);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
switch (IFM_SUBTYPE(ife->ifm_media)) {
case IFM_AUTO:
- Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP (reporting IFM_LOOP based on BMCR_LOOP is left in place though as it might provide useful for debugging). For most mii(4) drivers it was unclear whether the PHYs driven by them actually support loopback or not. Moreover, typically loopback mode also needs to be activated on the MAC, which none of the Ethernet drivers using mii(4) implements. Given that loopback media has no real use (and obviously hardly had a chance to actually work) besides for driver development (which just loopback mode should be sufficient for though, i.e one doesn't necessary need support for loopback media) support for it is just dropped as both NetBSD and OpenBSD already did quite some time ago. - Let mii_phy_add_media() also announce the support of IFM_NONE. - Restructure the PHY entry points to use a structure of entry points instead of discrete function pointers, and extend this to include a "reset" entry point. Make sure any PHY-specific reset routine is always used, and provide one for lxtphy(4) which disables MII interrupts (as is done for a few other PHYs we have drivers for). This includes changing NIC drivers which previously just called the generic mii_phy_reset() to now actually call the PHY-specific reset routine, which might be crucial in some cases. While at it, the redundant checks in these NIC drivers for mii->mii_instance not being zero before calling the reset routines were removed because as soon as one PHY driver attaches mii->mii_instance is incremented and we hardly can end up in their media change callbacks etc if no PHY driver has attached as mii_attach() would have failed in that case and not attach a miibus(4) instance. Consequently, NIC drivers now no longer should call mii_phy_reset() directly, so it was removed from EXPORT_SYMS. - Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe(). The purpose of that function is to perform the common steps to attach a PHY driver instance and to hook it up to the miibus(4) instance and to optionally also handle the probing, addition and initialization of the supported media. So all a PHY driver without any special requirements has to do in its bus attach method is to call mii_phy_dev_attach() along with PHY-specific MIIF_* flags, a pointer to its PHY functions and the add_media set to one. All PHY drivers were updated to take advantage of mii_phy_dev_attach() as appropriate. Along with these changes the capability mask was added to the mii_softc structure so PHY drivers taking advantage of mii_phy_dev_attach() but still handling media on their own do not need to fiddle with the MII attach arguments anyway. - Keep track of the PHY offset in the mii_softc structure. This is done for compatibility with NetBSD/OpenBSD. - Keep track of the PHY's OUI, model and revision in the mii_softc structure. Several PHY drivers require this information also after attaching and previously had to wrap their own softc around mii_softc. NetBSD/OpenBSD also keep track of the model and revision on their mii_softc structure. All PHY drivers were updated to take advantage as appropriate. - Convert the mebers of the MII data structure to unsigned where appropriate. This is partly inspired by NetBSD/OpenBSD. - According to IEEE 802.3-2002 the bits actually have to be reversed when mapping an OUI to the MII ID registers. All PHY drivers and miidevs where changed as necessary. Actually this now again allows to largely share miidevs with NetBSD, which fixed this problem already 9 years ago. Consequently miidevs was synced as far as possible. - Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that weren't explicitly converted to support flow control before. It's unclear whether flow control actually works with these but typically it should and their net behavior should be more correct with these changes in place than without if the MAC driver sets MIIF_DOPAUSE. Obtained from: NetBSD (partially) Reviewed by: yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
/*PHY_RESET(sc);*/
(void)dcphy_auto(sc);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
break;
case IFM_100_TX:
- Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP (reporting IFM_LOOP based on BMCR_LOOP is left in place though as it might provide useful for debugging). For most mii(4) drivers it was unclear whether the PHYs driven by them actually support loopback or not. Moreover, typically loopback mode also needs to be activated on the MAC, which none of the Ethernet drivers using mii(4) implements. Given that loopback media has no real use (and obviously hardly had a chance to actually work) besides for driver development (which just loopback mode should be sufficient for though, i.e one doesn't necessary need support for loopback media) support for it is just dropped as both NetBSD and OpenBSD already did quite some time ago. - Let mii_phy_add_media() also announce the support of IFM_NONE. - Restructure the PHY entry points to use a structure of entry points instead of discrete function pointers, and extend this to include a "reset" entry point. Make sure any PHY-specific reset routine is always used, and provide one for lxtphy(4) which disables MII interrupts (as is done for a few other PHYs we have drivers for). This includes changing NIC drivers which previously just called the generic mii_phy_reset() to now actually call the PHY-specific reset routine, which might be crucial in some cases. While at it, the redundant checks in these NIC drivers for mii->mii_instance not being zero before calling the reset routines were removed because as soon as one PHY driver attaches mii->mii_instance is incremented and we hardly can end up in their media change callbacks etc if no PHY driver has attached as mii_attach() would have failed in that case and not attach a miibus(4) instance. Consequently, NIC drivers now no longer should call mii_phy_reset() directly, so it was removed from EXPORT_SYMS. - Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe(). The purpose of that function is to perform the common steps to attach a PHY driver instance and to hook it up to the miibus(4) instance and to optionally also handle the probing, addition and initialization of the supported media. So all a PHY driver without any special requirements has to do in its bus attach method is to call mii_phy_dev_attach() along with PHY-specific MIIF_* flags, a pointer to its PHY functions and the add_media set to one. All PHY drivers were updated to take advantage of mii_phy_dev_attach() as appropriate. Along with these changes the capability mask was added to the mii_softc structure so PHY drivers taking advantage of mii_phy_dev_attach() but still handling media on their own do not need to fiddle with the MII attach arguments anyway. - Keep track of the PHY offset in the mii_softc structure. This is done for compatibility with NetBSD/OpenBSD. - Keep track of the PHY's OUI, model and revision in the mii_softc structure. Several PHY drivers require this information also after attaching and previously had to wrap their own softc around mii_softc. NetBSD/OpenBSD also keep track of the model and revision on their mii_softc structure. All PHY drivers were updated to take advantage as appropriate. - Convert the mebers of the MII data structure to unsigned where appropriate. This is partly inspired by NetBSD/OpenBSD. - According to IEEE 802.3-2002 the bits actually have to be reversed when mapping an OUI to the MII ID registers. All PHY drivers and miidevs where changed as necessary. Actually this now again allows to largely share miidevs with NetBSD, which fixed this problem already 9 years ago. Consequently miidevs was synced as far as possible. - Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that weren't explicitly converted to support flow control before. It's unclear whether flow control actually works with these but typically it should and their net behavior should be more correct with these changes in place than without if the MAC driver sets MIIF_DOPAUSE. Obtained from: NetBSD (partially) Reviewed by: yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
PHY_RESET(sc);
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
mode |= DC_NETCFG_PORTSEL | DC_NETCFG_PCS |
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
DC_NETCFG_SCRAMBLER;
- Even after masking the media with IFM_GMASK the result may have bits besides the duplex ones set so just comparing it with IFM_FDX may lead to false negatives. - Just let the default case handle all unsupported media types. - In pnphy_status() don't unnecessarily read a register twice. - Remove unnused macros. MFC after: 1 week
2011-01-14 20:26:59 +00:00
if ((ife->ifm_media & IFM_FDX) != 0)
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
mode |= DC_NETCFG_FULLDUPLEX;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
else
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
mode &= ~DC_NETCFG_FULLDUPLEX;
CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
break;
case IFM_10_T:
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
- Even after masking the media with IFM_GMASK the result may have bits besides the duplex ones set so just comparing it with IFM_FDX may lead to false negatives. - Just let the default case handle all unsupported media types. - In pnphy_status() don't unnecessarily read a register twice. - Remove unnused macros. MFC after: 1 week
2011-01-14 20:26:59 +00:00
if ((ife->ifm_media & IFM_FDX) != 0)
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
else
DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
mode &= ~DC_NETCFG_PORTSEL;
mode |= DC_NETCFG_SPEEDSEL;
- Even after masking the media with IFM_GMASK the result may have bits besides the duplex ones set so just comparing it with IFM_FDX may lead to false negatives. - Just let the default case handle all unsupported media types. - In pnphy_status() don't unnecessarily read a register twice. - Remove unnused macros. MFC after: 1 week
2011-01-14 20:26:59 +00:00
if ((ife->ifm_media & IFM_FDX) != 0)
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
mode |= DC_NETCFG_FULLDUPLEX;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
else
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
mode &= ~DC_NETCFG_FULLDUPLEX;
CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
break;
default:
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
return (EINVAL);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
}
break;
case MII_TICK:
/*
Cleanup pass for mii drivers. . Make internal service routines static. . Use a consistent ordering of checks in MII_TICK. Do the work in the mii_phy_tick() subroutine if appropriate. . Call mii_phy_update() to trigger the callbacks.
2001-09-29 19:18:52 +00:00
* Is the interface even up?
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
*/
Cleanup pass for mii drivers. . Make internal service routines static. . Use a consistent ordering of checks in MII_TICK. Do the work in the mii_phy_tick() subroutine if appropriate. . Call mii_phy_update() to trigger the callbacks.
2001-09-29 19:18:52 +00:00
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
return (0);
/*
Cleanup pass for mii drivers. . Make internal service routines static. . Use a consistent ordering of checks in MII_TICK. Do the work in the mii_phy_tick() subroutine if appropriate. . Call mii_phy_update() to trigger the callbacks.
2001-09-29 19:18:52 +00:00
* Only used for autonegotiation.
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
*/
Cleanup pass for mii drivers. . Make internal service routines static. . Use a consistent ordering of checks in MII_TICK. Do the work in the mii_phy_tick() subroutine if appropriate. . Call mii_phy_update() to trigger the callbacks.
2001-09-29 19:18:52 +00:00
if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
break;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
Work around an Intel 21143 chip bug. Rev 1.56 of if_dc.c removed calls to mii_pollstat() from the dc_tick() routine. dc_tick() is called regularly to detect link up and link down status, especially when autonegotiating. The expectation was that mii_tick() (which is still called from dc_tick()) would update status information automatically in all cases where it would be sensible to do so. Unfortunately, with authentic 21143 chips this is not the case, and the driver never successfully autonegotiates. This is because (despite what it says in the 21143 manual) the chip always claims that link is not present while the autonegotiation enable bit is set. Autonegotation takes place and succeeds, but the driver tests the link bits before it switches off the autonegotiation enable bit, and success is not recognised. The simplest solution is to call dcphy_status() more often for MII_TICK calls by dropping out of the switch statement instead of exiting when we are autonegotiating and link appears to not be present. When autonegotiation succeeds, dcphy_status() will note the speed and fdx/hdx state and turn off the autonegotiation enable bit. The next call to dcphy_status() will notice that link is present, and the dc driver code will be notified. Macronix chips also use this code, but implement link detection as described in the manual, and hence don't need this patch. However, tests on a Macronix 98715AEC-C show that it does not adversely affect them. This could be done better but is the minimal effective change, and most closely mimics what was happening prior to rev 1.56 of if_dc.c. (Actually I also deleted a small amount of unnecessary code while I was in the area.) Reviewed by: wpaul
2002-04-18 14:40:20 +00:00
reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
Rework the support for the internal autonegotiation on the 21143 and workalike chips (Macronix 98713A/98715 and PNIC II). Timing is somewhat critical: you need to bring the link as soon as possible after NWAY is done, and the old one second polling interval was too long. Now we poll every 10th of a second until NWAY completes (at which point we return to the 1 second interval again to keep an eye on the link state). I tested all the other cards I had on hand to make sure I didn't bust any of them and they seem to work (including the MII-based 21143 card). This should fix some autoneg problems with DE500-BA cards and the built-in 10/100 ethernet on some alpha systems. (Now before anyone asks why I never noticed this before, the old code worked just find with the Intel swich I used for testing back in NY. Apparently not all switches are as picky about the timing.)
2000-05-31 05:40:53 +00:00
if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
Cleanup pass for mii drivers. . Make internal service routines static. . Use a consistent ordering of checks in MII_TICK. Do the work in the mii_phy_tick() subroutine if appropriate. . Call mii_phy_update() to trigger the callbacks.
2001-09-29 19:18:52 +00:00
break;
Rework the support for the internal autonegotiation on the 21143 and workalike chips (Macronix 98713A/98715 and PNIC II). Timing is somewhat critical: you need to bring the link as soon as possible after NWAY is done, and the old one second polling interval was too long. Now we poll every 10th of a second until NWAY completes (at which point we return to the 1 second interval again to keep an eye on the link state). I tested all the other cards I had on hand to make sure I didn't bust any of them and they seem to work (including the MII-based 21143 card). This should fix some autoneg problems with DE500-BA cards and the built-in 10/100 ethernet on some alpha systems. (Now before anyone asks why I never noticed this before, the old code worked just find with the Intel swich I used for testing back in NY. Apparently not all switches are as picky about the timing.)
2000-05-31 05:40:53 +00:00
/*
* Only retry autonegotiation every 5 seconds.
Work around an Intel 21143 chip bug. Rev 1.56 of if_dc.c removed calls to mii_pollstat() from the dc_tick() routine. dc_tick() is called regularly to detect link up and link down status, especially when autonegotiating. The expectation was that mii_tick() (which is still called from dc_tick()) would update status information automatically in all cases where it would be sensible to do so. Unfortunately, with authentic 21143 chips this is not the case, and the driver never successfully autonegotiates. This is because (despite what it says in the 21143 manual) the chip always claims that link is not present while the autonegotiation enable bit is set. Autonegotation takes place and succeeds, but the driver tests the link bits before it switches off the autonegotiation enable bit, and success is not recognised. The simplest solution is to call dcphy_status() more often for MII_TICK calls by dropping out of the switch statement instead of exiting when we are autonegotiating and link appears to not be present. When autonegotiation succeeds, dcphy_status() will note the speed and fdx/hdx state and turn off the autonegotiation enable bit. The next call to dcphy_status() will notice that link is present, and the dc driver code will be notified. Macronix chips also use this code, but implement link detection as described in the manual, and hence don't need this patch. However, tests on a Macronix 98715AEC-C show that it does not adversely affect them. This could be done better but is the minimal effective change, and most closely mimics what was happening prior to rev 1.56 of if_dc.c. (Actually I also deleted a small amount of unnecessary code while I was in the area.) Reviewed by: wpaul
2002-04-18 14:40:20 +00:00
*
* Otherwise, fall through to calling dcphy_status()
* since real Intel 21143 chips don't show valid link
* status until autonegotiation is switched off, and
* that only happens in dcphy_status(). Without this,
Spelling fix in a comment.
2004-05-29 18:13:44 +00:00
* successful autonegotiation is never recognised on
Work around an Intel 21143 chip bug. Rev 1.56 of if_dc.c removed calls to mii_pollstat() from the dc_tick() routine. dc_tick() is called regularly to detect link up and link down status, especially when autonegotiating. The expectation was that mii_tick() (which is still called from dc_tick()) would update status information automatically in all cases where it would be sensible to do so. Unfortunately, with authentic 21143 chips this is not the case, and the driver never successfully autonegotiates. This is because (despite what it says in the 21143 manual) the chip always claims that link is not present while the autonegotiation enable bit is set. Autonegotation takes place and succeeds, but the driver tests the link bits before it switches off the autonegotiation enable bit, and success is not recognised. The simplest solution is to call dcphy_status() more often for MII_TICK calls by dropping out of the switch statement instead of exiting when we are autonegotiating and link appears to not be present. When autonegotiation succeeds, dcphy_status() will note the speed and fdx/hdx state and turn off the autonegotiation enable bit. The next call to dcphy_status() will notice that link is present, and the dc driver code will be notified. Macronix chips also use this code, but implement link detection as described in the manual, and hence don't need this patch. However, tests on a Macronix 98715AEC-C show that it does not adversely affect them. This could be done better but is the minimal effective change, and most closely mimics what was happening prior to rev 1.56 of if_dc.c. (Actually I also deleted a small amount of unnecessary code while I was in the area.) Reviewed by: wpaul
2002-04-18 14:40:20 +00:00
* these chips.
Rework the support for the internal autonegotiation on the 21143 and workalike chips (Macronix 98713A/98715 and PNIC II). Timing is somewhat critical: you need to bring the link as soon as possible after NWAY is done, and the old one second polling interval was too long. Now we poll every 10th of a second until NWAY completes (at which point we return to the 1 second interval again to keep an eye on the link state). I tested all the other cards I had on hand to make sure I didn't bust any of them and they seem to work (including the MII-based 21143 card). This should fix some autoneg problems with DE500-BA cards and the built-in 10/100 ethernet on some alpha systems. (Now before anyone asks why I never noticed this before, the old code worked just find with the Intel swich I used for testing back in NY. Apparently not all switches are as picky about the timing.)
2000-05-31 05:40:53 +00:00
*/
Correct the phy_service() routine case MII_TICK to correctly track the falling edge of a media state change. This is in preparation for media state change notification to the routing socket. No objections by: sam, wpaul, ru, bms Brucification by: bde
2004-05-03 13:01:34 +00:00
if (++sc->mii_ticks <= 50)
Work around an Intel 21143 chip bug. Rev 1.56 of if_dc.c removed calls to mii_pollstat() from the dc_tick() routine. dc_tick() is called regularly to detect link up and link down status, especially when autonegotiating. The expectation was that mii_tick() (which is still called from dc_tick()) would update status information automatically in all cases where it would be sensible to do so. Unfortunately, with authentic 21143 chips this is not the case, and the driver never successfully autonegotiates. This is because (despite what it says in the 21143 manual) the chip always claims that link is not present while the autonegotiation enable bit is set. Autonegotation takes place and succeeds, but the driver tests the link bits before it switches off the autonegotiation enable bit, and success is not recognised. The simplest solution is to call dcphy_status() more often for MII_TICK calls by dropping out of the switch statement instead of exiting when we are autonegotiating and link appears to not be present. When autonegotiation succeeds, dcphy_status() will note the speed and fdx/hdx state and turn off the autonegotiation enable bit. The next call to dcphy_status() will notice that link is present, and the dc driver code will be notified. Macronix chips also use this code, but implement link detection as described in the manual, and hence don't need this patch. However, tests on a Macronix 98715AEC-C show that it does not adversely affect them. This could be done better but is the minimal effective change, and most closely mimics what was happening prior to rev 1.56 of if_dc.c. (Actually I also deleted a small amount of unnecessary code while I was in the area.) Reviewed by: wpaul
2002-04-18 14:40:20 +00:00
break;
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
sc->mii_ticks = 0;
Clean up mii/phy drivers: Remove the MIIF_DOINGAUTO which doesn't really do anything at the end of the day except bloat the drivers which has copy&pasted it.
2002-05-04 11:00:30 +00:00
dcphy_auto(sc);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
break;
}
/* Update the media status. */
- Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP (reporting IFM_LOOP based on BMCR_LOOP is left in place though as it might provide useful for debugging). For most mii(4) drivers it was unclear whether the PHYs driven by them actually support loopback or not. Moreover, typically loopback mode also needs to be activated on the MAC, which none of the Ethernet drivers using mii(4) implements. Given that loopback media has no real use (and obviously hardly had a chance to actually work) besides for driver development (which just loopback mode should be sufficient for though, i.e one doesn't necessary need support for loopback media) support for it is just dropped as both NetBSD and OpenBSD already did quite some time ago. - Let mii_phy_add_media() also announce the support of IFM_NONE. - Restructure the PHY entry points to use a structure of entry points instead of discrete function pointers, and extend this to include a "reset" entry point. Make sure any PHY-specific reset routine is always used, and provide one for lxtphy(4) which disables MII interrupts (as is done for a few other PHYs we have drivers for). This includes changing NIC drivers which previously just called the generic mii_phy_reset() to now actually call the PHY-specific reset routine, which might be crucial in some cases. While at it, the redundant checks in these NIC drivers for mii->mii_instance not being zero before calling the reset routines were removed because as soon as one PHY driver attaches mii->mii_instance is incremented and we hardly can end up in their media change callbacks etc if no PHY driver has attached as mii_attach() would have failed in that case and not attach a miibus(4) instance. Consequently, NIC drivers now no longer should call mii_phy_reset() directly, so it was removed from EXPORT_SYMS. - Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe(). The purpose of that function is to perform the common steps to attach a PHY driver instance and to hook it up to the miibus(4) instance and to optionally also handle the probing, addition and initialization of the supported media. So all a PHY driver without any special requirements has to do in its bus attach method is to call mii_phy_dev_attach() along with PHY-specific MIIF_* flags, a pointer to its PHY functions and the add_media set to one. All PHY drivers were updated to take advantage of mii_phy_dev_attach() as appropriate. Along with these changes the capability mask was added to the mii_softc structure so PHY drivers taking advantage of mii_phy_dev_attach() but still handling media on their own do not need to fiddle with the MII attach arguments anyway. - Keep track of the PHY offset in the mii_softc structure. This is done for compatibility with NetBSD/OpenBSD. - Keep track of the PHY's OUI, model and revision in the mii_softc structure. Several PHY drivers require this information also after attaching and previously had to wrap their own softc around mii_softc. NetBSD/OpenBSD also keep track of the model and revision on their mii_softc structure. All PHY drivers were updated to take advantage as appropriate. - Convert the mebers of the MII data structure to unsigned where appropriate. This is partly inspired by NetBSD/OpenBSD. - According to IEEE 802.3-2002 the bits actually have to be reversed when mapping an OUI to the MII ID registers. All PHY drivers and miidevs where changed as necessary. Actually this now again allows to largely share miidevs with NetBSD, which fixed this problem already 9 years ago. Consequently miidevs was synced as far as possible. - Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that weren't explicitly converted to support flow control before. It's unclear whether flow control actually works with these but typically it should and their net behavior should be more correct with these changes in place than without if the MAC driver sets MIIF_DOPAUSE. Obtained from: NetBSD (partially) Reviewed by: yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
PHY_STATUS(sc);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
/* Callback if something changed. */
Cleanup pass for mii drivers. . Make internal service routines static. . Use a consistent ordering of checks in MII_TICK. Do the work in the mii_phy_tick() subroutine if appropriate. . Call mii_phy_update() to trigger the callbacks.
2001-09-29 19:18:52 +00:00
mii_phy_update(sc, cmd);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
return (0);
}
Cleanup pass for mii drivers. . Make internal service routines static. . Use a consistent ordering of checks in MII_TICK. Do the work in the mii_phy_tick() subroutine if appropriate. . Call mii_phy_update() to trigger the callbacks.
2001-09-29 19:18:52 +00:00
static void
Use ansi function definitions in preference to K&R to reduce diffs with NetBSD (and cause it looks cooler).
2005-09-30 19:39:27 +00:00
dcphy_status(struct mii_softc *sc)
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
{
struct mii_data *mii = sc->mii_pdata;
There's no need to read DC_10BTSTAT twice in dcphy_status().
2011-11-18 21:23:13 +00:00
int anlpar, tstat;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
struct dc_softc *dc_sc;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
dc_sc = mii->mii_ifp->if_softc;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
mii->mii_media_status = IFM_AVALID;
mii->mii_media_active = IFM_ETHER;
Don't bother checking the link state in dcphy_status() if the interface isn't up.
2000-06-05 19:37:15 +00:00
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
return;
There's no need to read DC_10BTSTAT twice in dcphy_status().
2011-11-18 21:23:13 +00:00
tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
if (!(tstat & DC_TSTAT_LS10) || !(tstat & DC_TSTAT_LS100))
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
mii->mii_media_status |= IFM_ACTIVE;
Rework the support for the internal autonegotiation on the 21143 and workalike chips (Macronix 98713A/98715 and PNIC II). Timing is somewhat critical: you need to bring the link as soon as possible after NWAY is done, and the old one second polling interval was too long. Now we poll every 10th of a second until NWAY completes (at which point we return to the 1 second interval again to keep an eye on the link state). I tested all the other cards I had on hand to make sure I didn't bust any of them and they seem to work (including the MII-based 21143 card). This should fix some autoneg problems with DE500-BA cards and the built-in 10/100 ethernet on some alpha systems. (Now before anyone asks why I never noticed this before, the old code worked just find with the Intel swich I used for testing back in NY. Apparently not all switches are as picky about the timing.)
2000-05-31 05:40:53 +00:00
if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
/* Erg, still trying, I guess... */
Rework the support for the internal autonegotiation on the 21143 and workalike chips (Macronix 98713A/98715 and PNIC II). Timing is somewhat critical: you need to bring the link as soon as possible after NWAY is done, and the old one second polling interval was too long. Now we poll every 10th of a second until NWAY completes (at which point we return to the 1 second interval again to keep an eye on the link state). I tested all the other cards I had on hand to make sure I didn't bust any of them and they seem to work (including the MII-based 21143 card). This should fix some autoneg problems with DE500-BA cards and the built-in 10/100 ethernet on some alpha systems. (Now before anyone asks why I never noticed this before, the old code worked just find with the Intel swich I used for testing back in NY. Apparently not all switches are as picky about the timing.)
2000-05-31 05:40:53 +00:00
if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
(tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
goto skip;
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
mii->mii_media_active |= IFM_NONE;
return;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
}
Rework the support for the internal autonegotiation on the 21143 and workalike chips (Macronix 98713A/98715 and PNIC II). Timing is somewhat critical: you need to bring the link as soon as possible after NWAY is done, and the old one second polling interval was too long. Now we poll every 10th of a second until NWAY completes (at which point we return to the 1 second interval again to keep an eye on the link state). I tested all the other cards I had on hand to make sure I didn't bust any of them and they seem to work (including the MII-based 21143 card). This should fix some autoneg problems with DE500-BA cards and the built-in 10/100 ethernet on some alpha systems. (Now before anyone asks why I never noticed this before, the old code worked just find with the Intel swich I used for testing back in NY. Apparently not all switches are as picky about the timing.)
2000-05-31 05:40:53 +00:00
if (tstat & DC_TSTAT_LP_CAN_NWAY) {
anlpar = tstat >> 16;
IEEE 802.3 Annex 28B.3 explicitly specifies the following relative priorities of the technologies supported by 802.3 Selector Field value. 1000BASE-T full duplex 1000BASE-T 100BASE-T2 full duplex 100BASE-TX full duplex 100BASE-T2 100BASE-T4 100BASE-TX 10BASE-T full duplex 10BAST-T However PHY drivers didn't honor the order such that 100BASE-T4 had higher priority than 100BASE-TX full duplex. Fix that long standing bugs such that have PHY drivers choose the highest common denominator ability. Fix a bug in dcphy which inadvertently aceepts 100BASE-T4. PR: 92599
2007-11-16 10:25:36 +00:00
if (anlpar & ANLPAR_TX_FD &&
Rework the support for the internal autonegotiation on the 21143 and workalike chips (Macronix 98713A/98715 and PNIC II). Timing is somewhat critical: you need to bring the link as soon as possible after NWAY is done, and the old one second polling interval was too long. Now we poll every 10th of a second until NWAY completes (at which point we return to the 1 second interval again to keep an eye on the link state). I tested all the other cards I had on hand to make sure I didn't bust any of them and they seem to work (including the MII-based 21143 card). This should fix some autoneg problems with DE500-BA cards and the built-in 10/100 ethernet on some alpha systems. (Now before anyone asks why I never noticed this before, the old code worked just find with the Intel swich I used for testing back in NY. Apparently not all switches are as picky about the timing.)
2000-05-31 05:40:53 +00:00
sc->mii_capabilities & BMSR_100TXFDX)
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
mii->mii_media_active |= IFM_100_TX | IFM_FDX;
IEEE 802.3 Annex 28B.3 explicitly specifies the following relative priorities of the technologies supported by 802.3 Selector Field value. 1000BASE-T full duplex 1000BASE-T 100BASE-T2 full duplex 100BASE-TX full duplex 100BASE-T2 100BASE-T4 100BASE-TX 10BASE-T full duplex 10BAST-T However PHY drivers didn't honor the order such that 100BASE-T4 had higher priority than 100BASE-TX full duplex. Fix that long standing bugs such that have PHY drivers choose the highest common denominator ability. Fix a bug in dcphy which inadvertently aceepts 100BASE-T4. PR: 92599
2007-11-16 10:25:36 +00:00
else if (anlpar & ANLPAR_T4 &&
sc->mii_capabilities & BMSR_100T4)
Consistently always explicitly set IFM_HDX for half-duplex. Obtained from: OpenBSD (mostly)
2010-10-03 17:00:57 +00:00
mii->mii_media_active |= IFM_100_T4 | IFM_HDX;
Fix some problems reported by Mike Pritchard: - Add a flag DC_TX_INTR_ALWAYS which causes the transmit code to request a TX done interrupt for every packet. The PNIC seems to need this to insure that the sent TX buffers get reaped in a timely fashion. - Try to unreset the SIA as soon as possible after resetting the whole chip. - Change dcphy to support either 10/100 or 10Mbps only NICs. The built-in 21143 ethernet in Compaq Presario machines is 10Mbps only and it doesn't work right if we try to advertise 100Mbps modes during autoneg. When restricted to only 10mbps modes, it works fine. Note that for now, I detect this condition by checking the PCI subsystem ID on this NIC (which has a Compaq vendor/device ID). Yes, I know that's what the SROM is supposed to be for. I'm deliberately ignoring the SROM wherever possible. Sue me. The latter two fixes allow if_dc to work correctly with the built-in ethernet on certain Compaq Presario boxes. There are liable to be quite a few people using these as their home systems who might want to try FreeBSD; may as well be nice to them. Now if anybody out there has an Alpha miata with 10Mbps ethernet and can show me the output from pciconf -l on their system, I'd be grateful.
1999-12-13 21:45:13 +00:00
else if (anlpar & ANLPAR_TX &&
sc->mii_capabilities & BMSR_100TXHDX)
Consistently always explicitly set IFM_HDX for half-duplex. Obtained from: OpenBSD (mostly)
2010-10-03 17:00:57 +00:00
mii->mii_media_active |= IFM_100_TX | IFM_HDX;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
else if (anlpar & ANLPAR_10_FD)
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
mii->mii_media_active |= IFM_10_T | IFM_FDX;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
else if (anlpar & ANLPAR_10)
Consistently always explicitly set IFM_HDX for half-duplex. Obtained from: OpenBSD (mostly)
2010-10-03 17:00:57 +00:00
mii->mii_media_active |= IFM_10_T | IFM_HDX;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
else
mii->mii_media_active |= IFM_NONE;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
if (DC_IS_INTEL(dc_sc))
DC_CLRBIT(dc_sc, DC_10BTCTRL,
DC_TCTL_AUTONEGENBL);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
return;
}
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
/*
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
* If the other side doesn't support NWAY, then the
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
* best we can do is determine if we have a 10Mbps or
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
* 100Mbps link. There's no way to know if the link
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
* is full or half duplex, so we default to half duplex
* and hope that the user is clever enough to manually
* change the media settings if we're wrong.
*/
There's no need to read DC_10BTSTAT twice in dcphy_status().
2011-11-18 21:23:13 +00:00
if (!(tstat & DC_TSTAT_LS100))
Consistently always explicitly set IFM_HDX for half-duplex. Obtained from: OpenBSD (mostly)
2010-10-03 17:00:57 +00:00
mii->mii_media_active |= IFM_100_TX | IFM_HDX;
There's no need to read DC_10BTSTAT twice in dcphy_status().
2011-11-18 21:23:13 +00:00
else if (!(tstat & DC_TSTAT_LS10))
Consistently always explicitly set IFM_HDX for half-duplex. Obtained from: OpenBSD (mostly)
2010-10-03 17:00:57 +00:00
mii->mii_media_active |= IFM_10_T | IFM_HDX;
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
else
mii->mii_media_active |= IFM_NONE;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
if (DC_IS_INTEL(dc_sc))
DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
return;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
}
Rework the support for the internal autonegotiation on the 21143 and workalike chips (Macronix 98713A/98715 and PNIC II). Timing is somewhat critical: you need to bring the link as soon as possible after NWAY is done, and the old one second polling interval was too long. Now we poll every 10th of a second until NWAY completes (at which point we return to the 1 second interval again to keep an eye on the link state). I tested all the other cards I had on hand to make sure I didn't bust any of them and they seem to work (including the MII-based 21143 card). This should fix some autoneg problems with DE500-BA cards and the built-in 10/100 ethernet on some alpha systems. (Now before anyone asks why I never noticed this before, the old code worked just find with the Intel swich I used for testing back in NY. Apparently not all switches are as picky about the timing.)
2000-05-31 05:40:53 +00:00
skip:
Add support for parsing the media blocks from the SROM on 21143 adapters. This is necessary in order to make this driver work with the built-in ethernet on the alpha Miata machines. These systems have a 21143-PC chip on-board and optional daughtercards with either a 10/100 MII transceiver or a 10baseT/10base2 transceiver. In both cases, you need to twiddle the GPIO bits on the controller in order to turn the transceivers on, and you have to read the media info from the SROM in order to find out what bits to twiddle.
2000-10-05 17:36:14 +00:00
if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
mii->mii_media_active |= IFM_10_T;
Add support for parsing the media blocks from the SROM on 21143 adapters. This is necessary in order to make this driver work with the built-in ethernet on the alpha Miata machines. These systems have a 21143-PC chip on-board and optional daughtercards with either a 10/100 MII transceiver or a 10baseT/10base2 transceiver. In both cases, you need to twiddle the GPIO bits on the controller in order to turn the transceivers on, and you have to read the media info from the SROM in order to find out what bits to twiddle.
2000-10-05 17:36:14 +00:00
else
mii->mii_media_active |= IFM_100_TX;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
Do some more work on the mxphy pseudo-driver to make it better at media detection and remove the long delays that I had used previously. Everything should be handled by timeouts now.
1999-11-01 17:10:26 +00:00
mii->mii_media_active |= IFM_FDX;
Consistently always explicitly set IFM_HDX for half-duplex. Obtained from: OpenBSD (mostly)
2010-10-03 17:00:57 +00:00
else
mii->mii_media_active |= IFM_HDX;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
}
static int
Use ansi function definitions in preference to K&R to reduce diffs with NetBSD (and cause it looks cooler).
2005-09-30 19:39:27 +00:00
dcphy_auto(struct mii_softc *mii)
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
{
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
struct dc_softc *sc;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
sc = mii->mii_pdata->mii_ifp->if_softc;
Clean up mii/phy drivers: Remove the MIIF_DOINGAUTO which doesn't really do anything at the end of the day except bloat the drivers which has copy&pasted it.
2002-05-04 11:00:30 +00:00
DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
if (mii->mii_capabilities & BMSR_100TXHDX)
CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
else
CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
cosmetic changes and style fixes
2008-09-30 20:53:15 +00:00
return (EJUSTRETURN);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
}
static void
Use ansi function definitions in preference to K&R to reduce diffs with NetBSD (and cause it looks cooler).
2005-09-30 19:39:27 +00:00
dcphy_reset(struct mii_softc *mii)
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
{
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
struct dc_softc *sc;
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
sc = mii->mii_pdata->mii_ifp->if_softc;
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
DELAY(1000);
Add the if_dc driver and remove all of the al, ax, dm, pn and mx drivers which it replaces. The new driver supports all of the chips supported by the ones it replaces, as well as many DEC/Intel 21143 10/100 cards. This also completes my quest to convert things to miibus and add Alpha support.
1999-12-04 17:41:31 +00:00
DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
Convert the mx driver to miibus. In order to make this work, I created a pseudo-PHY driver to deal with Macronix chips that use the built-in NWAY support and symbol mode port. This is actually all of them, with the exception of the original MX98713 which presents its NWAY support via the MII serial interface. The mxphy driver actually manipulates the controller registers directly rather than using the miibus_readreg()/miibus_writereg() bus interface since there are no MII registers to read. The mx driver itself pretends that the NWAY interface is a PHY locayed at MII address 31 for the sole purpose of allowing the mxphy_probe() routine to know when it needs to attach to a host controller.
1999-10-16 05:24:13 +00:00
}
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