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freebsd-skq/sys/sparc64/include/ver.h

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Move %ver definitions from pstate.h to ver.h. Add definitions for normal kernel pstate values, which include a memory store order override.
2001-09-03 22:36:11 +00:00
/*-
* Copyright (c) 2001 Jake Burkholder.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _MACHINE_VER_H_
#define _MACHINE_VER_H_
#define VER_MANUF_SHIFT (48)
#define VER_IMPL_SHIFT (32)
#define VER_MASK_SHIFT (24)
#define VER_MAXTL_SHIFT (8)
#define VER_MAXWIN_SHIFT (0)
#define VER_MANUF_SIZE (16)
#define VER_IMPL_SIZE (16)
#define VER_MASK_SIZE (8)
#define VER_MAXTL_SIZE (8)
#define VER_MAXWIN_SIZE (5)
- USIII-based machines can consist of CPUs running at different frequencies (and having different cache sizes) so use the STICK (System TICK) timer, which was introduced due to this and is driven by the same frequency across all CPUs, instead of the TICK timer, whose frequency varies with the CPU clock, to drive hardclock. We try to use the STICK counter with all CPUs that are USIII or beyond, even when not necessary due to identical CPUs, as we can can also avoid the workaround for the BlackBird erratum #1 there. Unfortunately, using the STICK counter currently causes a hang with USIIIi MP machines for reasons unknown, so we still use the TICK timer there (which is okay as they can only consist of identical CPUs). - Given that we only (try to) synchronize the (S)TICK timers of APs with the BSP during startup, we could end up spinning forever in DELAY(9) if that function is migrated to another CPU while we're spinning due to clock drift afterwards, so pin to the CPU in order to avoid migration. Unfortunately, pinning doesn't work at the point DELAY(9) is required by the low-level console drivers, yet, so switch to a function pointer, which is updated accordingly, for implementing DELAY(9). For USIII and beyond, this would also allow to easily use the STICK counter instead of the TICK one here, there's no benefit in doing so however. While at it, use cpu_spinwait(9) for spinning in the delay- functions. This currently is a NOP though. - Don't set the TICK timer of the BSP to 0 during at startup as there's no need to do so. - Implement cpu_est_clockrate(). - Unfortunately, USIIIi-based machines don't provide a timecounter device besides the STICK and TICK counters (well, in theory the Tomatillo bridges have a performance counter that can be (ab)used as timecounter by configuring it to count bus cycles, though unlike the performance counter of Schizo bridges, the Tomatillo one is broken and counts Sun knows what in this mode). This means that we've to use a (S)TICK counter for timecounting, which has the old problem of not being in sync across CPUs, so provide an additional timecounter function which binds itself to the BSP but has an adequate low priority.
2008-09-03 17:39:19 +00:00
#ifndef LOCORE
Some machines can not only consist of CPUs running at different speeds but also of different types, f.e. Sun Fire V890 can be equipped with a mix of UltraSPARC IV and IV+ CPUs, requiring different MMU initialization and different workarounds for model specific errata. Therefore move the CPU implementation number from a global variable to the per-CPU data. Functions which are called before the latter is available are passed the implementation number as a parameter now.
2010-02-20 23:24:19 +00:00
#define VER_MANUF_MASK \
(((1UL << VER_MANUF_SIZE) - 1) << VER_MANUF_SHIFT)
#define VER_IMPL_MASK \
(((1UL << VER_IMPL_SIZE) - 1) << VER_IMPL_SHIFT)
#define VER_MASK_MASK \
(((1UL << VER_MASK_SIZE) - 1) << VER_MASK_SHIFT)
#define VER_MAXTL_MASK \
(((1UL << VER_MAXTL_SIZE) - 1) << VER_MAXTL_SHIFT)
#define VER_MAXWIN_MASK \
(((1UL << VER_MAXWIN_SIZE) - 1) << VER_MAXWIN_SHIFT)
Move %ver definitions from pstate.h to ver.h. Add definitions for normal kernel pstate values, which include a memory store order override.
2001-09-03 22:36:11 +00:00
Some machines can not only consist of CPUs running at different speeds but also of different types, f.e. Sun Fire V890 can be equipped with a mix of UltraSPARC IV and IV+ CPUs, requiring different MMU initialization and different workarounds for model specific errata. Therefore move the CPU implementation number from a global variable to the per-CPU data. Functions which are called before the latter is available are passed the implementation number as a parameter now.
2010-02-20 23:24:19 +00:00
#define VER_MANUF(ver) \
Move %ver definitions from pstate.h to ver.h. Add definitions for normal kernel pstate values, which include a memory store order override.
2001-09-03 22:36:11 +00:00
(((ver) & VER_MANUF_MASK) >> VER_MANUF_SHIFT)
Some machines can not only consist of CPUs running at different speeds but also of different types, f.e. Sun Fire V890 can be equipped with a mix of UltraSPARC IV and IV+ CPUs, requiring different MMU initialization and different workarounds for model specific errata. Therefore move the CPU implementation number from a global variable to the per-CPU data. Functions which are called before the latter is available are passed the implementation number as a parameter now.
2010-02-20 23:24:19 +00:00
#define VER_IMPL(ver) \
Move %ver definitions from pstate.h to ver.h. Add definitions for normal kernel pstate values, which include a memory store order override.
2001-09-03 22:36:11 +00:00
(((ver) & VER_IMPL_MASK) >> VER_IMPL_SHIFT)
Some machines can not only consist of CPUs running at different speeds but also of different types, f.e. Sun Fire V890 can be equipped with a mix of UltraSPARC IV and IV+ CPUs, requiring different MMU initialization and different workarounds for model specific errata. Therefore move the CPU implementation number from a global variable to the per-CPU data. Functions which are called before the latter is available are passed the implementation number as a parameter now.
2010-02-20 23:24:19 +00:00
#define VER_MASK(ver) \
Move %ver definitions from pstate.h to ver.h. Add definitions for normal kernel pstate values, which include a memory store order override.
2001-09-03 22:36:11 +00:00
(((ver) & VER_MASK_MASK) >> VER_MASK_SHIFT)
Some machines can not only consist of CPUs running at different speeds but also of different types, f.e. Sun Fire V890 can be equipped with a mix of UltraSPARC IV and IV+ CPUs, requiring different MMU initialization and different workarounds for model specific errata. Therefore move the CPU implementation number from a global variable to the per-CPU data. Functions which are called before the latter is available are passed the implementation number as a parameter now.
2010-02-20 23:24:19 +00:00
#define VER_MAXTL(ver) \
Move %ver definitions from pstate.h to ver.h. Add definitions for normal kernel pstate values, which include a memory store order override.
2001-09-03 22:36:11 +00:00
(((ver) & VER_MAXTL_MASK) >> VER_MAXTL_SHIFT)
Some machines can not only consist of CPUs running at different speeds but also of different types, f.e. Sun Fire V890 can be equipped with a mix of UltraSPARC IV and IV+ CPUs, requiring different MMU initialization and different workarounds for model specific errata. Therefore move the CPU implementation number from a global variable to the per-CPU data. Functions which are called before the latter is available are passed the implementation number as a parameter now.
2010-02-20 23:24:19 +00:00
#define VER_MAXWIN(ver) \
Move %ver definitions from pstate.h to ver.h. Add definitions for normal kernel pstate values, which include a memory store order override.
2001-09-03 22:36:11 +00:00
(((ver) & VER_MAXWIN_MASK) >> VER_MAXWIN_SHIFT)
Add two new workaround for firmware anomalies: 1. At least some Netra t1 models have PCI buses with no associated interrupt map, but obviously expect the PCI swizzle to be done with the interrupt number from the higher level as intpin. In this case, the mapping also needs to continue at parent bus nodes. To handle that, add a quirk table based on the "name" property of the root node to avoid breaking other boxen. This property is now retrieved and printed at boot. 2. On SPARCengine Ultra AX machines, interrupt numbers are not mapped at all, and full interrupt numbers (not just INOs) are given in the interrupt properties. This is more or less cosmetical; the PCI interrupt numbers would be wrong, but the psycho resource allocation method would pass the right numbers on anyway. Tested by: mux (1), Maxim Mazurok <maxim@km.ua> (2)
2002-11-07 16:07:46 +00:00
extern char sparc64_model[];
Define constants for the CPU implementation id; export the dectected id as cpu_impl.
2002-02-13 15:47:12 +00:00
- USIII-based machines can consist of CPUs running at different frequencies (and having different cache sizes) so use the STICK (System TICK) timer, which was introduced due to this and is driven by the same frequency across all CPUs, instead of the TICK timer, whose frequency varies with the CPU clock, to drive hardclock. We try to use the STICK counter with all CPUs that are USIII or beyond, even when not necessary due to identical CPUs, as we can can also avoid the workaround for the BlackBird erratum #1 there. Unfortunately, using the STICK counter currently causes a hang with USIIIi MP machines for reasons unknown, so we still use the TICK timer there (which is okay as they can only consist of identical CPUs). - Given that we only (try to) synchronize the (S)TICK timers of APs with the BSP during startup, we could end up spinning forever in DELAY(9) if that function is migrated to another CPU while we're spinning due to clock drift afterwards, so pin to the CPU in order to avoid migration. Unfortunately, pinning doesn't work at the point DELAY(9) is required by the low-level console drivers, yet, so switch to a function pointer, which is updated accordingly, for implementing DELAY(9). For USIII and beyond, this would also allow to easily use the STICK counter instead of the TICK one here, there's no benefit in doing so however. While at it, use cpu_spinwait(9) for spinning in the delay- functions. This currently is a NOP though. - Don't set the TICK timer of the BSP to 0 during at startup as there's no need to do so. - Implement cpu_est_clockrate(). - Unfortunately, USIIIi-based machines don't provide a timecounter device besides the STICK and TICK counters (well, in theory the Tomatillo bridges have a performance counter that can be (ab)used as timecounter by configuring it to count bus cycles, though unlike the performance counter of Schizo bridges, the Tomatillo one is broken and counts Sun knows what in this mode). This means that we've to use a (S)TICK counter for timecounting, which has the old problem of not being in sync across CPUs, so provide an additional timecounter function which binds itself to the BSP but has an adequate low priority.
2008-09-03 17:39:19 +00:00
#endif /* !LOCORE */
Add macros for the VER.impl of SPARC64 II to VIIIfx.
2010-03-17 21:00:39 +00:00
/* Known implementations */
- Also identify USIIIi+, USIV and USIV+ CPUs. - Use __FBSDID in identcpu.c. - Remove #ifndef SUN4V around global cpu_impl variable; it doesn't hurt on sun4v for now and once setPQL2() is gone sun4v can stop sharing identcpu.c with sparc64, making the reminder of this file also sparc64-only again. [1] Submitted by: kmacy [1]
2007-05-20 13:47:36 +00:00
#define CPU_IMPL_SPARC64 0x01
Add macros for the VER.impl of SPARC64 II to VIIIfx.
2010-03-17 21:00:39 +00:00
#define CPU_IMPL_SPARC64II 0x02
#define CPU_IMPL_SPARC64III 0x03
#define CPU_IMPL_SPARC64IV 0x04
#define CPU_IMPL_SPARC64V 0x05
#define CPU_IMPL_SPARC64VI 0x06
#define CPU_IMPL_SPARC64VII 0x07
#define CPU_IMPL_SPARC64VIIIfx 0x08
- Also identify USIIIi+, USIV and USIV+ CPUs. - Use __FBSDID in identcpu.c. - Remove #ifndef SUN4V around global cpu_impl variable; it doesn't hurt on sun4v for now and once setPQL2() is gone sun4v can stop sharing identcpu.c with sparc64, making the reminder of this file also sparc64-only again. [1] Submitted by: kmacy [1]
2007-05-20 13:47:36 +00:00
#define CPU_IMPL_ULTRASPARCI 0x10
#define CPU_IMPL_ULTRASPARCII 0x11
#define CPU_IMPL_ULTRASPARCIIi 0x12
#define CPU_IMPL_ULTRASPARCIIe 0x13
#define CPU_IMPL_ULTRASPARCIII 0x14
#define CPU_IMPL_ULTRASPARCIIIp 0x15
#define CPU_IMPL_ULTRASPARCIIIi 0x16
#define CPU_IMPL_ULTRASPARCIV 0x18
#define CPU_IMPL_ULTRASPARCIVp 0x19
#define CPU_IMPL_ULTRASPARCIIIip 0x22
Define constants for the CPU implementation id; export the dectected id as cpu_impl.
2002-02-13 15:47:12 +00:00
Move %ver definitions from pstate.h to ver.h. Add definitions for normal kernel pstate values, which include a memory store order override.
2001-09-03 22:36:11 +00:00
#endif /* !_MACHINE_VER_H_ */
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