2012-04-13 23:07:32 +00:00
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/*-
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* Copyright (c) 2012 Marius Strobl <marius@FreeBSD.org>
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2015-04-25 21:43:29 +00:00
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* Copyright (c) 2015 Juraj Lutter
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2012-04-13 23:07:32 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for NXP PCF8563 real-time clock/calendar
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*/
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2015-04-25 21:43:29 +00:00
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#include "opt_platform.h"
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2012-04-13 23:07:32 +00:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/clock.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <dev/iicbus/iicbus.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/pcf8563reg.h>
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2015-04-25 21:43:29 +00:00
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#ifdef FDT
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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2012-04-13 23:07:32 +00:00
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#include "clock_if.h"
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#include "iicbus_if.h"
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#define PCF8563_NCLOCKREGS (PCF8563_R_YEAR - PCF8563_R_CS1 + 1)
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struct pcf8563_softc {
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2015-04-25 21:43:29 +00:00
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struct intr_config_hook enum_hook;
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2012-04-13 23:07:32 +00:00
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uint32_t sc_flags;
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#define PCF8563_CPOL (1 << 0) /* PCF8563_R_MONTH_C means 19xx */
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uint16_t sc_addr; /* PCF8563 slave address */
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uint16_t sc_year0; /* TOD clock year 0 */
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};
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static device_attach_t pcf8563_attach;
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static device_probe_t pcf8563_probe;
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static clock_gettime_t pcf8563_gettime;
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static clock_settime_t pcf8563_settime;
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2015-04-25 21:43:29 +00:00
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static void pcf8563_start(void *);
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2012-04-13 23:07:32 +00:00
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static int
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pcf8563_probe(device_t dev)
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{
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2015-04-25 21:43:29 +00:00
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#ifdef FDT
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "nxp,pcf8563") &&
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!ofw_bus_is_compatible(dev, "philips,pcf8563") &&
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!ofw_bus_is_compatible(dev, "pcf8563"))
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return (ENXIO);
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#endif
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2012-04-13 23:07:32 +00:00
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device_set_desc(dev, "NXP PCF8563 RTC");
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2015-04-25 21:43:29 +00:00
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return (BUS_PROBE_DEFAULT);
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2012-04-13 23:07:32 +00:00
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}
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static int
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pcf8563_attach(device_t dev)
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{
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2015-04-25 21:43:29 +00:00
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struct pcf8563_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_addr = iicbus_get_addr(dev);
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if (sc->sc_addr == 0)
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sc->sc_addr = PCF8563_ADDR;
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sc->sc_year0 = 1900;
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sc->enum_hook.ich_func = pcf8563_start;
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sc->enum_hook.ich_arg = dev;
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/*
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* We have to wait until interrupts are enabled. Sometimes I2C read
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* and write only works when the interrupts are available.
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*/
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if (config_intrhook_establish(&sc->enum_hook) != 0)
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return (ENOMEM);
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return (0);
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}
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static void
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pcf8563_start(void *xdev)
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{
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device_t dev;
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2012-04-13 23:07:32 +00:00
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uint8_t reg = PCF8563_R_SECOND, val;
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struct iic_msg msgs[] = {
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{ 0, IIC_M_WR, sizeof(reg), ® },
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{ 0, IIC_M_RD, sizeof(val), &val }
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};
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struct pcf8563_softc *sc;
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2015-04-25 21:43:29 +00:00
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dev = (device_t)xdev;
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2012-04-13 23:07:32 +00:00
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sc = device_get_softc(dev);
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2015-04-25 21:43:29 +00:00
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config_intrhook_disestablish(&sc->enum_hook);
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2012-04-13 23:07:32 +00:00
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2012-10-18 10:29:16 +00:00
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/*
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* NB: PCF8563_R_SECOND_VL doesn't automatically clear when VDD
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* rises above Vlow again and needs to be cleared manually.
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* However, apparently this needs all of the time registers to be
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* set, i.e. pcf8563_settime(), and not just PCF8563_R_SECOND in
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* order for PCF8563_R_SECOND_VL to stick. Thus, we just issue a
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* warning here rather than failing with ENXIO in case it is set.
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* Note that pcf8563_settime() will also clear PCF8563_R_SECOND_VL
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* as a side-effect.
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*/
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2012-04-13 23:07:32 +00:00
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msgs[0].slave = msgs[1].slave = sc->sc_addr;
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2015-04-25 21:43:29 +00:00
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if (iicbus_transfer(dev, msgs, nitems(msgs)) != 0) {
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2012-04-13 23:07:32 +00:00
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device_printf(dev, "%s: cannot read RTC\n", __func__);
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2015-04-25 21:43:29 +00:00
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return;
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2012-04-13 23:07:32 +00:00
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}
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2012-10-18 10:29:16 +00:00
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if ((val & PCF8563_R_SECOND_VL) != 0)
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2012-04-13 23:07:32 +00:00
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device_printf(dev, "%s: battery low\n", __func__);
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clock_register(dev, 1000000); /* 1 second resolution */
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}
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static int
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pcf8563_gettime(device_t dev, struct timespec *ts)
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{
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struct clocktime ct;
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uint8_t reg = PCF8563_R_SECOND, val[PCF8563_NCLOCKREGS];
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struct iic_msg msgs[] = {
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{ 0, IIC_M_WR, sizeof(reg), ® },
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{ 0, IIC_M_RD, PCF8563_NCLOCKREGS, &val[PCF8563_R_SECOND] }
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};
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struct pcf8563_softc *sc;
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int error;
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sc = device_get_softc(dev);
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msgs[0].slave = msgs[1].slave = sc->sc_addr;
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2015-04-25 21:43:29 +00:00
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error = iicbus_transfer(dev, msgs, nitems(msgs));
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2012-04-13 23:07:32 +00:00
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if (error != 0) {
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device_printf(dev, "%s: cannot read RTC\n", __func__);
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return (error);
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}
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ct.nsec = 0;
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ct.sec = FROMBCD(val[PCF8563_R_SECOND] & PCF8563_M_SECOND);
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ct.min = FROMBCD(val[PCF8563_R_MINUTE] & PCF8563_M_MINUTE);
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ct.hour = FROMBCD(val[PCF8563_R_HOUR] & PCF8563_M_HOUR);
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ct.day = FROMBCD(val[PCF8563_R_DAY] & PCF8563_M_DAY);
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ct.dow = val[PCF8563_R_WEEKDAY] & PCF8563_M_WEEKDAY;
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ct.mon = FROMBCD(val[PCF8563_R_MONTH] & PCF8563_M_MONTH);
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ct.year = FROMBCD(val[PCF8563_R_YEAR] & PCF8563_M_YEAR);
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ct.year += sc->sc_year0;
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if (ct.year < POSIX_BASE_YEAR)
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ct.year += 100; /* assume [1970, 2069] */
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if ((val[PCF8563_R_MONTH] & PCF8563_R_MONTH_C) != 0) {
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if (ct.year >= 100 + sc->sc_year0)
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sc->sc_flags |= PCF8563_CPOL;
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} else if (ct.year < 100 + sc->sc_year0)
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sc->sc_flags |= PCF8563_CPOL;
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2015-04-25 21:43:29 +00:00
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2012-04-13 23:07:32 +00:00
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return (clock_ct_to_ts(&ct, ts));
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}
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static int
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pcf8563_settime(device_t dev, struct timespec *ts)
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{
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struct clocktime ct;
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uint8_t val[PCF8563_NCLOCKREGS];
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struct iic_msg msgs[] = {
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{ 0, IIC_M_WR, PCF8563_NCLOCKREGS - 1, &val[PCF8563_R_CS2] }
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};
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struct pcf8563_softc *sc;
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int error;
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sc = device_get_softc(dev);
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val[PCF8563_R_CS2] = PCF8563_R_SECOND; /* abuse */
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/* Accuracy is only one second. */
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if (ts->tv_nsec >= 500000000)
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ts->tv_sec++;
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ts->tv_nsec = 0;
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clock_ts_to_ct(ts, &ct);
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val[PCF8563_R_SECOND] = TOBCD(ct.sec);
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val[PCF8563_R_MINUTE] = TOBCD(ct.min);
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val[PCF8563_R_HOUR] = TOBCD(ct.hour);
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val[PCF8563_R_DAY] = TOBCD(ct.day);
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val[PCF8563_R_WEEKDAY] = ct.dow;
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val[PCF8563_R_MONTH] = TOBCD(ct.mon);
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val[PCF8563_R_YEAR] = TOBCD(ct.year % 100);
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if ((sc->sc_flags & PCF8563_CPOL) != 0) {
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if (ct.year >= 100 + sc->sc_year0)
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val[PCF8563_R_MONTH] |= PCF8563_R_MONTH_C;
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} else if (ct.year < 100 + sc->sc_year0)
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val[PCF8563_R_MONTH] |= PCF8563_R_MONTH_C;
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msgs[0].slave = sc->sc_addr;
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2015-04-25 21:43:29 +00:00
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error = iicbus_transfer(dev, msgs, nitems(msgs));
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2012-04-13 23:07:32 +00:00
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if (error != 0)
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device_printf(dev, "%s: cannot write RTC\n", __func__);
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2015-04-25 21:43:29 +00:00
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2012-04-13 23:07:32 +00:00
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return (error);
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}
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static device_method_t pcf8563_methods[] = {
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DEVMETHOD(device_probe, pcf8563_probe),
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DEVMETHOD(device_attach, pcf8563_attach),
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DEVMETHOD(clock_gettime, pcf8563_gettime),
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DEVMETHOD(clock_settime, pcf8563_settime),
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DEVMETHOD_END
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};
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static driver_t pcf8563_driver = {
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"pcf8563_rtc",
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pcf8563_methods,
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sizeof(struct pcf8563_softc),
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};
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static devclass_t pcf8563_devclass;
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DRIVER_MODULE(pcf8563, iicbus, pcf8563_driver, pcf8563_devclass, NULL, NULL);
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MODULE_VERSION(pcf8563, 1);
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MODULE_DEPEND(pcf8563, iicbus, 1, 1, 1);
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