559 lines
17 KiB
C
559 lines
17 KiB
C
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/* Dummy data flow analysis for GNU compiler in nonoptimizing mode.
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Copyright (C) 1987, 1991, 1994, 1995 Free Software Foundation, Inc.
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This file is part of GNU CC.
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/* This file performs stupid register allocation, which is used
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when cc1 gets the -noreg switch (which is when cc does not get -O).
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Stupid register allocation goes in place of the the flow_analysis,
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local_alloc and global_alloc passes. combine_instructions cannot
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be done with stupid allocation because the data flow info that it needs
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is not computed here.
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In stupid allocation, the only user-defined variables that can
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go in registers are those declared "register". They are assumed
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to have a life span equal to their scope. Other user variables
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are given stack slots in the rtl-generation pass and are not
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represented as pseudo regs. A compiler-generated temporary
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is assumed to live from its first mention to its last mention.
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Since each pseudo-reg's life span is just an interval, it can be
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represented as a pair of numbers, each of which identifies an insn by
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its position in the function (number of insns before it). The first
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thing done for stupid allocation is to compute such a number for each
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insn. It is called the suid. Then the life-interval of each
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pseudo reg is computed. Then the pseudo regs are ordered by priority
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and assigned hard regs in priority order. */
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#include <stdio.h>
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#include "config.h"
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#include "rtl.h"
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#include "hard-reg-set.h"
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#include "regs.h"
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#include "flags.h"
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/* Vector mapping INSN_UIDs to suids.
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The suids are like uids but increase monotonically always.
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We use them to see whether a subroutine call came
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between a variable's birth and its death. */
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static int *uid_suid;
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/* Get the suid of an insn. */
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#define INSN_SUID(INSN) (uid_suid[INSN_UID (INSN)])
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/* Record the suid of the last CALL_INSN
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so we can tell whether a pseudo reg crosses any calls. */
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static int last_call_suid;
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/* Element N is suid of insn where life span of pseudo reg N ends.
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Element is 0 if register N has not been seen yet on backward scan. */
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static int *reg_where_dead;
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/* Element N is suid of insn where life span of pseudo reg N begins. */
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static int *reg_where_born;
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/* Numbers of pseudo-regs to be allocated, highest priority first. */
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static int *reg_order;
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/* Indexed by reg number (hard or pseudo), nonzero if register is live
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at the current point in the instruction stream. */
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static char *regs_live;
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/* Indexed by reg number, nonzero if reg was used in a SUBREG that changes
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its size. */
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static char *regs_change_size;
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/* Indexed by insn's suid, the set of hard regs live after that insn. */
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static HARD_REG_SET *after_insn_hard_regs;
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/* Record that hard reg REGNO is live after insn INSN. */
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#define MARK_LIVE_AFTER(INSN,REGNO) \
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SET_HARD_REG_BIT (after_insn_hard_regs[INSN_SUID (INSN)], (REGNO))
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static int stupid_reg_compare PROTO((int *, int *));
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static int stupid_find_reg PROTO((int, enum reg_class, enum machine_mode,
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int, int, int));
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static void stupid_mark_refs PROTO((rtx, rtx));
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/* Stupid life analysis is for the case where only variables declared
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`register' go in registers. For this case, we mark all
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pseudo-registers that belong to register variables as
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dying in the last instruction of the function, and all other
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pseudo registers as dying in the last place they are referenced.
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Hard registers are marked as dying in the last reference before
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the end or before each store into them. */
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void
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stupid_life_analysis (f, nregs, file)
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rtx f;
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int nregs;
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FILE *file;
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{
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register int i;
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register rtx last, insn;
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int max_uid, max_suid;
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bzero (regs_ever_live, sizeof regs_ever_live);
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regs_live = (char *) alloca (nregs);
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/* First find the last real insn, and count the number of insns,
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and assign insns their suids. */
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for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
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if (INSN_UID (insn) > i)
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i = INSN_UID (insn);
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max_uid = i + 1;
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uid_suid = (int *) alloca ((i + 1) * sizeof (int));
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/* Compute the mapping from uids to suids.
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Suids are numbers assigned to insns, like uids,
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except that suids increase monotonically through the code. */
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last = 0; /* In case of empty function body */
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for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
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{
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if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
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last = insn;
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INSN_SUID (insn) = ++i;
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}
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last_call_suid = i + 1;
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max_suid = i + 1;
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max_regno = nregs;
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/* Allocate tables to record info about regs. */
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reg_where_dead = (int *) alloca (nregs * sizeof (int));
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bzero ((char *) reg_where_dead, nregs * sizeof (int));
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reg_where_born = (int *) alloca (nregs * sizeof (int));
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bzero ((char *) reg_where_born, nregs * sizeof (int));
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reg_order = (int *) alloca (nregs * sizeof (int));
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bzero ((char *) reg_order, nregs * sizeof (int));
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regs_change_size = (char *) alloca (nregs * sizeof (char));
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bzero ((char *) regs_change_size, nregs * sizeof (char));
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reg_renumber = (short *) oballoc (nregs * sizeof (short));
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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reg_renumber[i] = i;
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for (i = FIRST_VIRTUAL_REGISTER; i < max_regno; i++)
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reg_renumber[i] = -1;
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after_insn_hard_regs
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= (HARD_REG_SET *) alloca (max_suid * sizeof (HARD_REG_SET));
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bzero ((char *) after_insn_hard_regs, max_suid * sizeof (HARD_REG_SET));
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/* Allocate and zero out many data structures
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that will record the data from lifetime analysis. */
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allocate_for_life_analysis ();
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for (i = 0; i < max_regno; i++)
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reg_n_deaths[i] = 1;
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bzero (regs_live, nregs);
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/* Find where each pseudo register is born and dies,
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by scanning all insns from the end to the start
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and noting all mentions of the registers.
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Also find where each hard register is live
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and record that info in after_insn_hard_regs.
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regs_live[I] is 1 if hard reg I is live
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at the current point in the scan. */
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for (insn = last; insn; insn = PREV_INSN (insn))
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{
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register HARD_REG_SET *p = after_insn_hard_regs + INSN_SUID (insn);
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/* Copy the info in regs_live into the element of after_insn_hard_regs
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for the current position in the rtl code. */
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (regs_live[i])
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SET_HARD_REG_BIT (*p, i);
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/* Update which hard regs are currently live
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and also the birth and death suids of pseudo regs
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based on the pattern of this insn. */
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if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
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stupid_mark_refs (PATTERN (insn), insn);
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/* Mark all call-clobbered regs as live after each call insn
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so that a pseudo whose life span includes this insn
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will not go in one of them.
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Then mark those regs as all dead for the continuing scan
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of the insns before the call. */
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if (GET_CODE (insn) == CALL_INSN)
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{
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last_call_suid = INSN_SUID (insn);
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IOR_HARD_REG_SET (after_insn_hard_regs[last_call_suid],
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call_used_reg_set);
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (call_used_regs[i])
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regs_live[i] = 0;
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/* It is important that this be done after processing the insn's
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pattern because we want the function result register to still
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be live if it's also used to pass arguments. */
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stupid_mark_refs (CALL_INSN_FUNCTION_USAGE (insn), insn);
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}
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}
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/* Now decide the order in which to allocate the pseudo registers. */
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for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++)
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reg_order[i] = i;
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qsort (®_order[LAST_VIRTUAL_REGISTER + 1],
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max_regno - LAST_VIRTUAL_REGISTER - 1, sizeof (int),
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stupid_reg_compare);
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/* Now, in that order, try to find hard registers for those pseudo regs. */
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for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++)
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{
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register int r = reg_order[i];
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/* Some regnos disappear from the rtl. Ignore them to avoid crash. */
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if (regno_reg_rtx[r] == 0)
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continue;
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/* Now find the best hard-register class for this pseudo register */
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if (N_REG_CLASSES > 1)
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reg_renumber[r] = stupid_find_reg (reg_n_calls_crossed[r],
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reg_preferred_class (r),
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PSEUDO_REGNO_MODE (r),
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reg_where_born[r],
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reg_where_dead[r],
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regs_change_size[r]);
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/* If no reg available in that class, try alternate class. */
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if (reg_renumber[r] == -1 && reg_alternate_class (r) != NO_REGS)
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reg_renumber[r] = stupid_find_reg (reg_n_calls_crossed[r],
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reg_alternate_class (r),
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PSEUDO_REGNO_MODE (r),
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reg_where_born[r],
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reg_where_dead[r],
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regs_change_size[r]);
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}
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if (file)
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dump_flow_info (file);
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}
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/* Comparison function for qsort.
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Returns -1 (1) if register *R1P is higher priority than *R2P. */
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static int
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stupid_reg_compare (r1p, r2p)
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int *r1p, *r2p;
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{
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register int r1 = *r1p, r2 = *r2p;
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register int len1 = reg_where_dead[r1] - reg_where_born[r1];
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register int len2 = reg_where_dead[r2] - reg_where_born[r2];
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int tem;
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tem = len2 - len1;
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if (tem != 0)
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return tem;
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tem = reg_n_refs[r1] - reg_n_refs[r2];
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if (tem != 0)
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return tem;
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/* If regs are equally good, sort by regno,
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so that the results of qsort leave nothing to chance. */
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return r1 - r2;
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}
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/* Find a block of SIZE words of hard registers in reg_class CLASS
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that can hold a value of machine-mode MODE
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(but actually we test only the first of the block for holding MODE)
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currently free from after insn whose suid is BIRTH
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through the insn whose suid is DEATH,
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and return the number of the first of them.
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Return -1 if such a block cannot be found.
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If CALL_PRESERVED is nonzero, insist on registers preserved
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over subroutine calls, and return -1 if cannot find such.
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If CHANGES_SIZE is nonzero, it means this register was used as the
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operand of a SUBREG that changes its size. */
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static int
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stupid_find_reg (call_preserved, class, mode,
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born_insn, dead_insn, changes_size)
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int call_preserved;
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enum reg_class class;
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enum machine_mode mode;
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int born_insn, dead_insn;
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int changes_size;
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{
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register int i, ins;
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#ifdef HARD_REG_SET
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register /* Declare them register if they are scalars. */
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#endif
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HARD_REG_SET used, this_reg;
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#ifdef ELIMINABLE_REGS
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static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
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#endif
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COPY_HARD_REG_SET (used,
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call_preserved ? call_used_reg_set : fixed_reg_set);
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#ifdef ELIMINABLE_REGS
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for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
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SET_HARD_REG_BIT (used, eliminables[i].from);
|
|||
|
|
#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
|
|||
|
|
SET_HARD_REG_BIT (used, HARD_FRAME_POINTER_REGNUM);
|
|||
|
|
#endif
|
|||
|
|
#else
|
|||
|
|
SET_HARD_REG_BIT (used, FRAME_POINTER_REGNUM);
|
|||
|
|
#endif
|
|||
|
|
|
|||
|
|
for (ins = born_insn; ins < dead_insn; ins++)
|
|||
|
|
IOR_HARD_REG_SET (used, after_insn_hard_regs[ins]);
|
|||
|
|
|
|||
|
|
IOR_COMPL_HARD_REG_SET (used, reg_class_contents[(int) class]);
|
|||
|
|
|
|||
|
|
#ifdef CLASS_CANNOT_CHANGE_SIZE
|
|||
|
|
if (changes_size)
|
|||
|
|
IOR_HARD_REG_SET (used,
|
|||
|
|
reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE]);
|
|||
|
|
#endif
|
|||
|
|
|
|||
|
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|||
|
|
{
|
|||
|
|
#ifdef REG_ALLOC_ORDER
|
|||
|
|
int regno = reg_alloc_order[i];
|
|||
|
|
#else
|
|||
|
|
int regno = i;
|
|||
|
|
#endif
|
|||
|
|
|
|||
|
|
/* If a register has screwy overlap problems,
|
|||
|
|
don't use it at all if not optimizing.
|
|||
|
|
Actually this is only for the 387 stack register,
|
|||
|
|
and it's because subsequent code won't work. */
|
|||
|
|
#ifdef OVERLAPPING_REGNO_P
|
|||
|
|
if (OVERLAPPING_REGNO_P (regno))
|
|||
|
|
continue;
|
|||
|
|
#endif
|
|||
|
|
|
|||
|
|
if (! TEST_HARD_REG_BIT (used, regno)
|
|||
|
|
&& HARD_REGNO_MODE_OK (regno, mode))
|
|||
|
|
{
|
|||
|
|
register int j;
|
|||
|
|
register int size1 = HARD_REGNO_NREGS (regno, mode);
|
|||
|
|
for (j = 1; j < size1 && ! TEST_HARD_REG_BIT (used, regno + j); j++);
|
|||
|
|
if (j == size1)
|
|||
|
|
{
|
|||
|
|
CLEAR_HARD_REG_SET (this_reg);
|
|||
|
|
while (--j >= 0)
|
|||
|
|
SET_HARD_REG_BIT (this_reg, regno + j);
|
|||
|
|
for (ins = born_insn; ins < dead_insn; ins++)
|
|||
|
|
{
|
|||
|
|
IOR_HARD_REG_SET (after_insn_hard_regs[ins], this_reg);
|
|||
|
|
}
|
|||
|
|
return regno;
|
|||
|
|
}
|
|||
|
|
#ifndef REG_ALLOC_ORDER
|
|||
|
|
i += j; /* Skip starting points we know will lose */
|
|||
|
|
#endif
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
return -1;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/* Walk X, noting all assignments and references to registers
|
|||
|
|
and recording what they imply about life spans.
|
|||
|
|
INSN is the current insn, supplied so we can find its suid. */
|
|||
|
|
|
|||
|
|
static void
|
|||
|
|
stupid_mark_refs (x, insn)
|
|||
|
|
rtx x, insn;
|
|||
|
|
{
|
|||
|
|
register RTX_CODE code;
|
|||
|
|
register char *fmt;
|
|||
|
|
register int regno, i;
|
|||
|
|
|
|||
|
|
if (x == 0)
|
|||
|
|
return;
|
|||
|
|
|
|||
|
|
code = GET_CODE (x);
|
|||
|
|
|
|||
|
|
if (code == SET || code == CLOBBER)
|
|||
|
|
{
|
|||
|
|
if (SET_DEST (x) != 0
|
|||
|
|
&& (GET_CODE (SET_DEST (x)) == REG
|
|||
|
|
|| (GET_CODE (SET_DEST (x)) == SUBREG
|
|||
|
|
&& GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
|
|||
|
|
&& (REGNO (SUBREG_REG (SET_DEST (x)))
|
|||
|
|
>= FIRST_PSEUDO_REGISTER))))
|
|||
|
|
{
|
|||
|
|
/* Register is being assigned. */
|
|||
|
|
/* If setting a SUBREG, we treat the entire reg as being set. */
|
|||
|
|
if (GET_CODE (SET_DEST (x)) == SUBREG)
|
|||
|
|
regno = REGNO (SUBREG_REG (SET_DEST (x)));
|
|||
|
|
else
|
|||
|
|
regno = REGNO (SET_DEST (x));
|
|||
|
|
|
|||
|
|
/* For hard regs, update the where-live info. */
|
|||
|
|
if (regno < FIRST_PSEUDO_REGISTER)
|
|||
|
|
{
|
|||
|
|
register int j
|
|||
|
|
= HARD_REGNO_NREGS (regno, GET_MODE (SET_DEST (x)));
|
|||
|
|
|
|||
|
|
while (--j >= 0)
|
|||
|
|
{
|
|||
|
|
regs_ever_live[regno+j] = 1;
|
|||
|
|
regs_live[regno+j] = 0;
|
|||
|
|
|
|||
|
|
/* The following line is for unused outputs;
|
|||
|
|
they do get stored even though never used again. */
|
|||
|
|
MARK_LIVE_AFTER (insn, regno);
|
|||
|
|
|
|||
|
|
/* When a hard reg is clobbered, mark it in use
|
|||
|
|
just before this insn, so it is live all through. */
|
|||
|
|
if (code == CLOBBER && INSN_SUID (insn) > 0)
|
|||
|
|
SET_HARD_REG_BIT (after_insn_hard_regs[INSN_SUID (insn) - 1],
|
|||
|
|
regno);
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
/* For pseudo regs, record where born, where dead, number of
|
|||
|
|
times used, and whether live across a call. */
|
|||
|
|
else
|
|||
|
|
{
|
|||
|
|
/* Update the life-interval bounds of this pseudo reg. */
|
|||
|
|
|
|||
|
|
/* When a pseudo-reg is CLOBBERed, it is born just before
|
|||
|
|
the clobbering insn. When setting, just after. */
|
|||
|
|
int where_born = INSN_SUID (insn) - (code == CLOBBER);
|
|||
|
|
|
|||
|
|
reg_where_born[regno] = where_born;
|
|||
|
|
|
|||
|
|
/* The reg must live at least one insn even
|
|||
|
|
in it is never again used--because it has to go
|
|||
|
|
in SOME hard reg. Mark it as dying after the current
|
|||
|
|
insn so that it will conflict with any other outputs of
|
|||
|
|
this insn. */
|
|||
|
|
if (reg_where_dead[regno] < where_born + 2)
|
|||
|
|
{
|
|||
|
|
reg_where_dead[regno] = where_born + 2;
|
|||
|
|
regs_live[regno] = 1;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/* Count the refs of this reg. */
|
|||
|
|
reg_n_refs[regno]++;
|
|||
|
|
|
|||
|
|
if (last_call_suid < reg_where_dead[regno])
|
|||
|
|
reg_n_calls_crossed[regno] += 1;
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/* Record references from the value being set,
|
|||
|
|
or from addresses in the place being set if that's not a reg.
|
|||
|
|
If setting a SUBREG, we treat the entire reg as *used*. */
|
|||
|
|
if (code == SET)
|
|||
|
|
{
|
|||
|
|
stupid_mark_refs (SET_SRC (x), insn);
|
|||
|
|
if (GET_CODE (SET_DEST (x)) != REG)
|
|||
|
|
stupid_mark_refs (SET_DEST (x), insn);
|
|||
|
|
}
|
|||
|
|
return;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
else if (code == SUBREG
|
|||
|
|
&& GET_CODE (SUBREG_REG (x)) == REG
|
|||
|
|
&& REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER
|
|||
|
|
&& (GET_MODE_SIZE (GET_MODE (x))
|
|||
|
|
!= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
|
|||
|
|
&& (INTEGRAL_MODE_P (GET_MODE (x))
|
|||
|
|
|| INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (x)))))
|
|||
|
|
regs_change_size[REGNO (SUBREG_REG (x))] = 1;
|
|||
|
|
|
|||
|
|
/* Register value being used, not set. */
|
|||
|
|
|
|||
|
|
else if (code == REG)
|
|||
|
|
{
|
|||
|
|
regno = REGNO (x);
|
|||
|
|
if (regno < FIRST_PSEUDO_REGISTER)
|
|||
|
|
{
|
|||
|
|
/* Hard reg: mark it live for continuing scan of previous insns. */
|
|||
|
|
register int j = HARD_REGNO_NREGS (regno, GET_MODE (x));
|
|||
|
|
while (--j >= 0)
|
|||
|
|
{
|
|||
|
|
regs_ever_live[regno+j] = 1;
|
|||
|
|
regs_live[regno+j] = 1;
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
else
|
|||
|
|
{
|
|||
|
|
/* Pseudo reg: record first use, last use and number of uses. */
|
|||
|
|
|
|||
|
|
reg_where_born[regno] = INSN_SUID (insn);
|
|||
|
|
reg_n_refs[regno]++;
|
|||
|
|
if (regs_live[regno] == 0)
|
|||
|
|
{
|
|||
|
|
regs_live[regno] = 1;
|
|||
|
|
reg_where_dead[regno] = INSN_SUID (insn);
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
return;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/* Recursive scan of all other rtx's. */
|
|||
|
|
|
|||
|
|
fmt = GET_RTX_FORMAT (code);
|
|||
|
|
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
|||
|
|
{
|
|||
|
|
if (fmt[i] == 'e')
|
|||
|
|
stupid_mark_refs (XEXP (x, i), insn);
|
|||
|
|
if (fmt[i] == 'E')
|
|||
|
|
{
|
|||
|
|
register int j;
|
|||
|
|
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
|||
|
|
stupid_mark_refs (XVECEXP (x, i, j), insn);
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
}
|