2003-06-12 14:28:32 +00:00
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.\" Copyright (c) 2003
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.\" Fraunhofer Institute for Open Communication Systems (FhG Fokus).
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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2004-07-08 10:31:12 +00:00
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.\" Author: Hartmut Brandt <harti@FreeBSD.org>
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2003-06-12 14:28:32 +00:00
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.\"
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.\" $FreeBSD$
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2004-07-08 10:31:12 +00:00
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.\"
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2003-06-12 14:28:32 +00:00
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.Dd May 8, 2003
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.Dt UTOPIA 4
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2004-07-06 07:02:31 +00:00
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.Os
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2003-06-12 14:28:32 +00:00
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.Sh NAME
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.Nm utopia
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2004-07-08 10:31:12 +00:00
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.Nd "driver module for ATM PHY chips"
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2003-06-12 14:28:32 +00:00
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.Sh SYNOPSIS
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.Cd device utopia
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.Sh DESCRIPTION
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2003-07-14 12:13:30 +00:00
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This module is used by all ATM drivers for cards that use
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PMC-Sierra S/Uni and IDT77105/IDT77155
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chips to provide uniform functionality.
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The module implements status monitoring
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in either interrupt or polling mode, media option handling and application
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access to chip registers.
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.Pp
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2003-12-27 15:46:30 +00:00
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The driver implements several sysctls that are accessible under the
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.Va hw.atm. Ns Ao Ar iface Ac Ns Va .\&
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tree, where
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.Ar iface
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is the name of the ATM interface:
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.Bl -tag -width indent
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.It Va phy_regs
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When reading this sysctl an array of 8-bit unsigned integers is returned
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containing all accessible chip registers starting at register 0.
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A register can be written by writing three 8-bit unsigned integers to the
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sysctl: the register number, the new value and a bit mask.
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This changes all bits in the register for which the corresponding bit in the
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mask is one to the bit values from value.
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Note that not all registers may
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be writeable.
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.It Va phy_loopback
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allows to put the interface in one of several loopback modes.
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Not all modes and all combinations of modes are supported on all chips.
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The possible modes are:
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.Bl -tag -width indent
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.It Dv UTP_LOOP_NONE Pq No 0x00
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No loopback, normal operation.
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.It Dv UTP_LOOP_TIME Pq No 0x01
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Timing source loopback.
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When this is set the transmitter's clock is
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derived from the receiver's clock.
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.It Dv UTP_LOOP_DIAG Pq No 0x02
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Diagnostic loopback.
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In this mode the receiver's input is connected to the
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transmitter's output.
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The receiver gets back everything that is sent.
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The
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transmitter operates normally.
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.It Dv UTP_LOOP_LINE Pq No 0x04
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Serial line loopback.
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This connects the line receiver to the line transmitter.
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The chip transmits all cells back that it receives.
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The receiver operates
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normally.
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.It Dv UTP_LOOP_PARAL Pq No 0x08
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Parallel diagnostic loopback.
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This feeds back all transmitted cells into the
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receiver between the parallel/serial converters.
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The transmitter
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operates normally.
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.It Dv UTP_LOOP_TWIST Pq No 0x10
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Twisted pair diagnostic loopback.
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Connects the high speed receive data to the
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high speed transmit data.
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All received data is sent back.
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The receiver
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operates normally.
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.It Dv UTP_LOOP_PATH Pq No 0x20
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Diagnostic path loopback.
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This connects the receiver input to the transmitter
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output just between the path overhead processor and the byte mux.
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The
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transmitter operates normally.
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.El
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.It Va phy_type
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This is the detected type of the phy chip.
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Currently the following chips are
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supported:
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.Bl -tag -width indent
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.It Dv UTP_TYPE_UNKNOWN Pq No 0
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The module could not determine the type of the PHY chip.
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.It Dv UTP_TYPE_SUNI_LITE Pq No 1
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PMC-5346 (S/Uni-Lite)
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.It Dv UTP_TYPE_SUNI_ULTRA Pq No 2
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PMC-5350 (S/Uni-Ultra)
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.It Dv UTP_TYPE_SUNI_622 Pq No 3
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PMC-5355 (S/Uni-622)
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.It Dv UTP_TYPE_IDT77105 Pq No 4
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IDT77105 (25.6MBit UTP interface)
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.It Dv UTP_TYPE_IDT77155 Pq No 5
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IDT77155 (155MBit interface)
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.El
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.It Va phy_name
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This is a string describing the type of the PHY chip.
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.It Va phy_stats
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Physical and some ATM layer statistics.
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These are the statistics usually
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provided by the chip.
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The data is a returned in the following structure:
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.Bd -literal
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struct utopia_stats1 {
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uint32_t version; /* version of this struct */
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uint32_t fill;
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uint64_t rx_sbip; /* rx section BIP errors */
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uint64_t rx_lbip; /* rx line BIP errors */
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uint64_t rx_lfebe; /* rx line far end block errors */
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uint64_t rx_pbip; /* rx path BIP errors */
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uint64_t rx_pfebe; /* rx path far end block errors */
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uint64_t rx_cells; /* received cells */
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uint64_t rx_corr; /* correctable cell errors */
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uint64_t rx_uncorr; /* uncorrectable cell errors */
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uint64_t rx_symerr; /* symbol errors */
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uint64_t tx_cells; /* transmitted cells */
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};
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.Ed
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.Pp
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The current version is 1.
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The statistics are updated from the chip once
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a second.
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On overflow the counters wrap to zero.
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Note that not all counters
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are meaningful for all PHY chips.
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The statistics are cleared by writing an
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arbitrary new value (the value is ignored).
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.El
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.Pp
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The
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.Nm
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module also interfaces with the ifmedia system.
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The module reports the current state of the carrier and will issue a
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warning message when the carrier state changes.
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While the physical media itself cannot be changed, several media options can:
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.Bl -tag -width indent
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.It Cm SDH
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If the PHY is a Sonet/SDH chip this flag switches the interface into SDH mode.
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If this option is not set (the default) the interface is in Sonet mode.
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.It Cm noscramb
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If the PHY is a Sonet/SDH chip disable scrambling.
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This may be useful for debugging purposes.
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.It Cm unassigned
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Normally the interface emits idle cells when there are no other cells to
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transmit.
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This changes the default cell type to unassigned cells.
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This
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may be needed for interworking with public networks.
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.El
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.Sh SEE ALSO
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2003-10-26 19:42:55 +00:00
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.Xr en 4 ,
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.Xr fatm 4 ,
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.Xr hatm 4 ,
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.Xr patm 4 ,
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.Xr utopia 9
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2004-07-08 10:31:12 +00:00
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.Sh AUTHORS
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.An Harti Brandt Aq harti@FreeBSD.org
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