2012-08-15 06:31:32 +00:00
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/*-
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* Copyright (c) 2011
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* Ben Gray <ben.r.gray@gmail.com>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/**
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* Very simple GPIO (general purpose IO) driver module for TI OMAP SoC's.
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*
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* Currently this driver only does the basics, get a value on a pin & set a
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* value on a pin. Hopefully over time I'll expand this to be a bit more generic
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* and support interrupts and other various bits on the SoC can do ... in the
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* meantime this is all you get.
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*
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* Beware the OMA datasheet(s) lists GPIO banks 1-6, whereas I've used 0-5 here
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* in the code.
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*
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <arm/ti/ti_scm.h>
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#include <arm/ti/ti_prcm.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "gpio_if.h"
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MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
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/* Register definitions */
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#define TI_GPIO_REVISION 0x0000
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#define TI_GPIO_SYSCONFIG 0x0010
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2012-08-15 06:31:32 +00:00
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#if defined(SOC_OMAP3)
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MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
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#define TI_GPIO_SYSSTATUS 0x0014
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#define TI_GPIO_IRQSTATUS1 0x0018
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#define TI_GPIO_IRQENABLE1 0x001C
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#define TI_GPIO_WAKEUPENABLE 0x0020
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#define TI_GPIO_IRQSTATUS2 0x0028
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#define TI_GPIO_IRQENABLE2 0x002C
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#define TI_GPIO_CTRL 0x0030
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#define TI_GPIO_OE 0x0034
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#define TI_GPIO_DATAIN 0x0038
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#define TI_GPIO_DATAOUT 0x003C
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#define TI_GPIO_LEVELDETECT0 0x0040
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#define TI_GPIO_LEVELDETECT1 0x0044
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#define TI_GPIO_RISINGDETECT 0x0048
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#define TI_GPIO_FALLINGDETECT 0x004C
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#define TI_GPIO_DEBOUNCENABLE 0x0050
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#define TI_GPIO_DEBOUNCINGTIME 0x0054
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#define TI_GPIO_CLEARIRQENABLE1 0x0060
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#define TI_GPIO_SETIRQENABLE1 0x0064
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#define TI_GPIO_CLEARIRQENABLE2 0x0070
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#define TI_GPIO_SETIRQENABLE2 0x0074
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#define TI_GPIO_CLEARWKUENA 0x0080
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#define TI_GPIO_SETWKUENA 0x0084
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#define TI_GPIO_CLEARDATAOUT 0x0090
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#define TI_GPIO_SETDATAOUT 0x0094
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2012-08-15 06:31:32 +00:00
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#elif defined(SOC_OMAP4) || defined(SOC_TI_AM335X)
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MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
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#define TI_GPIO_IRQSTATUS_RAW_0 0x0024
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#define TI_GPIO_IRQSTATUS_RAW_1 0x0028
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#define TI_GPIO_IRQSTATUS_0 0x002C
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#define TI_GPIO_IRQSTATUS_1 0x0030
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#define TI_GPIO_IRQSTATUS_SET_0 0x0034
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#define TI_GPIO_IRQSTATUS_SET_1 0x0038
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#define TI_GPIO_IRQSTATUS_CLR_0 0x003C
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#define TI_GPIO_IRQSTATUS_CLR_1 0x0040
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#define TI_GPIO_IRQWAKEN_0 0x0044
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#define TI_GPIO_IRQWAKEN_1 0x0048
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#define TI_GPIO_SYSSTATUS 0x0114
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#define TI_GPIO_IRQSTATUS1 0x0118
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#define TI_GPIO_IRQENABLE1 0x011C
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#define TI_GPIO_WAKEUPENABLE 0x0120
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#define TI_GPIO_IRQSTATUS2 0x0128
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#define TI_GPIO_IRQENABLE2 0x012C
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#define TI_GPIO_CTRL 0x0130
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#define TI_GPIO_OE 0x0134
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#define TI_GPIO_DATAIN 0x0138
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#define TI_GPIO_DATAOUT 0x013C
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#define TI_GPIO_LEVELDETECT0 0x0140
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#define TI_GPIO_LEVELDETECT1 0x0144
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#define TI_GPIO_RISINGDETECT 0x0148
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#define TI_GPIO_FALLINGDETECT 0x014C
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#define TI_GPIO_DEBOUNCENABLE 0x0150
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#define TI_GPIO_DEBOUNCINGTIME 0x0154
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#define TI_GPIO_CLEARWKUPENA 0x0180
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#define TI_GPIO_SETWKUENA 0x0184
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#define TI_GPIO_CLEARDATAOUT 0x0190
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#define TI_GPIO_SETDATAOUT 0x0194
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2012-08-15 06:31:32 +00:00
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#else
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#error "Unknown SoC"
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#endif
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MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
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/* Other SoC Specific definitions */
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2012-08-15 06:31:32 +00:00
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#if defined(SOC_OMAP3)
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MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
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#define MAX_GPIO_BANKS 6
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#define FIRST_GPIO_BANK 1
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#define INTR_PER_BANK 1
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#define TI_GPIO_REV 0x00000025
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2012-08-15 06:31:32 +00:00
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#elif defined(SOC_OMAP4)
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MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
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#define MAX_GPIO_BANKS 6
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#define FIRST_GPIO_BANK 1
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#define INTR_PER_BANK 1
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#define TI_GPIO_REV 0x50600801
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2012-08-15 06:31:32 +00:00
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#elif defined(SOC_TI_AM335X)
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MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
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#define MAX_GPIO_BANKS 4
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#define FIRST_GPIO_BANK 0
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#define INTR_PER_BANK 2
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#define TI_GPIO_REV 0x50600801
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2012-08-15 06:31:32 +00:00
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#endif
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MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
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#define PINS_PER_BANK 32
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#define MAX_GPIO_INTRS MAX_GPIO_BANKS * INTR_PER_BANK
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2012-08-15 06:31:32 +00:00
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/**
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* ti_gpio_mem_spec - Resource specification used when allocating resources
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* ti_gpio_irq_spec - Resource specification used when allocating resources
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*
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* This driver module can have up to six independent memory regions, each
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* region typically controls 32 GPIO pins.
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MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
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*
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* On OMAP3 and OMAP4 there is only one physical interrupt line per bank,
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* but there are two set of registers which control the interrupt delivery
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|
|
* to internal subsystems. The first set of registers control the
|
|
|
|
* interrupts delivery to the MPU and the second set control the
|
|
|
|
* interrupts delivery to the DSP.
|
|
|
|
*
|
|
|
|
* On AM335x there are two physical interrupt lines for each GPIO module.
|
|
|
|
* Each interrupt line is controlled by a set of registers.
|
2012-08-15 06:31:32 +00:00
|
|
|
*/
|
|
|
|
static struct resource_spec ti_gpio_mem_spec[] = {
|
|
|
|
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
|
|
|
|
{ SYS_RES_MEMORY, 1, RF_ACTIVE | RF_OPTIONAL },
|
|
|
|
{ SYS_RES_MEMORY, 2, RF_ACTIVE | RF_OPTIONAL },
|
|
|
|
{ SYS_RES_MEMORY, 3, RF_ACTIVE | RF_OPTIONAL },
|
|
|
|
#if !defined(SOC_TI_AM335X)
|
|
|
|
{ SYS_RES_MEMORY, 4, RF_ACTIVE | RF_OPTIONAL },
|
|
|
|
{ SYS_RES_MEMORY, 5, RF_ACTIVE | RF_OPTIONAL },
|
|
|
|
#endif
|
|
|
|
{ -1, 0, 0 }
|
|
|
|
};
|
|
|
|
static struct resource_spec ti_gpio_irq_spec[] = {
|
|
|
|
{ SYS_RES_IRQ, 0, RF_ACTIVE },
|
|
|
|
{ SYS_RES_IRQ, 1, RF_ACTIVE | RF_OPTIONAL },
|
|
|
|
{ SYS_RES_IRQ, 2, RF_ACTIVE | RF_OPTIONAL },
|
|
|
|
{ SYS_RES_IRQ, 3, RF_ACTIVE | RF_OPTIONAL },
|
|
|
|
{ SYS_RES_IRQ, 4, RF_ACTIVE | RF_OPTIONAL },
|
|
|
|
{ SYS_RES_IRQ, 5, RF_ACTIVE | RF_OPTIONAL },
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
#if defined(SOC_TI_AM335X)
|
|
|
|
{ SYS_RES_IRQ, 6, RF_ACTIVE | RF_OPTIONAL },
|
|
|
|
{ SYS_RES_IRQ, 7, RF_ACTIVE | RF_OPTIONAL },
|
2012-08-15 06:31:32 +00:00
|
|
|
#endif
|
|
|
|
{ -1, 0, 0 }
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Structure that stores the driver context.
|
|
|
|
*
|
|
|
|
* This structure is allocated during driver attach.
|
|
|
|
*/
|
|
|
|
struct ti_gpio_softc {
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
device_t sc_dev;
|
2012-08-15 06:31:32 +00:00
|
|
|
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
/*
|
|
|
|
* The memory resource(s) for the PRCM register set, when the device is
|
|
|
|
* created the caller can assign up to 6 memory regions depending on
|
|
|
|
* the SoC type.
|
2012-08-15 06:31:32 +00:00
|
|
|
*/
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
struct resource *sc_mem_res[MAX_GPIO_BANKS];
|
|
|
|
struct resource *sc_irq_res[MAX_GPIO_INTRS];
|
2012-08-15 06:31:32 +00:00
|
|
|
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
/* The handle for the register IRQ handlers. */
|
|
|
|
void *sc_irq_hdl[MAX_GPIO_INTRS];
|
2012-08-15 06:31:32 +00:00
|
|
|
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
/*
|
|
|
|
* The following describes the H/W revision of each of the GPIO banks.
|
|
|
|
*/
|
|
|
|
uint32_t sc_revision[MAX_GPIO_BANKS];
|
2012-08-15 06:31:32 +00:00
|
|
|
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
struct mtx sc_mtx;
|
2012-08-15 06:31:32 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Macros for driver mutex locking
|
|
|
|
*/
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
#define TI_GPIO_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
|
|
|
|
#define TI_GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
|
|
|
|
#define TI_GPIO_LOCK_INIT(_sc) \
|
2012-08-15 06:31:32 +00:00
|
|
|
mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
"ti_gpio", MTX_DEF)
|
|
|
|
#define TI_GPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx)
|
|
|
|
#define TI_GPIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED)
|
|
|
|
#define TI_GPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED)
|
2012-08-15 06:31:32 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_read_4 - reads a 16-bit value from one of the PADCONFS registers
|
|
|
|
* @sc: GPIO device context
|
|
|
|
* @bank: The bank to read from
|
|
|
|
* @off: The offset of a register from the GPIO register address range
|
|
|
|
*
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* 32-bit value read from the register.
|
|
|
|
*/
|
|
|
|
static inline uint32_t
|
|
|
|
ti_gpio_read_4(struct ti_gpio_softc *sc, unsigned int bank, bus_size_t off)
|
|
|
|
{
|
|
|
|
return (bus_read_4(sc->sc_mem_res[bank], off));
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_write_4 - writes a 32-bit value to one of the PADCONFS registers
|
|
|
|
* @sc: GPIO device context
|
|
|
|
* @bank: The bank to write to
|
|
|
|
* @off: The offset of a register from the GPIO register address range
|
|
|
|
* @val: The value to write into the register
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* nothing
|
|
|
|
*/
|
|
|
|
static inline void
|
|
|
|
ti_gpio_write_4(struct ti_gpio_softc *sc, unsigned int bank, bus_size_t off,
|
|
|
|
uint32_t val)
|
|
|
|
{
|
|
|
|
bus_write_4(sc->sc_mem_res[bank], off, val);
|
|
|
|
}
|
|
|
|
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
static inline void
|
|
|
|
ti_gpio_intr_clr(struct ti_gpio_softc *sc, unsigned int bank, uint32_t mask)
|
|
|
|
{
|
|
|
|
|
|
|
|
/* We clear both set of registers. */
|
|
|
|
#if defined(SOC_OMAP4) || defined(SOC_TI_AM335X)
|
|
|
|
ti_gpio_write_4(sc, bank, TI_GPIO_IRQSTATUS_CLR_0, mask);
|
|
|
|
ti_gpio_write_4(sc, bank, TI_GPIO_IRQSTATUS_CLR_1, mask);
|
|
|
|
#else
|
|
|
|
ti_gpio_write_4(sc, bank, TI_GPIO_CLEARIRQENABLE1, mask);
|
|
|
|
ti_gpio_write_4(sc, bank, TI_GPIO_CLEARIRQENABLE2, mask);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2012-08-15 06:31:32 +00:00
|
|
|
/**
|
|
|
|
* ti_gpio_pin_max - Returns the maximum number of GPIO pins
|
|
|
|
* @dev: gpio device handle
|
|
|
|
* @maxpin: pointer to a value that upon return will contain the maximum number
|
|
|
|
* of pins in the device.
|
|
|
|
*
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* Internally locks the context
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Returns 0 on success otherwise an error code
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_pin_max(device_t dev, int *maxpin)
|
|
|
|
{
|
|
|
|
struct ti_gpio_softc *sc = device_get_softc(dev);
|
|
|
|
unsigned int i;
|
|
|
|
unsigned int banks = 0;
|
|
|
|
|
|
|
|
TI_GPIO_LOCK(sc);
|
|
|
|
|
|
|
|
/* Calculate how many valid banks we have and then multiply that by 32 to
|
|
|
|
* give use the total number of pins.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < MAX_GPIO_BANKS; i++) {
|
|
|
|
if (sc->sc_mem_res[i] != NULL)
|
|
|
|
banks++;
|
|
|
|
}
|
|
|
|
|
2013-02-25 08:04:47 +00:00
|
|
|
*maxpin = (banks * PINS_PER_BANK) - 1;
|
2012-08-15 06:31:32 +00:00
|
|
|
|
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_pin_getcaps - Gets the capabilties of a given pin
|
|
|
|
* @dev: gpio device handle
|
|
|
|
* @pin: the number of the pin
|
|
|
|
* @caps: pointer to a value that upon return will contain the capabilities
|
|
|
|
*
|
|
|
|
* Currently all pins have the same capability, notably:
|
|
|
|
* - GPIO_PIN_INPUT
|
|
|
|
* - GPIO_PIN_OUTPUT
|
|
|
|
* - GPIO_PIN_PULLUP
|
|
|
|
* - GPIO_PIN_PULLDOWN
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* Internally locks the context
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Returns 0 on success otherwise an error code
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
|
|
|
|
{
|
|
|
|
struct ti_gpio_softc *sc = device_get_softc(dev);
|
|
|
|
uint32_t bank = (pin / PINS_PER_BANK);
|
|
|
|
|
|
|
|
TI_GPIO_LOCK(sc);
|
|
|
|
|
|
|
|
/* Sanity check the pin number is valid */
|
2013-02-25 09:33:48 +00:00
|
|
|
if ((bank >= MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) {
|
2012-08-15 06:31:32 +00:00
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
*caps = (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |GPIO_PIN_PULLUP |
|
|
|
|
GPIO_PIN_PULLDOWN);
|
|
|
|
|
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_pin_getflags - Gets the current flags of a given pin
|
|
|
|
* @dev: gpio device handle
|
|
|
|
* @pin: the number of the pin
|
|
|
|
* @flags: upon return will contain the current flags of the pin
|
|
|
|
*
|
|
|
|
* Reads the current flags of a given pin, here we actually read the H/W
|
|
|
|
* registers to determine the flags, rather than storing the value in the
|
|
|
|
* setflags call.
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* Internally locks the context
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Returns 0 on success otherwise an error code
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
|
|
|
|
{
|
|
|
|
struct ti_gpio_softc *sc = device_get_softc(dev);
|
|
|
|
uint32_t bank = (pin / PINS_PER_BANK);
|
|
|
|
|
|
|
|
TI_GPIO_LOCK(sc);
|
|
|
|
|
|
|
|
/* Sanity check the pin number is valid */
|
2013-02-25 09:33:48 +00:00
|
|
|
if ((bank >= MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) {
|
2012-08-15 06:31:32 +00:00
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the current pin state */
|
|
|
|
ti_scm_padconf_get_gpioflags(pin, flags);
|
|
|
|
|
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_pin_getname - Gets the name of a given pin
|
|
|
|
* @dev: gpio device handle
|
|
|
|
* @pin: the number of the pin
|
|
|
|
* @name: buffer to put the name in
|
|
|
|
*
|
|
|
|
* The driver simply calls the pins gpio_n, where 'n' is obviously the number
|
|
|
|
* of the pin.
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* Internally locks the context
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Returns 0 on success otherwise an error code
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
|
|
|
|
{
|
|
|
|
struct ti_gpio_softc *sc = device_get_softc(dev);
|
|
|
|
uint32_t bank = (pin / PINS_PER_BANK);
|
|
|
|
|
|
|
|
TI_GPIO_LOCK(sc);
|
|
|
|
|
|
|
|
/* Sanity check the pin number is valid */
|
2013-02-25 09:33:48 +00:00
|
|
|
if ((bank >= MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) {
|
2012-08-15 06:31:32 +00:00
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a very simple name */
|
|
|
|
snprintf(name, GPIOMAXNAME, "gpio_%u", pin);
|
|
|
|
name[GPIOMAXNAME - 1] = '\0';
|
|
|
|
|
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_pin_setflags - Sets the flags for a given pin
|
|
|
|
* @dev: gpio device handle
|
|
|
|
* @pin: the number of the pin
|
|
|
|
* @flags: the flags to set
|
|
|
|
*
|
|
|
|
* The flags of the pin correspond to things like input/output mode, pull-ups,
|
|
|
|
* pull-downs, etc. This driver doesn't support all flags, only the following:
|
|
|
|
* - GPIO_PIN_INPUT
|
|
|
|
* - GPIO_PIN_OUTPUT
|
|
|
|
* - GPIO_PIN_PULLUP
|
|
|
|
* - GPIO_PIN_PULLDOWN
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* Internally locks the context
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Returns 0 on success otherwise an error code
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
|
|
|
|
{
|
|
|
|
struct ti_gpio_softc *sc = device_get_softc(dev);
|
|
|
|
uint32_t bank = (pin / PINS_PER_BANK);
|
|
|
|
uint32_t mask = (1UL << (pin % PINS_PER_BANK));
|
|
|
|
uint32_t reg_val;
|
|
|
|
|
|
|
|
/* Sanity check the flags supplied are valid, i.e. not input and output */
|
|
|
|
if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) == 0x0000)
|
|
|
|
return (EINVAL);
|
|
|
|
if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) ==
|
|
|
|
(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT))
|
|
|
|
return (EINVAL);
|
|
|
|
if ((flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) ==
|
|
|
|
(GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN))
|
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
TI_GPIO_LOCK(sc);
|
|
|
|
|
|
|
|
/* Sanity check the pin number is valid */
|
2013-02-25 09:33:48 +00:00
|
|
|
if ((bank >= MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) {
|
2012-08-15 06:31:32 +00:00
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set the GPIO mode and state */
|
|
|
|
if (ti_scm_padconf_set_gpioflags(pin, flags) != 0) {
|
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If configuring as an output set the "output enable" bit */
|
|
|
|
reg_val = ti_gpio_read_4(sc, bank, TI_GPIO_OE);
|
|
|
|
if (flags & GPIO_PIN_INPUT)
|
|
|
|
reg_val |= mask;
|
|
|
|
else
|
|
|
|
reg_val &= ~mask;
|
|
|
|
ti_gpio_write_4(sc, bank, TI_GPIO_OE, reg_val);
|
|
|
|
|
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_pin_set - Sets the current level on a GPIO pin
|
|
|
|
* @dev: gpio device handle
|
|
|
|
* @pin: the number of the pin
|
|
|
|
* @value: non-zero value will drive the pin high, otherwise the pin is
|
|
|
|
* driven low.
|
|
|
|
*
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* Internally locks the context
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Returns 0 on success otherwise a error code
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
|
|
|
|
{
|
|
|
|
struct ti_gpio_softc *sc = device_get_softc(dev);
|
|
|
|
uint32_t bank = (pin / PINS_PER_BANK);
|
|
|
|
uint32_t mask = (1UL << (pin % PINS_PER_BANK));
|
|
|
|
|
|
|
|
TI_GPIO_LOCK(sc);
|
|
|
|
|
|
|
|
/* Sanity check the pin number is valid */
|
2013-02-25 09:33:48 +00:00
|
|
|
if ((bank >= MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) {
|
2012-08-15 06:31:32 +00:00
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
ti_gpio_write_4(sc, bank, (value == GPIO_PIN_LOW) ? TI_GPIO_CLEARDATAOUT
|
|
|
|
: TI_GPIO_SETDATAOUT, mask);
|
|
|
|
|
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_pin_get - Gets the current level on a GPIO pin
|
|
|
|
* @dev: gpio device handle
|
|
|
|
* @pin: the number of the pin
|
|
|
|
* @value: pointer to a value that upond return will contain the pin value
|
|
|
|
*
|
|
|
|
* The pin must be configured as an input pin beforehand, otherwise this
|
|
|
|
* function will fail.
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* Internally locks the context
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Returns 0 on success otherwise a error code
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value)
|
|
|
|
{
|
|
|
|
struct ti_gpio_softc *sc = device_get_softc(dev);
|
|
|
|
uint32_t bank = (pin / PINS_PER_BANK);
|
|
|
|
uint32_t mask = (1UL << (pin % PINS_PER_BANK));
|
|
|
|
uint32_t val = 0;
|
|
|
|
|
|
|
|
TI_GPIO_LOCK(sc);
|
|
|
|
|
|
|
|
/* Sanity check the pin number is valid */
|
2013-02-25 09:33:48 +00:00
|
|
|
if ((bank >= MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) {
|
2012-08-15 06:31:32 +00:00
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Sanity check the pin is not configured as an output */
|
|
|
|
val = ti_gpio_read_4(sc, bank, TI_GPIO_OE);
|
|
|
|
|
|
|
|
/* Read the value on the pin */
|
2013-02-25 08:04:47 +00:00
|
|
|
if (val & mask)
|
|
|
|
*value = (ti_gpio_read_4(sc, bank, TI_GPIO_DATAIN) & mask) ? 1 : 0;
|
MFC r258046, r258047, r258050, r259035, r259036, r259037, r261842, r261843,
r261844, r261845, r261846, r262194, r262522, r262559
r258046:
Fix a typo on a comment in ofw_bus_if.m, the default method will return -1
when a node doesn't exist.
r258047:
Move the KASSERT() check to the point before the increase of number of pins.
r258050:
Fix gpiobus to return BUS_PROBE_GENERIC insted of BUS_PROBE_SPECIFIC (0) so
it can be overriden by its OFW/FDT version.
Give a chance for GPIO devices that implement the device_identify method to
attach.
r259035:
Remove unnecessary includes and an unused softc variable. While here apply
two minor style(9) fixes.
r259036:
Move the GPIOBUS_SET_PINFLAGS(..., ..., pin, GPIO_PIN_OUTPUT) to led(4)
control callback function. This makes gpioled(4) works even if the pin
is accidentally set to an input.
r259037:
Fix the pin value reading on AM335x. Because of the inverted logic it was
always returning '0' for all the reads, even for the outputs. It is now
known to work with gpioiic(4) and gpioled(4).
r261842:
Add an OFW GPIO compatible bus. This allows the use of the DTS files to
describe GPIO bindings in the system.
Move the GPIOBUS lock macros to gpiobusvar.h as they are now shared between
the OFW and the non OFW versions of GPIO bus.
Export gpiobus_print_pins() so it can also be used on the OFW GPIO bus.
r261843:
Add OFW support to the in tree gpio compatible devices: gpioiic(4) and
gpioled(4).
Tested on RPi and BBB (using the hardware I2C controller and gpioiic(4) for
the I2C tests). It was also verified for regressions on RSPRO (MIPS/ar71xx)
used as reference for a non OFW-based system.
Update the gpioled(4) and gpioiic(4) man pages with some details and
examples about the FDT/OFW support.
Some compatibility details pointed out by imp@ will follow in subsequent
commits.
r261844:
Allow the use of OFW I2C bus together with iicbb(4) on OFW-based systems.
This change makes ofw_iicbus attach to iicbb(4) controllers in addition to
the already supported i2c host bridges (iichb).
On iicbb(4) allow the direct access of the OFW parent node by its children,
so they can be directly attached to iicbb(4) node on the DTS without the
need of describing the i2c bus.
r261845:
Allow the use of the OFW GPIO bus for ti_gpio and bcm2835_gpio. With this
change the gpio children can be described as directly connected to the GPIO
controller without the need of describing the OFW GPIO bus itself on the
DTS file.
With this commit the OFW GPIO bus is fully functional on BBB and RPi.
GPIO controllers which want to use the OFW GPIO bus will need similar
changes.
r261846:
Make the gpioled(4) work out of the box on BBB.
Add gpioled(4) to BEAGLEBONE kernel and add the description of the four
on-board leds of beaglebone-black to its DTS file.
r262194:
Remove an unnecessary header.
r262522:
Fix make depend for iicbus.
r262559:
Inspired by r262522, fix make depend. This fixes the build of gpio modules.
2014-05-15 01:27:53 +00:00
|
|
|
else
|
|
|
|
*value = (ti_gpio_read_4(sc, bank, TI_GPIO_DATAOUT) & mask) ? 1 : 0;
|
2012-08-15 06:31:32 +00:00
|
|
|
|
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_pin_toggle - Toggles a given GPIO pin
|
|
|
|
* @dev: gpio device handle
|
|
|
|
* @pin: the number of the pin
|
|
|
|
*
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* Internally locks the context
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Returns 0 on success otherwise a error code
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_pin_toggle(device_t dev, uint32_t pin)
|
|
|
|
{
|
|
|
|
struct ti_gpio_softc *sc = device_get_softc(dev);
|
|
|
|
uint32_t bank = (pin / PINS_PER_BANK);
|
|
|
|
uint32_t mask = (1UL << (pin % PINS_PER_BANK));
|
|
|
|
uint32_t val;
|
|
|
|
|
|
|
|
TI_GPIO_LOCK(sc);
|
|
|
|
|
|
|
|
/* Sanity check the pin number is valid */
|
2013-02-25 09:33:48 +00:00
|
|
|
if ((bank >= MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) {
|
2012-08-15 06:31:32 +00:00
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Toggle the pin */
|
|
|
|
val = ti_gpio_read_4(sc, bank, TI_GPIO_DATAOUT);
|
|
|
|
if (val & mask)
|
|
|
|
ti_gpio_write_4(sc, bank, TI_GPIO_CLEARDATAOUT, mask);
|
|
|
|
else
|
|
|
|
ti_gpio_write_4(sc, bank, TI_GPIO_SETDATAOUT, mask);
|
|
|
|
|
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_intr - ISR for all GPIO modules
|
|
|
|
* @arg: the soft context pointer
|
|
|
|
*
|
|
|
|
* Unsused
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* Internally locks the context
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
ti_gpio_intr(void *arg)
|
|
|
|
{
|
|
|
|
struct ti_gpio_softc *sc = arg;
|
|
|
|
|
|
|
|
TI_GPIO_LOCK(sc);
|
|
|
|
/* TODO: something useful */
|
|
|
|
TI_GPIO_UNLOCK(sc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_probe - probe function for the driver
|
|
|
|
* @dev: gpio device handle
|
|
|
|
*
|
|
|
|
* Simply sets the name of the driver
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Always returns 0
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_probe(device_t dev)
|
|
|
|
{
|
2014-05-15 16:11:06 +00:00
|
|
|
|
|
|
|
if (!ofw_bus_status_okay(dev))
|
|
|
|
return (ENXIO);
|
|
|
|
|
2012-08-15 06:31:32 +00:00
|
|
|
if (!ofw_bus_is_compatible(dev, "ti,gpio"))
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
device_set_desc(dev, "TI General Purpose I/O (GPIO)");
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
ti_gpio_attach_intr(device_t dev)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct ti_gpio_softc *sc;
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
for (i = 0; i < MAX_GPIO_INTRS; i++) {
|
|
|
|
if (sc->sc_irq_res[i] == NULL)
|
|
|
|
break;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Register our interrupt handler for each of the IRQ resources.
|
|
|
|
*/
|
|
|
|
if (bus_setup_intr(dev, sc->sc_irq_res[i],
|
|
|
|
INTR_TYPE_MISC | INTR_MPSAFE, NULL, ti_gpio_intr, sc,
|
|
|
|
&sc->sc_irq_hdl[i]) != 0) {
|
|
|
|
device_printf(dev,
|
|
|
|
"WARNING: unable to register interrupt handler\n");
|
|
|
|
return (-1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
ti_gpio_detach_intr(device_t dev)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct ti_gpio_softc *sc;
|
|
|
|
|
|
|
|
/* Teardown our interrupt handlers. */
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
for (i = 0; i < MAX_GPIO_INTRS; i++) {
|
|
|
|
if (sc->sc_irq_res[i] == NULL)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (sc->sc_irq_hdl[i]) {
|
|
|
|
bus_teardown_intr(dev, sc->sc_irq_res[i],
|
|
|
|
sc->sc_irq_hdl[i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
ti_gpio_bank_init(device_t dev, int bank)
|
|
|
|
{
|
|
|
|
int pin;
|
|
|
|
struct ti_gpio_softc *sc;
|
|
|
|
uint32_t flags, reg_oe;
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
|
|
|
|
/* Enable the interface and functional clocks for the module. */
|
|
|
|
ti_prcm_clk_enable(GPIO0_CLK + FIRST_GPIO_BANK + bank);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Read the revision number of the module. TI don't publish the
|
|
|
|
* actual revision numbers, so instead the values have been
|
|
|
|
* determined by experimentation.
|
|
|
|
*/
|
|
|
|
sc->sc_revision[bank] = ti_gpio_read_4(sc, bank, TI_GPIO_REVISION);
|
|
|
|
|
|
|
|
/* Check the revision. */
|
|
|
|
if (sc->sc_revision[bank] != TI_GPIO_REV) {
|
|
|
|
device_printf(dev, "Warning: could not determine the revision "
|
|
|
|
"of %u GPIO module (revision:0x%08x)\n",
|
|
|
|
bank, sc->sc_revision[bank]);
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Disable interrupts for all pins. */
|
|
|
|
ti_gpio_intr_clr(sc, bank, 0xffffffff);
|
|
|
|
|
|
|
|
/* Init OE register based on pads configuration. */
|
|
|
|
reg_oe = 0xffffffff;
|
|
|
|
for (pin = 0; pin < PINS_PER_BANK; pin++) {
|
|
|
|
ti_scm_padconf_get_gpioflags(PINS_PER_BANK * bank + pin,
|
|
|
|
&flags);
|
|
|
|
if (flags & GPIO_PIN_OUTPUT)
|
|
|
|
reg_oe &= ~(1UL << pin);
|
|
|
|
}
|
|
|
|
ti_gpio_write_4(sc, bank, TI_GPIO_OE, reg_oe);
|
|
|
|
|
2012-08-15 06:31:32 +00:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_attach - attach function for the driver
|
|
|
|
* @dev: gpio device handle
|
|
|
|
*
|
|
|
|
* Allocates and sets up the driver context for all GPIO banks. This function
|
|
|
|
* expects the memory ranges and IRQs to already be allocated to the driver.
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Always returns 0
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_attach(device_t dev)
|
|
|
|
{
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
struct ti_gpio_softc *sc;
|
2012-08-15 06:31:32 +00:00
|
|
|
unsigned int i;
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
int err;
|
2012-08-15 06:31:32 +00:00
|
|
|
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
sc = device_get_softc(dev);
|
2012-08-15 06:31:32 +00:00
|
|
|
sc->sc_dev = dev;
|
|
|
|
|
|
|
|
TI_GPIO_LOCK_INIT(sc);
|
|
|
|
|
|
|
|
/* There are up to 6 different GPIO register sets located in different
|
|
|
|
* memory areas on the chip. The memory range should have been set for
|
|
|
|
* the driver when it was added as a child.
|
|
|
|
*/
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
if (bus_alloc_resources(dev, ti_gpio_mem_spec, sc->sc_mem_res) != 0) {
|
2012-08-15 06:31:32 +00:00
|
|
|
device_printf(dev, "Error: could not allocate mem resources\n");
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Request the IRQ resources */
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
if (bus_alloc_resources(dev, ti_gpio_irq_spec, sc->sc_irq_res) != 0) {
|
|
|
|
bus_release_resources(dev, ti_gpio_mem_spec, sc->sc_mem_res);
|
2012-08-15 06:31:32 +00:00
|
|
|
device_printf(dev, "Error: could not allocate irq resources\n");
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Setup the IRQ resources */
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
if (ti_gpio_attach_intr(dev) != 0) {
|
|
|
|
ti_gpio_detach_intr(dev);
|
|
|
|
bus_release_resources(dev, ti_gpio_irq_spec, sc->sc_irq_res);
|
|
|
|
bus_release_resources(dev, ti_gpio_mem_spec, sc->sc_mem_res);
|
|
|
|
return (ENXIO);
|
2012-08-15 06:31:32 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* We need to go through each block and ensure the clocks are running and
|
|
|
|
* the module is enabled. It might be better to do this only when the
|
|
|
|
* pins are configured which would result in less power used if the GPIO
|
|
|
|
* pins weren't used ...
|
|
|
|
*/
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
for (i = 0; i < MAX_GPIO_BANKS; i++) {
|
2012-08-15 06:31:32 +00:00
|
|
|
if (sc->sc_mem_res[i] != NULL) {
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
/* Initialize the GPIO module. */
|
|
|
|
err = ti_gpio_bank_init(dev, i);
|
|
|
|
if (err != 0) {
|
|
|
|
ti_gpio_detach_intr(dev);
|
|
|
|
bus_release_resources(dev, ti_gpio_irq_spec,
|
|
|
|
sc->sc_irq_res);
|
|
|
|
bus_release_resources(dev, ti_gpio_mem_spec,
|
|
|
|
sc->sc_mem_res);
|
|
|
|
return (err);
|
2012-08-15 06:31:32 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Finish of the probe call */
|
|
|
|
device_add_child(dev, "gpioc", device_get_unit(dev));
|
|
|
|
device_add_child(dev, "gpiobus", device_get_unit(dev));
|
2013-02-25 08:04:47 +00:00
|
|
|
|
2012-08-15 06:31:32 +00:00
|
|
|
return (bus_generic_attach(dev));
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* ti_gpio_detach - detach function for the driver
|
|
|
|
* @dev: scm device handle
|
|
|
|
*
|
|
|
|
* Allocates and sets up the driver context, this simply entails creating a
|
|
|
|
* bus mappings for the SCM register set.
|
|
|
|
*
|
|
|
|
* LOCKING:
|
|
|
|
* None
|
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Always returns 0
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ti_gpio_detach(device_t dev)
|
|
|
|
{
|
|
|
|
struct ti_gpio_softc *sc = device_get_softc(dev);
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
KASSERT(mtx_initialized(&sc->sc_mtx), ("gpio mutex not initialized"));
|
|
|
|
|
|
|
|
/* Disable all interrupts */
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
for (i = 0; i < MAX_GPIO_BANKS; i++) {
|
|
|
|
if (sc->sc_mem_res[i] != NULL)
|
|
|
|
ti_gpio_intr_clr(sc, i, 0xffffffff);
|
2012-08-15 06:31:32 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
bus_generic_detach(dev);
|
|
|
|
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
/* Release the memory and IRQ resources. */
|
|
|
|
ti_gpio_detach_intr(dev);
|
|
|
|
bus_release_resources(dev, ti_gpio_irq_spec, sc->sc_irq_res);
|
|
|
|
bus_release_resources(dev, ti_gpio_mem_spec, sc->sc_mem_res);
|
2012-08-15 06:31:32 +00:00
|
|
|
|
|
|
|
TI_GPIO_LOCK_DESTROY(sc);
|
|
|
|
|
MFC r259125, r264019, r264083, r264153, r264197
r259125:
Fix a few typos on the scm (control module) pin mux definitions.
r264019:
Fix some of the style(9) problems on ti_gpio.
Remove redundant code and declarations.
r264083:
Move the GPIO bank initialization to a new function to make easier to detect
errors.
Reset the GPIO module during the initialization. This is guaranteed to be
the same as a hardware reset. Tested on AM335x (BBB) and checked against
the omap3 and omap4 TRM.
Do a better job freeing resources when there are errors and on
ti_gpio_detach().
r264153:
- Fix the setup of interrupts for banks 2 and 3 on AM335x.
On AM335x each one of the four GPIO banks has two physical interrupt
lines, so we now allocate resources and setup our interrupt handler for
all the (8) available interrupts.
On OMAP3 and OMAP4 there is only one interrupt for each GPIO bank (6
banks, 6 interrupts), but there are two set of registers where the
first one is used to setup the delivery of interrupts to the MPU and
the second set, setup the delivery of interrupts to the DSP.
On AM335x, each set of registers controls each one of the interrupt
lines.
- Remove nonexistent registers for OMAP4 and AM335x, replace their use with
the correct ones for these SoCs.
- Remove stray whitespace.
r264197:
Partially revert r264083.
While it is the recommended initialization procedure, it hangs on the reset
of the second GPIO module on pandaboard.
Removes the module reset for now as more investigation is needed.
2014-05-15 15:47:52 +00:00
|
|
|
return (0);
|
2012-08-15 06:31:32 +00:00
|
|
|
}
|
|
|
|
|
MFC r258046, r258047, r258050, r259035, r259036, r259037, r261842, r261843,
r261844, r261845, r261846, r262194, r262522, r262559
r258046:
Fix a typo on a comment in ofw_bus_if.m, the default method will return -1
when a node doesn't exist.
r258047:
Move the KASSERT() check to the point before the increase of number of pins.
r258050:
Fix gpiobus to return BUS_PROBE_GENERIC insted of BUS_PROBE_SPECIFIC (0) so
it can be overriden by its OFW/FDT version.
Give a chance for GPIO devices that implement the device_identify method to
attach.
r259035:
Remove unnecessary includes and an unused softc variable. While here apply
two minor style(9) fixes.
r259036:
Move the GPIOBUS_SET_PINFLAGS(..., ..., pin, GPIO_PIN_OUTPUT) to led(4)
control callback function. This makes gpioled(4) works even if the pin
is accidentally set to an input.
r259037:
Fix the pin value reading on AM335x. Because of the inverted logic it was
always returning '0' for all the reads, even for the outputs. It is now
known to work with gpioiic(4) and gpioled(4).
r261842:
Add an OFW GPIO compatible bus. This allows the use of the DTS files to
describe GPIO bindings in the system.
Move the GPIOBUS lock macros to gpiobusvar.h as they are now shared between
the OFW and the non OFW versions of GPIO bus.
Export gpiobus_print_pins() so it can also be used on the OFW GPIO bus.
r261843:
Add OFW support to the in tree gpio compatible devices: gpioiic(4) and
gpioled(4).
Tested on RPi and BBB (using the hardware I2C controller and gpioiic(4) for
the I2C tests). It was also verified for regressions on RSPRO (MIPS/ar71xx)
used as reference for a non OFW-based system.
Update the gpioled(4) and gpioiic(4) man pages with some details and
examples about the FDT/OFW support.
Some compatibility details pointed out by imp@ will follow in subsequent
commits.
r261844:
Allow the use of OFW I2C bus together with iicbb(4) on OFW-based systems.
This change makes ofw_iicbus attach to iicbb(4) controllers in addition to
the already supported i2c host bridges (iichb).
On iicbb(4) allow the direct access of the OFW parent node by its children,
so they can be directly attached to iicbb(4) node on the DTS without the
need of describing the i2c bus.
r261845:
Allow the use of the OFW GPIO bus for ti_gpio and bcm2835_gpio. With this
change the gpio children can be described as directly connected to the GPIO
controller without the need of describing the OFW GPIO bus itself on the
DTS file.
With this commit the OFW GPIO bus is fully functional on BBB and RPi.
GPIO controllers which want to use the OFW GPIO bus will need similar
changes.
r261846:
Make the gpioled(4) work out of the box on BBB.
Add gpioled(4) to BEAGLEBONE kernel and add the description of the four
on-board leds of beaglebone-black to its DTS file.
r262194:
Remove an unnecessary header.
r262522:
Fix make depend for iicbus.
r262559:
Inspired by r262522, fix make depend. This fixes the build of gpio modules.
2014-05-15 01:27:53 +00:00
|
|
|
static phandle_t
|
|
|
|
ti_gpio_get_node(device_t bus, device_t dev)
|
|
|
|
{
|
|
|
|
|
|
|
|
/* We only have one child, the GPIO bus, which needs our own node. */
|
|
|
|
return (ofw_bus_get_node(bus));
|
|
|
|
}
|
|
|
|
|
2012-08-15 06:31:32 +00:00
|
|
|
static device_method_t ti_gpio_methods[] = {
|
|
|
|
DEVMETHOD(device_probe, ti_gpio_probe),
|
|
|
|
DEVMETHOD(device_attach, ti_gpio_attach),
|
|
|
|
DEVMETHOD(device_detach, ti_gpio_detach),
|
|
|
|
|
|
|
|
/* GPIO protocol */
|
|
|
|
DEVMETHOD(gpio_pin_max, ti_gpio_pin_max),
|
|
|
|
DEVMETHOD(gpio_pin_getname, ti_gpio_pin_getname),
|
|
|
|
DEVMETHOD(gpio_pin_getflags, ti_gpio_pin_getflags),
|
|
|
|
DEVMETHOD(gpio_pin_getcaps, ti_gpio_pin_getcaps),
|
|
|
|
DEVMETHOD(gpio_pin_setflags, ti_gpio_pin_setflags),
|
|
|
|
DEVMETHOD(gpio_pin_get, ti_gpio_pin_get),
|
|
|
|
DEVMETHOD(gpio_pin_set, ti_gpio_pin_set),
|
|
|
|
DEVMETHOD(gpio_pin_toggle, ti_gpio_pin_toggle),
|
MFC r258046, r258047, r258050, r259035, r259036, r259037, r261842, r261843,
r261844, r261845, r261846, r262194, r262522, r262559
r258046:
Fix a typo on a comment in ofw_bus_if.m, the default method will return -1
when a node doesn't exist.
r258047:
Move the KASSERT() check to the point before the increase of number of pins.
r258050:
Fix gpiobus to return BUS_PROBE_GENERIC insted of BUS_PROBE_SPECIFIC (0) so
it can be overriden by its OFW/FDT version.
Give a chance for GPIO devices that implement the device_identify method to
attach.
r259035:
Remove unnecessary includes and an unused softc variable. While here apply
two minor style(9) fixes.
r259036:
Move the GPIOBUS_SET_PINFLAGS(..., ..., pin, GPIO_PIN_OUTPUT) to led(4)
control callback function. This makes gpioled(4) works even if the pin
is accidentally set to an input.
r259037:
Fix the pin value reading on AM335x. Because of the inverted logic it was
always returning '0' for all the reads, even for the outputs. It is now
known to work with gpioiic(4) and gpioled(4).
r261842:
Add an OFW GPIO compatible bus. This allows the use of the DTS files to
describe GPIO bindings in the system.
Move the GPIOBUS lock macros to gpiobusvar.h as they are now shared between
the OFW and the non OFW versions of GPIO bus.
Export gpiobus_print_pins() so it can also be used on the OFW GPIO bus.
r261843:
Add OFW support to the in tree gpio compatible devices: gpioiic(4) and
gpioled(4).
Tested on RPi and BBB (using the hardware I2C controller and gpioiic(4) for
the I2C tests). It was also verified for regressions on RSPRO (MIPS/ar71xx)
used as reference for a non OFW-based system.
Update the gpioled(4) and gpioiic(4) man pages with some details and
examples about the FDT/OFW support.
Some compatibility details pointed out by imp@ will follow in subsequent
commits.
r261844:
Allow the use of OFW I2C bus together with iicbb(4) on OFW-based systems.
This change makes ofw_iicbus attach to iicbb(4) controllers in addition to
the already supported i2c host bridges (iichb).
On iicbb(4) allow the direct access of the OFW parent node by its children,
so they can be directly attached to iicbb(4) node on the DTS without the
need of describing the i2c bus.
r261845:
Allow the use of the OFW GPIO bus for ti_gpio and bcm2835_gpio. With this
change the gpio children can be described as directly connected to the GPIO
controller without the need of describing the OFW GPIO bus itself on the
DTS file.
With this commit the OFW GPIO bus is fully functional on BBB and RPi.
GPIO controllers which want to use the OFW GPIO bus will need similar
changes.
r261846:
Make the gpioled(4) work out of the box on BBB.
Add gpioled(4) to BEAGLEBONE kernel and add the description of the four
on-board leds of beaglebone-black to its DTS file.
r262194:
Remove an unnecessary header.
r262522:
Fix make depend for iicbus.
r262559:
Inspired by r262522, fix make depend. This fixes the build of gpio modules.
2014-05-15 01:27:53 +00:00
|
|
|
|
|
|
|
/* ofw_bus interface */
|
|
|
|
DEVMETHOD(ofw_bus_get_node, ti_gpio_get_node),
|
|
|
|
|
2012-08-15 06:31:32 +00:00
|
|
|
{0, 0},
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t ti_gpio_driver = {
|
|
|
|
"gpio",
|
|
|
|
ti_gpio_methods,
|
|
|
|
sizeof(struct ti_gpio_softc),
|
|
|
|
};
|
|
|
|
static devclass_t ti_gpio_devclass;
|
|
|
|
|
|
|
|
DRIVER_MODULE(ti_gpio, simplebus, ti_gpio_driver, ti_gpio_devclass, 0, 0);
|