2010-09-28 03:24:53 +00:00
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#-
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# Copyright (c) 2009 Oleksandr Tymoshenko <gonzo@freebsd.org>
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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# SUCH DAMAGE.
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#
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# $FreeBSD$
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#
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#include <sys/bus.h>
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#include <sys/gpio.h>
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INTERFACE gpio;
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2014-05-04 04:01:26 +00:00
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CODE {
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2015-01-31 15:50:19 +00:00
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static device_t
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gpio_default_get_bus(void)
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{
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return (NULL);
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}
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Add gpio methods to read/write/configure up to 32 pins simultaneously.
Sometimes it is necessary to combine several gpio pins into an ad-hoc bus
and manipulate the pins as a group. In such cases manipulating the pins
individualy is not an option, because the value on the "bus" assumes
potentially-invalid intermediate values as each pin is changed in turn. Note
that the "bus" may be something as simple as a bi-color LED where changing
colors requires changing both gpio pins at once, or something as complex as
a bitbanged multiplexed address/data bus connected to a microcontroller.
In addition to the absolute requirement of simultaneously changing the
output values of driven pins, a desirable feature of these new methods is to
provide a higher-performance mechanism for reading and writing multiple
pins, especially from userland where pin-at-a-time access incurs a noticible
syscall time penalty.
These new interfaces are NOT intended to abstract away all the ugly details
of how gpio is implemented on any given platform. In fact, to use these
properly you absolutely must know something about how the gpio hardware is
organized. Typically there are "banks" of gpio pins controlled by registers
which group several pins together. A bank may be as small as 2 pins or as
big as "all the pins on the device, hundreds of them." In the latter case, a
driver might support this interface by allowing access to any 32 adjacent
pins within the overall collection. Or, more likely, any 32 adjacent pins
starting at any multiple of 32. Whatever the hardware restrictions may be,
you would need to understand them to use this interface.
In additional to defining the interfaces, two example implementations are
included here, for imx5/6, and allwinner. These represent the two primary
types of gpio hardware drivers. imx6 has multiple gpio devices, each
implementing a single bank of 32 pins. Allwinner implements a single large
gpio number space from 1-n pins, and the driver internally translates that
linear number space to a bank+pin scheme based on how the pins are grouped
into control registers. The allwinner implementation imposes the restriction
that the first_pin argument to the new functions must always be pin 0 of a
bank.
Differential Revision: https://reviews.freebsd.org/D11810
2017-09-10 18:08:25 +00:00
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static int
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gpio_default_nosupport(void)
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{
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return (EOPNOTSUPP);
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}
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2014-11-18 17:37:33 +00:00
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static int
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2014-05-04 04:01:26 +00:00
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gpio_default_map_gpios(device_t bus, phandle_t dev,
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phandle_t gparent, int gcells, pcell_t *gpios, uint32_t *pin,
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uint32_t *flags)
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{
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/* Propagate up the bus hierarchy until someone handles it. */
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if (device_get_parent(bus) != NULL)
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return (GPIO_MAP_GPIOS(device_get_parent(bus), dev,
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gparent, gcells, gpios, pin, flags));
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/* If that fails, then assume the FreeBSD defaults. */
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*pin = gpios[0];
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if (gcells == 2 || gcells == 3)
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*flags = gpios[gcells - 1];
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return (0);
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}
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};
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HEADER {
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#include <dev/ofw/openfirm.h>
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};
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2015-01-31 15:50:19 +00:00
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#
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# Return the gpiobus device reference
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#
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METHOD device_t get_bus {
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device_t dev;
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} DEFAULT gpio_default_get_bus;
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2010-09-28 03:24:53 +00:00
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#
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2014-12-24 03:24:50 +00:00
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# Get maximum pin number
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2010-09-28 03:24:53 +00:00
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#
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METHOD int pin_max {
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device_t dev;
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2014-12-24 03:24:50 +00:00
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int *maxpin;
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2010-09-28 03:24:53 +00:00
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};
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#
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# Set value of pin specifed by pin_num
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#
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METHOD int pin_set {
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device_t dev;
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uint32_t pin_num;
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uint32_t pin_value;
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};
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#
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# Get value of pin specifed by pin_num
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#
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METHOD int pin_get {
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device_t dev;
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uint32_t pin_num;
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uint32_t *pin_value;
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};
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#
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# Toggle value of pin specifed by pin_num
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#
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METHOD int pin_toggle {
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device_t dev;
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uint32_t pin_num;
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};
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#
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# Get pin capabilities
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#
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METHOD int pin_getcaps {
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device_t dev;
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uint32_t pin_num;
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uint32_t *caps;
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};
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#
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# Get pin flags
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#
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METHOD int pin_getflags {
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device_t dev;
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uint32_t pin_num;
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uint32_t *flags;
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};
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#
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# Get pin name
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#
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METHOD int pin_getname {
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device_t dev;
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uint32_t pin_num;
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char *name;
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};
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#
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# Set current configuration and capabilities
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#
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METHOD int pin_setflags {
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device_t dev;
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uint32_t pin_num;
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uint32_t flags;
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};
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2014-05-04 04:01:26 +00:00
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#
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# Allow the GPIO controller to map the gpio-specifier on its own.
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#
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METHOD int map_gpios {
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device_t bus;
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phandle_t dev;
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phandle_t gparent;
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int gcells;
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pcell_t *gpios;
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uint32_t *pin;
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uint32_t *flags;
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} DEFAULT gpio_default_map_gpios;
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Add gpio methods to read/write/configure up to 32 pins simultaneously.
Sometimes it is necessary to combine several gpio pins into an ad-hoc bus
and manipulate the pins as a group. In such cases manipulating the pins
individualy is not an option, because the value on the "bus" assumes
potentially-invalid intermediate values as each pin is changed in turn. Note
that the "bus" may be something as simple as a bi-color LED where changing
colors requires changing both gpio pins at once, or something as complex as
a bitbanged multiplexed address/data bus connected to a microcontroller.
In addition to the absolute requirement of simultaneously changing the
output values of driven pins, a desirable feature of these new methods is to
provide a higher-performance mechanism for reading and writing multiple
pins, especially from userland where pin-at-a-time access incurs a noticible
syscall time penalty.
These new interfaces are NOT intended to abstract away all the ugly details
of how gpio is implemented on any given platform. In fact, to use these
properly you absolutely must know something about how the gpio hardware is
organized. Typically there are "banks" of gpio pins controlled by registers
which group several pins together. A bank may be as small as 2 pins or as
big as "all the pins on the device, hundreds of them." In the latter case, a
driver might support this interface by allowing access to any 32 adjacent
pins within the overall collection. Or, more likely, any 32 adjacent pins
starting at any multiple of 32. Whatever the hardware restrictions may be,
you would need to understand them to use this interface.
In additional to defining the interfaces, two example implementations are
included here, for imx5/6, and allwinner. These represent the two primary
types of gpio hardware drivers. imx6 has multiple gpio devices, each
implementing a single bank of 32 pins. Allwinner implements a single large
gpio number space from 1-n pins, and the driver internally translates that
linear number space to a bank+pin scheme based on how the pins are grouped
into control registers. The allwinner implementation imposes the restriction
that the first_pin argument to the new functions must always be pin 0 of a
bank.
Differential Revision: https://reviews.freebsd.org/D11810
2017-09-10 18:08:25 +00:00
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#
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# Simultaneously read and/or change up to 32 adjacent pins.
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# If the device cannot change the pins simultaneously, returns EOPNOTSUPP.
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#
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# More details about using this interface can be found in sys/gpio.h
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#
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METHOD int pin_access_32 {
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device_t dev;
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uint32_t first_pin;
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uint32_t clear_pins;
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uint32_t change_pins;
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uint32_t *orig_pins;
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} DEFAULT gpio_default_nosupport;
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#
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# Simultaneously configure up to 32 adjacent pins.
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# This is intended to change the configuration of all the pins simultaneously,
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# but unlike pin_access_32, this will not fail if the hardware can't do so.
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#
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# More details about using this interface can be found in sys/gpio.h
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#
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METHOD int pin_config_32 {
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device_t dev;
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uint32_t first_pin;
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uint32_t num_pins;
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uint32_t *pin_flags;
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} DEFAULT gpio_default_nosupport;
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