2013-11-12 12:44:59 +00:00
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.\" Copyright (c) 2013, Luiz Otavio O Souza <loos@FreeBSD.org>
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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2019-12-01 23:05:20 +00:00
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.Dd December 1, 2019
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2013-11-12 12:44:59 +00:00
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.Dt GPIOIIC 4
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.Os
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.Sh NAME
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.Nm gpioiic
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.Nd GPIO I2C bit-banging device driver
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.Sh SYNOPSIS
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2014-02-20 16:35:48 +00:00
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To compile this driver into the kernel,
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place the following lines in your
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kernel configuration file:
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.Bd -ragged -offset indent
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2013-11-12 12:44:59 +00:00
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.Cd "device gpio"
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.Cd "device gpioiic"
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.Cd "device iicbb"
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.Cd "device iicbus"
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2014-02-20 16:35:48 +00:00
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.Ed
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2019-12-01 23:05:20 +00:00
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.Pp
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Alternatively, to load the driver as a
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module at boot time, place the following line in
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.Xr loader.conf 5 :
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.Bd -literal -offset indent
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gpioiic_load="YES"
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.Ed
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2013-11-12 12:44:59 +00:00
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.Sh DESCRIPTION
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The
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2014-02-20 16:35:48 +00:00
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.Nm
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2013-11-12 12:44:59 +00:00
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driver provides an IIC bit-banging interface using two GPIO pins for the
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2019-12-01 23:05:20 +00:00
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SCL and SDA lines on the bus.
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.Pp
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2013-11-12 12:44:59 +00:00
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.Nm
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2019-12-01 23:05:20 +00:00
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simulates an open collector kind of output when managing the pins on the
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bus, even on systems which don't directly support configuring gpio pins
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in that mode.
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The pins are never driven to the logical value of '1'.
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They are driven to '0' or switched to input mode (Hi-Z/tri-state), and
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an external pullup resistor pulls the line to the 1 state unless some
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other device on the bus is driving it to 0.
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2013-11-12 12:44:59 +00:00
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.Pp
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2019-12-01 23:05:20 +00:00
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.Sh HINTS CONFIGURATION
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2014-02-20 16:35:48 +00:00
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On a
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.Xr device.hints 5
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2019-12-01 23:05:20 +00:00
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based system, such as MIPS, these values are configurable for
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2014-02-20 16:35:48 +00:00
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.Nm :
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2013-11-12 12:44:59 +00:00
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.Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
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.It Va hint.gpioiic.%d.at
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2014-02-20 16:35:48 +00:00
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The
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.Nm gpiobus
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you are attaching to.
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2019-12-01 23:05:20 +00:00
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Normally just gpiobus0 on systems with a single bank of gpio pins.
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.It Va hint.gpioiic.%d.pins
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This is a bitmask of the pins on the
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.Nm gpiobus
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2013-11-12 12:44:59 +00:00
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that are to be used for SCLOCK and SDATA from the GPIO IIC
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bit-banging bus.
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To configure pin 0 and 7, use the bitmask of
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0b10000001 and convert it to a hexadecimal value of 0x0081.
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2013-11-12 12:44:59 +00:00
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Please note that this mask should only ever have two bits set
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(any other bits - i.e., pins - will be ignored).
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Because
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.Nm
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must be a child of the gpiobus, both gpio pins must be part of that bus.
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2013-11-12 12:44:59 +00:00
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.It Va hint.gpioiic.%d.scl
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Indicates which bit in the
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.Va hint.gpioiic.%d.pins
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should be used as the SCLOCK
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source.
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Optional, defaults to 0.
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.It Va hint.gpioiic.%d.sda
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Indicates which bit in the
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.Va hint.gpioiic.%d.pins
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should be used as the SDATA
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source.
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2014-02-13 17:58:52 +00:00
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Optional, defaults to 1.
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.El
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.Sh FDT CONFIGURATION
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On an
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.Xr FDT 4
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based system, such as ARM, the DTS node for
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.Nm gpioiic
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conforms to the standard bindings document i2c/i2c-gpio.yaml.
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The device node typically appears at the root of the device tree.
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The following is an example of a
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.Nm
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node with one slave device
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on the IIC bus:
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.Bd -literal
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/ {
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gpioiic0 {
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compatible = "i2c-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpioiic0>;
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scl-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
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status = "okay";
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/* One slave device on the i2c bus. */
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rtc@51 {
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compatible="nxp,pcf2127";
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reg = <0x51>;
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status = "okay";
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2014-02-13 17:58:52 +00:00
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};
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};
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};
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.Ed
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.Pp
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Where:
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.Bl -tag -width ".Va compatible"
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.It Va compatible
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2019-12-01 23:05:20 +00:00
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Should be set to "i2c-gpio".
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The deprecated string "gpioiic" is also accepted for backwards compatibility.
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.It Va scl-gpios Va sda-gpios
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These properties indicate which GPIO pins should be used for clock
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and data on the GPIO IIC bit-banging bus.
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There is no requirement that the two pins belong to the same gpio controller.
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.It Va pinctrl-names pinctrl-0
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These properties may be required to configure the chosen pins as gpio
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pins, unless the pins default to that state on your system.
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2013-11-12 12:44:59 +00:00
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.El
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.Sh SEE ALSO
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2014-02-13 17:58:52 +00:00
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.Xr fdt 4 ,
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.Xr gpio 4 ,
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.Xr iic 4 ,
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.Xr iicbb 4 ,
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.Xr iicbus 4
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.Sh HISTORY
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The
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.Nm
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manual page first appeared in
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2014-05-14 21:54:14 +00:00
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.Fx 10.1 .
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2013-11-12 12:44:59 +00:00
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.Sh AUTHORS
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This
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manual page was written by
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.An Luiz Otavio O Souza .
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