2008-11-19 11:30:44 +00:00
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/*-
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2010-06-13 13:28:53 +00:00
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* Copyright (c) 2008 MARVELL INTERNATIONAL LTD.
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* Copyright (c) 2010 The FreeBSD Foundation
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2012-09-14 09:57:41 +00:00
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* Copyright (c) 2010-2012 Semihalf
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2008-11-19 11:30:44 +00:00
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* All rights reserved.
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*
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* Developed by Semihalf.
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*
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2010-06-13 13:28:53 +00:00
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* Portions of this software were developed by Semihalf
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* under sponsorship from the FreeBSD Foundation.
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*
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2008-11-19 11:30:44 +00:00
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of MARVELL nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Marvell integrated PCI/PCI-Express controller driver.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/queue.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/endian.h>
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MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375
Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.
In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0
In pmap_mapdev(), first check whether a static mapping exists,
Convert TI static device mapping to use the new arm_devmap_add_entry(),
Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.
Eliminate use of fdt_immr_addr(), it's not needed for tegra
Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.
Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
Add #include <machine/fdt.h> to a few files that used to get it via pollution
Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.
Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.
Switch RPi to using arm_devmap_add_entry() to set up static device mapping.
Allow 'no static device mappings' to potentially work.
Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.
Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
2014-05-14 19:18:58 +00:00
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#include <machine/fdt.h>
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2012-09-14 10:06:56 +00:00
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#include <machine/intr.h>
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2008-11-19 11:30:44 +00:00
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#include <vm/vm.h>
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#include <vm/pmap.h>
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2010-06-13 13:28:53 +00:00
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,
r259199, r259484, r259513, r259514, r259516
The kernel stack guard pages are only below the stack pointer, not above.
Remove unnecessary double-setting of the thread's onfault state in
copyinstr().
Open Firmware mandates that certain cross-references, in particular those
in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles,
since FDT has no concept of ihandles. Have the OF FDT CI module interpret
queries about ihandles as cross-reference phandles.
Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use
the right type.
Rearchitect platform memory map parsing to make it less
Open Firmware-centric.
Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
this file is also slated for future demolition.
Return the correct IEEE 1275 code for "nextprop".
Use the common Open Firmware PCI interrupt routing code instead of the
duplicate version in dev/fdt.
Configure interrupt sense based on device tree information.
Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
internally instead of requiring the caller to allocate it.
2014-05-14 14:17:51 +00:00
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#include <dev/ofw/ofw_pci.h>
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2010-06-13 13:28:53 +00:00
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#include <dev/ofw/ofw_bus_subr.h>
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2008-11-19 11:30:44 +00:00
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcib_private.h>
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2010-06-13 13:28:53 +00:00
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#include "ofw_bus_if.h"
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2008-11-19 11:30:44 +00:00
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#include "pcib_if.h"
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MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375
Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.
In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0
In pmap_mapdev(), first check whether a static mapping exists,
Convert TI static device mapping to use the new arm_devmap_add_entry(),
Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.
Eliminate use of fdt_immr_addr(), it's not needed for tegra
Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.
Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
Add #include <machine/fdt.h> to a few files that used to get it via pollution
Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.
Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.
Switch RPi to using arm_devmap_add_entry() to set up static device mapping.
Allow 'no static device mappings' to potentially work.
Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.
Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
2014-05-14 19:18:58 +00:00
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#include <machine/devmap.h>
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2008-11-19 11:30:44 +00:00
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#include <machine/resource.h>
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#include <machine/bus.h>
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#include <arm/mv/mvreg.h>
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#include <arm/mv/mvvar.h>
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2010-06-13 13:28:53 +00:00
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#include <arm/mv/mvwin.h>
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2008-11-19 11:30:44 +00:00
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2012-09-14 10:06:56 +00:00
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#ifdef DEBUG
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#define debugf(fmt, args...) do { printf(fmt,##args); } while (0)
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#else
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#define debugf(fmt, args...)
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#endif
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MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375
Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.
In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0
In pmap_mapdev(), first check whether a static mapping exists,
Convert TI static device mapping to use the new arm_devmap_add_entry(),
Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.
Eliminate use of fdt_immr_addr(), it's not needed for tegra
Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.
Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
Add #include <machine/fdt.h> to a few files that used to get it via pollution
Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.
Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.
Switch RPi to using arm_devmap_add_entry() to set up static device mapping.
Allow 'no static device mappings' to potentially work.
Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.
Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
2014-05-14 19:18:58 +00:00
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/*
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* Code and data related to fdt-based PCI configuration.
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*
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* This stuff used to be in dev/fdt/fdt_pci.c and fdt_common.h, but it was
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* always Marvell-specific so that was deleted and the code now lives here.
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*/
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struct mv_pci_range {
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u_long base_pci;
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u_long base_parent;
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u_long len;
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};
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#define FDT_RANGES_CELLS ((3 + 3 + 2) * 2)
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static void
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mv_pci_range_dump(struct mv_pci_range *range)
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{
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#ifdef DEBUG
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printf("\n");
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printf(" base_pci = 0x%08lx\n", range->base_pci);
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printf(" base_par = 0x%08lx\n", range->base_parent);
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printf(" len = 0x%08lx\n", range->len);
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#endif
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}
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static int
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mv_pci_ranges_decode(phandle_t node, struct mv_pci_range *io_space,
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struct mv_pci_range *mem_space)
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{
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pcell_t ranges[FDT_RANGES_CELLS];
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struct mv_pci_range *pci_space;
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pcell_t addr_cells, size_cells, par_addr_cells;
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pcell_t *rangesptr;
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pcell_t cell0, cell1, cell2;
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int tuple_size, tuples, i, rv, offset_cells, len;
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/*
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* Retrieve 'ranges' property.
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*/
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if ((fdt_addrsize_cells(node, &addr_cells, &size_cells)) != 0)
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return (EINVAL);
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if (addr_cells != 3 || size_cells != 2)
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return (ERANGE);
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par_addr_cells = fdt_parent_addr_cells(node);
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if (par_addr_cells > 3)
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return (ERANGE);
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len = OF_getproplen(node, "ranges");
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if (len > sizeof(ranges))
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return (ENOMEM);
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if (OF_getprop(node, "ranges", ranges, sizeof(ranges)) <= 0)
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return (EINVAL);
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tuple_size = sizeof(pcell_t) * (addr_cells + par_addr_cells +
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size_cells);
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tuples = len / tuple_size;
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/*
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* Initialize the ranges so that we don't have to worry about
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* having them all defined in the FDT. In particular, it is
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* perfectly fine not to want I/O space on PCI busses.
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*/
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bzero(io_space, sizeof(*io_space));
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bzero(mem_space, sizeof(*mem_space));
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rangesptr = &ranges[0];
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offset_cells = 0;
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for (i = 0; i < tuples; i++) {
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cell0 = fdt_data_get((void *)rangesptr, 1);
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rangesptr++;
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cell1 = fdt_data_get((void *)rangesptr, 1);
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rangesptr++;
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cell2 = fdt_data_get((void *)rangesptr, 1);
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rangesptr++;
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if (cell0 & 0x02000000) {
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pci_space = mem_space;
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} else if (cell0 & 0x01000000) {
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pci_space = io_space;
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} else {
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rv = ERANGE;
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goto out;
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}
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if (par_addr_cells == 3) {
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/*
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* This is a PCI subnode 'ranges'. Skip cell0 and
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* cell1 of this entry and only use cell2.
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*/
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offset_cells = 2;
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rangesptr += offset_cells;
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}
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if (fdt_data_verify((void *)rangesptr, par_addr_cells -
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offset_cells)) {
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rv = ERANGE;
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goto out;
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}
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pci_space->base_parent = fdt_data_get((void *)rangesptr,
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par_addr_cells - offset_cells);
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rangesptr += par_addr_cells - offset_cells;
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if (fdt_data_verify((void *)rangesptr, size_cells)) {
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rv = ERANGE;
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goto out;
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}
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pci_space->len = fdt_data_get((void *)rangesptr, size_cells);
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rangesptr += size_cells;
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pci_space->base_pci = cell2;
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}
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rv = 0;
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out:
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return (rv);
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}
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static int
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mv_pci_ranges(phandle_t node, struct mv_pci_range *io_space,
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struct mv_pci_range *mem_space)
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{
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int err;
|
|
|
|
|
|
|
|
|
|
debugf("Processing PCI node: %x\n", node);
|
|
|
|
|
if ((err = mv_pci_ranges_decode(node, io_space, mem_space)) != 0) {
|
|
|
|
|
debugf("could not decode parent PCI node 'ranges'\n");
|
|
|
|
|
return (err);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
debugf("Post fixup dump:\n");
|
|
|
|
|
mv_pci_range_dump(io_space);
|
|
|
|
|
mv_pci_range_dump(mem_space);
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
mv_pci_devmap(phandle_t node, struct arm_devmap_entry *devmap, vm_offset_t io_va,
|
|
|
|
|
vm_offset_t mem_va)
|
|
|
|
|
{
|
|
|
|
|
struct mv_pci_range io_space, mem_space;
|
|
|
|
|
int error;
|
|
|
|
|
|
|
|
|
|
if ((error = mv_pci_ranges_decode(node, &io_space, &mem_space)) != 0)
|
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
|
|
devmap->pd_va = (io_va ? io_va : io_space.base_parent);
|
|
|
|
|
devmap->pd_pa = io_space.base_parent;
|
|
|
|
|
devmap->pd_size = io_space.len;
|
|
|
|
|
devmap->pd_prot = VM_PROT_READ | VM_PROT_WRITE;
|
2014-05-18 00:32:35 +00:00
|
|
|
devmap->pd_cache = PTE_DEVICE;
|
MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375
Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.
In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0
In pmap_mapdev(), first check whether a static mapping exists,
Convert TI static device mapping to use the new arm_devmap_add_entry(),
Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.
Eliminate use of fdt_immr_addr(), it's not needed for tegra
Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.
Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
Add #include <machine/fdt.h> to a few files that used to get it via pollution
Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.
Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.
Switch RPi to using arm_devmap_add_entry() to set up static device mapping.
Allow 'no static device mappings' to potentially work.
Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.
Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
2014-05-14 19:18:58 +00:00
|
|
|
devmap++;
|
|
|
|
|
|
|
|
|
|
devmap->pd_va = (mem_va ? mem_va : mem_space.base_parent);
|
|
|
|
|
devmap->pd_pa = mem_space.base_parent;
|
|
|
|
|
devmap->pd_size = mem_space.len;
|
|
|
|
|
devmap->pd_prot = VM_PROT_READ | VM_PROT_WRITE;
|
2014-05-18 00:32:35 +00:00
|
|
|
devmap->pd_cache = PTE_DEVICE;
|
MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375
Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.
In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0
In pmap_mapdev(), first check whether a static mapping exists,
Convert TI static device mapping to use the new arm_devmap_add_entry(),
Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.
Eliminate use of fdt_immr_addr(), it's not needed for tegra
Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.
Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
Add #include <machine/fdt.h> to a few files that used to get it via pollution
Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.
Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.
Switch RPi to using arm_devmap_add_entry() to set up static device mapping.
Allow 'no static device mappings' to potentially work.
Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.
Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
2014-05-14 19:18:58 +00:00
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Code and data related to the Marvell pcib driver.
|
|
|
|
|
*/
|
|
|
|
|
|
2014-02-04 03:36:42 +00:00
|
|
|
#define PCI_CFG_ENA (1U << 31)
|
2008-11-19 11:30:44 +00:00
|
|
|
#define PCI_CFG_BUS(bus) (((bus) & 0xff) << 16)
|
|
|
|
|
#define PCI_CFG_DEV(dev) (((dev) & 0x1f) << 11)
|
|
|
|
|
#define PCI_CFG_FUN(fun) (((fun) & 0x7) << 8)
|
|
|
|
|
#define PCI_CFG_PCIE_REG(reg) ((reg) & 0xfc)
|
|
|
|
|
|
|
|
|
|
#define PCI_REG_CFG_ADDR 0x0C78
|
|
|
|
|
#define PCI_REG_CFG_DATA 0x0C7C
|
|
|
|
|
|
|
|
|
|
#define PCIE_REG_CFG_ADDR 0x18F8
|
|
|
|
|
#define PCIE_REG_CFG_DATA 0x18FC
|
|
|
|
|
#define PCIE_REG_CONTROL 0x1A00
|
|
|
|
|
#define PCIE_CTRL_LINK1X 0x00000001
|
|
|
|
|
#define PCIE_REG_STATUS 0x1A04
|
|
|
|
|
#define PCIE_REG_IRQ_MASK 0x1910
|
|
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
#define PCIE_CONTROL_ROOT_CMPLX (1 << 1)
|
|
|
|
|
#define PCIE_CONTROL_HOT_RESET (1 << 24)
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
#define PCIE_LINK_TIMEOUT 1000000
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
#define PCIE_STATUS_LINK_DOWN 1
|
|
|
|
|
#define PCIE_STATUS_DEV_OFFS 16
|
|
|
|
|
|
|
|
|
|
/* Minimum PCI Memory and I/O allocations taken from PCI spec (in bytes) */
|
|
|
|
|
#define PCI_MIN_IO_ALLOC 4
|
|
|
|
|
#define PCI_MIN_MEM_ALLOC 16
|
|
|
|
|
|
|
|
|
|
#define BITS_PER_UINT32 (NBBY * sizeof(uint32_t))
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
struct mv_pcib_softc {
|
2008-11-19 11:30:44 +00:00
|
|
|
device_t sc_dev;
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
struct rman sc_mem_rman;
|
|
|
|
|
bus_addr_t sc_mem_base;
|
|
|
|
|
bus_addr_t sc_mem_size;
|
2012-09-14 09:57:41 +00:00
|
|
|
uint32_t sc_mem_map[MV_PCI_MEM_SLICE_SIZE /
|
|
|
|
|
(PCI_MIN_MEM_ALLOC * BITS_PER_UINT32)];
|
|
|
|
|
int sc_win_target;
|
2010-06-13 13:28:53 +00:00
|
|
|
int sc_mem_win_attr;
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
struct rman sc_io_rman;
|
|
|
|
|
bus_addr_t sc_io_base;
|
|
|
|
|
bus_addr_t sc_io_size;
|
2012-09-14 09:57:41 +00:00
|
|
|
uint32_t sc_io_map[MV_PCI_IO_SLICE_SIZE /
|
|
|
|
|
(PCI_MIN_IO_ALLOC * BITS_PER_UINT32)];
|
2010-06-13 13:28:53 +00:00
|
|
|
int sc_io_win_attr;
|
2008-11-19 11:30:44 +00:00
|
|
|
|
|
|
|
|
struct resource *sc_res;
|
|
|
|
|
bus_space_handle_t sc_bsh;
|
|
|
|
|
bus_space_tag_t sc_bst;
|
|
|
|
|
int sc_rid;
|
|
|
|
|
|
2012-09-14 10:06:56 +00:00
|
|
|
struct mtx sc_msi_mtx;
|
|
|
|
|
uint32_t sc_msi_bitmap;
|
|
|
|
|
|
2008-11-19 11:30:44 +00:00
|
|
|
int sc_busnr; /* Host bridge bus number */
|
|
|
|
|
int sc_devnr; /* Host bridge device number */
|
2010-06-13 13:28:53 +00:00
|
|
|
int sc_type;
|
2012-09-14 09:57:41 +00:00
|
|
|
int sc_mode; /* Endpoint / Root Complex */
|
2008-11-19 11:30:44 +00:00
|
|
|
|
MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,
r259199, r259484, r259513, r259514, r259516
The kernel stack guard pages are only below the stack pointer, not above.
Remove unnecessary double-setting of the thread's onfault state in
copyinstr().
Open Firmware mandates that certain cross-references, in particular those
in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles,
since FDT has no concept of ihandles. Have the OF FDT CI module interpret
queries about ihandles as cross-reference phandles.
Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use
the right type.
Rearchitect platform memory map parsing to make it less
Open Firmware-centric.
Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
this file is also slated for future demolition.
Return the correct IEEE 1275 code for "nextprop".
Use the common Open Firmware PCI interrupt routing code instead of the
duplicate version in dev/fdt.
Configure interrupt sense based on device tree information.
Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
internally instead of requiring the caller to allocate it.
2014-05-14 14:17:51 +00:00
|
|
|
struct ofw_bus_iinfo sc_pci_iinfo;
|
2008-11-19 11:30:44 +00:00
|
|
|
};
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
/* Local forward prototypes */
|
|
|
|
|
static int mv_pcib_decode_win(phandle_t, struct mv_pcib_softc *);
|
|
|
|
|
static void mv_pcib_hw_cfginit(void);
|
|
|
|
|
static uint32_t mv_pcib_hw_cfgread(struct mv_pcib_softc *, u_int, u_int,
|
|
|
|
|
u_int, u_int, int);
|
|
|
|
|
static void mv_pcib_hw_cfgwrite(struct mv_pcib_softc *, u_int, u_int,
|
|
|
|
|
u_int, u_int, uint32_t, int);
|
|
|
|
|
static int mv_pcib_init(struct mv_pcib_softc *, int, int);
|
|
|
|
|
static int mv_pcib_init_all_bars(struct mv_pcib_softc *, int, int, int, int);
|
|
|
|
|
static void mv_pcib_init_bridge(struct mv_pcib_softc *, int, int, int);
|
|
|
|
|
static inline void pcib_write_irq_mask(struct mv_pcib_softc *, uint32_t);
|
2012-09-14 09:57:41 +00:00
|
|
|
static void mv_pcib_enable(struct mv_pcib_softc *, uint32_t);
|
|
|
|
|
static int mv_pcib_mem_init(struct mv_pcib_softc *);
|
2010-06-13 13:28:53 +00:00
|
|
|
|
|
|
|
|
/* Forward prototypes */
|
|
|
|
|
static int mv_pcib_probe(device_t);
|
|
|
|
|
static int mv_pcib_attach(device_t);
|
|
|
|
|
|
|
|
|
|
static struct resource *mv_pcib_alloc_resource(device_t, device_t, int, int *,
|
2008-11-19 11:30:44 +00:00
|
|
|
u_long, u_long, u_long, u_int);
|
2010-06-13 13:28:53 +00:00
|
|
|
static int mv_pcib_release_resource(device_t, device_t, int, int,
|
2008-11-19 11:30:44 +00:00
|
|
|
struct resource *);
|
2010-06-13 13:28:53 +00:00
|
|
|
static int mv_pcib_read_ivar(device_t, device_t, int, uintptr_t *);
|
|
|
|
|
static int mv_pcib_write_ivar(device_t, device_t, int, uintptr_t);
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
static int mv_pcib_maxslots(device_t);
|
|
|
|
|
static uint32_t mv_pcib_read_config(device_t, u_int, u_int, u_int, u_int, int);
|
|
|
|
|
static void mv_pcib_write_config(device_t, u_int, u_int, u_int, u_int,
|
2008-11-19 11:30:44 +00:00
|
|
|
uint32_t, int);
|
2010-06-13 13:28:53 +00:00
|
|
|
static int mv_pcib_route_interrupt(device_t, device_t, int);
|
2012-09-14 10:06:56 +00:00
|
|
|
#if defined(SOC_MV_ARMADAXP)
|
|
|
|
|
static int mv_pcib_alloc_msi(device_t, device_t, int, int, int *);
|
|
|
|
|
static int mv_pcib_map_msi(device_t, device_t, int, uint64_t *, uint32_t *);
|
|
|
|
|
static int mv_pcib_release_msi(device_t, device_t, int, int *);
|
|
|
|
|
#endif
|
2008-11-19 11:30:44 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Bus interface definitions.
|
|
|
|
|
*/
|
2010-06-13 13:28:53 +00:00
|
|
|
static device_method_t mv_pcib_methods[] = {
|
2008-11-19 11:30:44 +00:00
|
|
|
/* Device interface */
|
2010-06-13 13:28:53 +00:00
|
|
|
DEVMETHOD(device_probe, mv_pcib_probe),
|
|
|
|
|
DEVMETHOD(device_attach, mv_pcib_attach),
|
2008-11-19 11:30:44 +00:00
|
|
|
|
|
|
|
|
/* Bus interface */
|
2010-06-13 13:28:53 +00:00
|
|
|
DEVMETHOD(bus_read_ivar, mv_pcib_read_ivar),
|
|
|
|
|
DEVMETHOD(bus_write_ivar, mv_pcib_write_ivar),
|
|
|
|
|
DEVMETHOD(bus_alloc_resource, mv_pcib_alloc_resource),
|
|
|
|
|
DEVMETHOD(bus_release_resource, mv_pcib_release_resource),
|
2008-11-19 11:30:44 +00:00
|
|
|
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
|
|
|
|
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
|
|
|
|
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
|
|
|
|
|
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
|
|
|
|
|
|
|
|
|
|
/* pcib interface */
|
2010-06-13 13:28:53 +00:00
|
|
|
DEVMETHOD(pcib_maxslots, mv_pcib_maxslots),
|
|
|
|
|
DEVMETHOD(pcib_read_config, mv_pcib_read_config),
|
|
|
|
|
DEVMETHOD(pcib_write_config, mv_pcib_write_config),
|
|
|
|
|
DEVMETHOD(pcib_route_interrupt, mv_pcib_route_interrupt),
|
2012-09-14 10:06:56 +00:00
|
|
|
|
|
|
|
|
#if defined(SOC_MV_ARMADAXP)
|
|
|
|
|
DEVMETHOD(pcib_alloc_msi, mv_pcib_alloc_msi),
|
|
|
|
|
DEVMETHOD(pcib_release_msi, mv_pcib_release_msi),
|
|
|
|
|
DEVMETHOD(pcib_map_msi, mv_pcib_map_msi),
|
|
|
|
|
#endif
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
/* OFW bus interface */
|
|
|
|
|
DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
|
|
|
|
|
DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
|
|
|
|
|
DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
|
|
|
|
|
DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
|
|
|
|
|
DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2011-11-22 21:28:20 +00:00
|
|
|
DEVMETHOD_END
|
2008-11-19 11:30:44 +00:00
|
|
|
};
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
static driver_t mv_pcib_driver = {
|
2008-11-19 11:30:44 +00:00
|
|
|
"pcib",
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_methods,
|
|
|
|
|
sizeof(struct mv_pcib_softc),
|
2008-11-19 11:30:44 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
devclass_t pcib_devclass;
|
|
|
|
|
|
MFC r261423, r261424, r261516, r261513, r261562, r261563, r261564, r261565,
r261596, r261606
Add the imx sdhci controller.
Move Open Firmware device root on PowerPC, ARM, and MIPS systems to
a sub-node of nexus (ofwbus) rather than direct attach under nexus. This
fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier.
SPARC is unchanged.
Add the missing ')' at end of sentence. Reword it to use a more common idiom.
Pass the kernel physical address to initarm through the boot param struct.
Make functions only used in vfp.c static, and remove vfp_enable.
Fix __syscall on armeb EABI. As it returns a 64-bit value it needs to
place 32-bit data in r1, not r0. 64-bit data is already packed correctly.
Use abp_physaddr for the physical address over KERNPHYSADDR. This helps us
remove the need to load the kernel at a fixed address.
Remove references to PHYSADDR where it's used only in debugging output.
Dynamically generate the page table. This will allow us to detect the
physical address we are loaded at to change the mapping.
2014-05-15 17:30:16 +00:00
|
|
|
DRIVER_MODULE(pcib, ofwbus, mv_pcib_driver, pcib_devclass, 0, 0);
|
2008-11-19 11:30:44 +00:00
|
|
|
|
|
|
|
|
static struct mtx pcicfg_mtx;
|
|
|
|
|
|
|
|
|
|
static int
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_probe(device_t self)
|
2008-11-19 11:30:44 +00:00
|
|
|
{
|
2011-02-03 18:07:05 +00:00
|
|
|
phandle_t node;
|
2010-06-13 13:28:53 +00:00
|
|
|
|
2011-02-03 18:07:05 +00:00
|
|
|
node = ofw_bus_get_node(self);
|
|
|
|
|
if (!fdt_is_type(node, "pci"))
|
2010-06-13 13:28:53 +00:00
|
|
|
return (ENXIO);
|
2011-02-03 18:07:05 +00:00
|
|
|
|
MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,
r259199, r259484, r259513, r259514, r259516
The kernel stack guard pages are only below the stack pointer, not above.
Remove unnecessary double-setting of the thread's onfault state in
copyinstr().
Open Firmware mandates that certain cross-references, in particular those
in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles,
since FDT has no concept of ihandles. Have the OF FDT CI module interpret
queries about ihandles as cross-reference phandles.
Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use
the right type.
Rearchitect platform memory map parsing to make it less
Open Firmware-centric.
Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
this file is also slated for future demolition.
Return the correct IEEE 1275 code for "nextprop".
Use the common Open Firmware PCI interrupt routing code instead of the
duplicate version in dev/fdt.
Configure interrupt sense based on device tree information.
Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
internally instead of requiring the caller to allocate it.
2014-05-14 14:17:51 +00:00
|
|
|
if (!(ofw_bus_is_compatible(self, "mrvl,pcie") ||
|
|
|
|
|
ofw_bus_is_compatible(self, "mrvl,pci")))
|
2010-06-13 13:28:53 +00:00
|
|
|
return (ENXIO);
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
device_set_desc(self, "Marvell Integrated PCI/PCI-E Controller");
|
|
|
|
|
return (BUS_PROBE_DEFAULT);
|
2008-11-19 11:30:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_attach(device_t self)
|
2008-11-19 11:30:44 +00:00
|
|
|
{
|
2010-06-13 13:28:53 +00:00
|
|
|
struct mv_pcib_softc *sc;
|
|
|
|
|
phandle_t node, parnode;
|
2012-09-14 09:57:41 +00:00
|
|
|
uint32_t val, unit;
|
2010-06-13 13:28:53 +00:00
|
|
|
int err;
|
2008-11-19 11:30:44 +00:00
|
|
|
|
|
|
|
|
sc = device_get_softc(self);
|
2010-06-13 13:28:53 +00:00
|
|
|
sc->sc_dev = self;
|
2012-09-14 09:57:41 +00:00
|
|
|
unit = fdt_get_unit(self);
|
|
|
|
|
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2011-02-03 18:07:05 +00:00
|
|
|
node = ofw_bus_get_node(self);
|
|
|
|
|
parnode = OF_parent(node);
|
|
|
|
|
if (fdt_is_compatible(node, "mrvl,pcie")) {
|
2010-06-13 13:28:53 +00:00
|
|
|
sc->sc_type = MV_TYPE_PCIE;
|
2012-09-14 09:57:41 +00:00
|
|
|
sc->sc_win_target = MV_WIN_PCIE_TARGET(unit);
|
|
|
|
|
sc->sc_mem_win_attr = MV_WIN_PCIE_MEM_ATTR(unit);
|
|
|
|
|
sc->sc_io_win_attr = MV_WIN_PCIE_IO_ATTR(unit);
|
2011-02-03 18:07:05 +00:00
|
|
|
} else if (fdt_is_compatible(node, "mrvl,pci")) {
|
2010-06-13 13:28:53 +00:00
|
|
|
sc->sc_type = MV_TYPE_PCI;
|
2012-09-14 09:57:41 +00:00
|
|
|
sc->sc_win_target = MV_WIN_PCI_TARGET;
|
2010-06-13 13:28:53 +00:00
|
|
|
sc->sc_mem_win_attr = MV_WIN_PCI_MEM_ATTR;
|
|
|
|
|
sc->sc_io_win_attr = MV_WIN_PCI_IO_ATTR;
|
|
|
|
|
} else
|
2008-11-19 11:30:44 +00:00
|
|
|
return (ENXIO);
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
/*
|
|
|
|
|
* Retrieve our mem-mapped registers range.
|
|
|
|
|
*/
|
2008-11-19 11:30:44 +00:00
|
|
|
sc->sc_rid = 0;
|
|
|
|
|
sc->sc_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &sc->sc_rid,
|
|
|
|
|
RF_ACTIVE);
|
|
|
|
|
if (sc->sc_res == NULL) {
|
2010-06-13 13:28:53 +00:00
|
|
|
device_printf(self, "could not map memory\n");
|
2008-11-19 11:30:44 +00:00
|
|
|
return (ENXIO);
|
|
|
|
|
}
|
|
|
|
|
sc->sc_bst = rman_get_bustag(sc->sc_res);
|
|
|
|
|
sc->sc_bsh = rman_get_bushandle(sc->sc_res);
|
|
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_CONTROL);
|
|
|
|
|
sc->sc_mode = (val & PCIE_CONTROL_ROOT_CMPLX ? MV_MODE_ROOT :
|
|
|
|
|
MV_MODE_ENDPOINT);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Get PCI interrupt info.
|
|
|
|
|
*/
|
MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,
r259199, r259484, r259513, r259514, r259516
The kernel stack guard pages are only below the stack pointer, not above.
Remove unnecessary double-setting of the thread's onfault state in
copyinstr().
Open Firmware mandates that certain cross-references, in particular those
in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles,
since FDT has no concept of ihandles. Have the OF FDT CI module interpret
queries about ihandles as cross-reference phandles.
Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use
the right type.
Rearchitect platform memory map parsing to make it less
Open Firmware-centric.
Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
this file is also slated for future demolition.
Return the correct IEEE 1275 code for "nextprop".
Use the common Open Firmware PCI interrupt routing code instead of the
duplicate version in dev/fdt.
Configure interrupt sense based on device tree information.
Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
internally instead of requiring the caller to allocate it.
2014-05-14 14:17:51 +00:00
|
|
|
if (sc->sc_mode == MV_MODE_ROOT)
|
|
|
|
|
ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(pcell_t));
|
2012-09-14 09:57:41 +00:00
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
/*
|
|
|
|
|
* Configure decode windows for PCI(E) access.
|
|
|
|
|
*/
|
|
|
|
|
if (mv_pcib_decode_win(node, sc) != 0)
|
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
|
|
mv_pcib_hw_cfginit();
|
|
|
|
|
|
|
|
|
|
/*
|
2012-09-14 09:57:41 +00:00
|
|
|
* Enable PCIE device.
|
2010-06-13 13:28:53 +00:00
|
|
|
*/
|
2012-09-14 09:57:41 +00:00
|
|
|
mv_pcib_enable(sc, unit);
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
/*
|
|
|
|
|
* Memory management.
|
|
|
|
|
*/
|
|
|
|
|
err = mv_pcib_mem_init(sc);
|
|
|
|
|
if (err)
|
|
|
|
|
return (err);
|
|
|
|
|
|
|
|
|
|
if (sc->sc_mode == MV_MODE_ROOT) {
|
|
|
|
|
err = mv_pcib_init(sc, sc->sc_busnr,
|
|
|
|
|
mv_pcib_maxslots(sc->sc_dev));
|
|
|
|
|
if (err)
|
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
|
|
device_add_child(self, "pci", -1);
|
|
|
|
|
} else {
|
|
|
|
|
sc->sc_devnr = 1;
|
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh,
|
|
|
|
|
PCIE_REG_STATUS, 1 << PCIE_STATUS_DEV_OFFS);
|
|
|
|
|
device_add_child(self, "pci_ep", -1);
|
|
|
|
|
}
|
|
|
|
|
|
2012-09-14 10:06:56 +00:00
|
|
|
mtx_init(&sc->sc_msi_mtx, "msi_mtx", NULL, MTX_DEF);
|
2012-09-14 09:57:41 +00:00
|
|
|
return (bus_generic_attach(self));
|
|
|
|
|
|
|
|
|
|
error:
|
|
|
|
|
/* XXX SYS_RES_ should be released here */
|
|
|
|
|
rman_fini(&sc->sc_mem_rman);
|
|
|
|
|
rman_fini(&sc->sc_io_rman);
|
|
|
|
|
|
|
|
|
|
return (err);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
mv_pcib_enable(struct mv_pcib_softc *sc, uint32_t unit)
|
|
|
|
|
{
|
|
|
|
|
uint32_t val;
|
|
|
|
|
#if !defined(SOC_MV_ARMADAXP)
|
|
|
|
|
int timeout;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Check if PCIE device is enabled.
|
|
|
|
|
*/
|
|
|
|
|
if (read_cpu_ctrl(CPU_CONTROL) & CPU_CONTROL_PCIE_DISABLE(unit)) {
|
|
|
|
|
write_cpu_ctrl(CPU_CONTROL, read_cpu_ctrl(CPU_CONTROL) &
|
|
|
|
|
~(CPU_CONTROL_PCIE_DISABLE(unit)));
|
|
|
|
|
|
|
|
|
|
timeout = PCIE_LINK_TIMEOUT;
|
|
|
|
|
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
|
|
|
|
|
PCIE_REG_STATUS);
|
|
|
|
|
while (((val & PCIE_STATUS_LINK_DOWN) == 1) && (timeout > 0)) {
|
|
|
|
|
DELAY(1000);
|
|
|
|
|
timeout -= 1000;
|
|
|
|
|
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
|
|
|
|
|
PCIE_REG_STATUS);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
if (sc->sc_mode == MV_MODE_ROOT) {
|
|
|
|
|
/*
|
|
|
|
|
* Enable PCI bridge.
|
|
|
|
|
*/
|
|
|
|
|
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIR_COMMAND);
|
|
|
|
|
val |= PCIM_CMD_SERRESPEN | PCIM_CMD_BUSMASTEREN |
|
|
|
|
|
PCIM_CMD_MEMEN | PCIM_CMD_PORTEN;
|
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, PCIR_COMMAND, val);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
mv_pcib_mem_init(struct mv_pcib_softc *sc)
|
|
|
|
|
{
|
|
|
|
|
int err;
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
/*
|
|
|
|
|
* Memory management.
|
|
|
|
|
*/
|
2010-06-13 13:28:53 +00:00
|
|
|
sc->sc_mem_rman.rm_type = RMAN_ARRAY;
|
|
|
|
|
err = rman_init(&sc->sc_mem_rman);
|
2009-01-09 10:20:51 +00:00
|
|
|
if (err)
|
|
|
|
|
return (err);
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
sc->sc_io_rman.rm_type = RMAN_ARRAY;
|
|
|
|
|
err = rman_init(&sc->sc_io_rman);
|
2009-01-09 10:20:51 +00:00
|
|
|
if (err) {
|
2010-06-13 13:28:53 +00:00
|
|
|
rman_fini(&sc->sc_mem_rman);
|
2009-01-09 10:20:51 +00:00
|
|
|
return (err);
|
|
|
|
|
}
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
err = rman_manage_region(&sc->sc_mem_rman, sc->sc_mem_base,
|
|
|
|
|
sc->sc_mem_base + sc->sc_mem_size - 1);
|
2009-01-09 10:20:51 +00:00
|
|
|
if (err)
|
|
|
|
|
goto error;
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
err = rman_manage_region(&sc->sc_io_rman, sc->sc_io_base,
|
|
|
|
|
sc->sc_io_base + sc->sc_io_size - 1);
|
2009-01-09 10:20:51 +00:00
|
|
|
if (err)
|
|
|
|
|
goto error;
|
|
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
return (0);
|
2009-01-09 10:20:51 +00:00
|
|
|
|
|
|
|
|
error:
|
2010-06-13 13:28:53 +00:00
|
|
|
rman_fini(&sc->sc_mem_rman);
|
|
|
|
|
rman_fini(&sc->sc_io_rman);
|
2012-09-14 09:57:41 +00:00
|
|
|
|
2009-01-09 10:20:51 +00:00
|
|
|
return (err);
|
2008-11-19 11:30:44 +00:00
|
|
|
}
|
|
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
static inline uint32_t
|
|
|
|
|
pcib_bit_get(uint32_t *map, uint32_t bit)
|
|
|
|
|
{
|
|
|
|
|
uint32_t n = bit / BITS_PER_UINT32;
|
|
|
|
|
|
|
|
|
|
bit = bit % BITS_PER_UINT32;
|
|
|
|
|
return (map[n] & (1 << bit));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
pcib_bit_set(uint32_t *map, uint32_t bit)
|
|
|
|
|
{
|
|
|
|
|
uint32_t n = bit / BITS_PER_UINT32;
|
|
|
|
|
|
|
|
|
|
bit = bit % BITS_PER_UINT32;
|
|
|
|
|
map[n] |= (1 << bit);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline uint32_t
|
|
|
|
|
pcib_map_check(uint32_t *map, uint32_t start, uint32_t bits)
|
|
|
|
|
{
|
|
|
|
|
uint32_t i;
|
|
|
|
|
|
|
|
|
|
for (i = start; i < start + bits; i++)
|
|
|
|
|
if (pcib_bit_get(map, i))
|
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
|
|
return (1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
pcib_map_set(uint32_t *map, uint32_t start, uint32_t bits)
|
|
|
|
|
{
|
|
|
|
|
uint32_t i;
|
|
|
|
|
|
|
|
|
|
for (i = start; i < start + bits; i++)
|
|
|
|
|
pcib_bit_set(map, i);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* The idea of this allocator is taken from ARM No-Cache memory
|
|
|
|
|
* management code (sys/arm/arm/vm_machdep.c).
|
|
|
|
|
*/
|
|
|
|
|
static bus_addr_t
|
|
|
|
|
pcib_alloc(struct mv_pcib_softc *sc, uint32_t smask)
|
|
|
|
|
{
|
|
|
|
|
uint32_t bits, bits_limit, i, *map, min_alloc, size;
|
|
|
|
|
bus_addr_t addr = 0;
|
|
|
|
|
bus_addr_t base;
|
|
|
|
|
|
|
|
|
|
if (smask & 1) {
|
|
|
|
|
base = sc->sc_io_base;
|
|
|
|
|
min_alloc = PCI_MIN_IO_ALLOC;
|
|
|
|
|
bits_limit = sc->sc_io_size / min_alloc;
|
|
|
|
|
map = sc->sc_io_map;
|
|
|
|
|
smask &= ~0x3;
|
|
|
|
|
} else {
|
|
|
|
|
base = sc->sc_mem_base;
|
|
|
|
|
min_alloc = PCI_MIN_MEM_ALLOC;
|
|
|
|
|
bits_limit = sc->sc_mem_size / min_alloc;
|
|
|
|
|
map = sc->sc_mem_map;
|
|
|
|
|
smask &= ~0xF;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
size = ~smask + 1;
|
|
|
|
|
bits = size / min_alloc;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i + bits <= bits_limit; i += bits)
|
|
|
|
|
if (pcib_map_check(map, i, bits)) {
|
|
|
|
|
pcib_map_set(map, i, bits);
|
|
|
|
|
addr = base + (i * min_alloc);
|
|
|
|
|
return (addr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return (addr);
|
|
|
|
|
}
|
|
|
|
|
|
2008-11-19 11:30:44 +00:00
|
|
|
static int
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_init_bar(struct mv_pcib_softc *sc, int bus, int slot, int func,
|
2008-11-19 11:30:44 +00:00
|
|
|
int barno)
|
|
|
|
|
{
|
2012-09-14 09:57:41 +00:00
|
|
|
uint32_t addr, bar;
|
2008-11-19 11:30:44 +00:00
|
|
|
int reg, width;
|
|
|
|
|
|
|
|
|
|
reg = PCIR_BAR(barno);
|
2012-09-14 09:57:41 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Need to init the BAR register with 0xffffffff before correct
|
|
|
|
|
* value can be read.
|
|
|
|
|
*/
|
|
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, reg, ~0, 4);
|
2010-06-13 13:28:53 +00:00
|
|
|
bar = mv_pcib_read_config(sc->sc_dev, bus, slot, func, reg, 4);
|
2008-11-19 11:30:44 +00:00
|
|
|
if (bar == 0)
|
|
|
|
|
return (1);
|
|
|
|
|
|
|
|
|
|
/* Calculate BAR size: 64 or 32 bit (in 32-bit units) */
|
|
|
|
|
width = ((bar & 7) == 4) ? 2 : 1;
|
|
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
addr = pcib_alloc(sc, bar);
|
|
|
|
|
if (!addr)
|
2008-11-19 11:30:44 +00:00
|
|
|
return (-1);
|
|
|
|
|
|
|
|
|
|
if (bootverbose)
|
2012-09-14 09:57:41 +00:00
|
|
|
printf("PCI %u:%u:%u: reg %x: smask=%08x: addr=%08x\n",
|
|
|
|
|
bus, slot, func, reg, bar, addr);
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, reg, addr, 4);
|
2008-11-19 11:30:44 +00:00
|
|
|
if (width == 2)
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, reg + 4,
|
2008-11-19 11:30:44 +00:00
|
|
|
0, 4);
|
|
|
|
|
|
|
|
|
|
return (width);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_init_bridge(struct mv_pcib_softc *sc, int bus, int slot, int func)
|
2008-11-19 11:30:44 +00:00
|
|
|
{
|
|
|
|
|
bus_addr_t io_base, mem_base;
|
|
|
|
|
uint32_t io_limit, mem_limit;
|
|
|
|
|
int secbus;
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
io_base = sc->sc_io_base;
|
|
|
|
|
io_limit = io_base + sc->sc_io_size - 1;
|
|
|
|
|
mem_base = sc->sc_mem_base;
|
|
|
|
|
mem_limit = mem_base + sc->sc_mem_size - 1;
|
2008-11-19 11:30:44 +00:00
|
|
|
|
|
|
|
|
/* Configure I/O decode registers */
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_IOBASEL_1,
|
2008-12-05 15:27:28 +00:00
|
|
|
io_base >> 8, 1);
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_IOBASEH_1,
|
2008-12-05 15:27:28 +00:00
|
|
|
io_base >> 16, 2);
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_IOLIMITL_1,
|
2008-11-19 11:30:44 +00:00
|
|
|
io_limit >> 8, 1);
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_IOLIMITH_1,
|
2008-11-19 11:30:44 +00:00
|
|
|
io_limit >> 16, 2);
|
|
|
|
|
|
|
|
|
|
/* Configure memory decode registers */
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_MEMBASE_1,
|
2008-11-19 11:30:44 +00:00
|
|
|
mem_base >> 16, 2);
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_MEMLIMIT_1,
|
2008-11-19 11:30:44 +00:00
|
|
|
mem_limit >> 16, 2);
|
|
|
|
|
|
|
|
|
|
/* Disable memory prefetch decode */
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_PMBASEL_1,
|
2008-11-19 11:30:44 +00:00
|
|
|
0x10, 2);
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_PMBASEH_1,
|
2008-11-19 11:30:44 +00:00
|
|
|
0x0, 4);
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_PMLIMITL_1,
|
2008-11-19 11:30:44 +00:00
|
|
|
0xF, 2);
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func, PCIR_PMLIMITH_1,
|
2008-11-19 11:30:44 +00:00
|
|
|
0x0, 4);
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
secbus = mv_pcib_read_config(sc->sc_dev, bus, slot, func,
|
2008-11-19 11:30:44 +00:00
|
|
|
PCIR_SECBUS_1, 1);
|
|
|
|
|
|
|
|
|
|
/* Configure buses behind the bridge */
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_init(sc, secbus, PCI_SLOTMAX);
|
2008-11-19 11:30:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_init(struct mv_pcib_softc *sc, int bus, int maxslot)
|
2008-11-19 11:30:44 +00:00
|
|
|
{
|
|
|
|
|
int slot, func, maxfunc, error;
|
|
|
|
|
uint8_t hdrtype, command, class, subclass;
|
|
|
|
|
|
|
|
|
|
for (slot = 0; slot <= maxslot; slot++) {
|
|
|
|
|
maxfunc = 0;
|
|
|
|
|
for (func = 0; func <= maxfunc; func++) {
|
2010-06-13 13:28:53 +00:00
|
|
|
hdrtype = mv_pcib_read_config(sc->sc_dev, bus, slot,
|
2008-11-19 11:30:44 +00:00
|
|
|
func, PCIR_HDRTYPE, 1);
|
|
|
|
|
|
|
|
|
|
if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (func == 0 && (hdrtype & PCIM_MFDEV))
|
|
|
|
|
maxfunc = PCI_FUNCMAX;
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
command = mv_pcib_read_config(sc->sc_dev, bus, slot,
|
2008-11-19 11:30:44 +00:00
|
|
|
func, PCIR_COMMAND, 1);
|
|
|
|
|
command &= ~(PCIM_CMD_MEMEN | PCIM_CMD_PORTEN);
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func,
|
2008-11-19 11:30:44 +00:00
|
|
|
PCIR_COMMAND, command, 1);
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
error = mv_pcib_init_all_bars(sc, bus, slot, func,
|
2008-11-19 11:30:44 +00:00
|
|
|
hdrtype);
|
|
|
|
|
|
|
|
|
|
if (error)
|
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
|
|
command |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN |
|
|
|
|
|
PCIM_CMD_PORTEN;
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_config(sc->sc_dev, bus, slot, func,
|
2008-11-19 11:30:44 +00:00
|
|
|
PCIR_COMMAND, command, 1);
|
|
|
|
|
|
|
|
|
|
/* Handle PCI-PCI bridges */
|
2010-06-13 13:28:53 +00:00
|
|
|
class = mv_pcib_read_config(sc->sc_dev, bus, slot,
|
2008-11-19 11:30:44 +00:00
|
|
|
func, PCIR_CLASS, 1);
|
2010-06-13 13:28:53 +00:00
|
|
|
subclass = mv_pcib_read_config(sc->sc_dev, bus, slot,
|
2008-11-19 11:30:44 +00:00
|
|
|
func, PCIR_SUBCLASS, 1);
|
|
|
|
|
|
|
|
|
|
if (class != PCIC_BRIDGE ||
|
|
|
|
|
subclass != PCIS_BRIDGE_PCI)
|
|
|
|
|
continue;
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_init_bridge(sc, bus, slot, func);
|
2008-11-19 11:30:44 +00:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Enable all ABCD interrupts */
|
|
|
|
|
pcib_write_irq_mask(sc, (0xF << 24));
|
|
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
|
2010-06-13 13:28:53 +00:00
|
|
|
static int
|
|
|
|
|
mv_pcib_init_all_bars(struct mv_pcib_softc *sc, int bus, int slot,
|
|
|
|
|
int func, int hdrtype)
|
|
|
|
|
{
|
|
|
|
|
int maxbar, bar, i;
|
|
|
|
|
|
|
|
|
|
maxbar = (hdrtype & PCIM_HDRTYPE) ? 0 : 6;
|
|
|
|
|
bar = 0;
|
|
|
|
|
|
|
|
|
|
/* Program the base address registers */
|
|
|
|
|
while (bar < maxbar) {
|
|
|
|
|
i = mv_pcib_init_bar(sc, bus, slot, func, bar);
|
|
|
|
|
bar += i;
|
|
|
|
|
if (i < 0) {
|
|
|
|
|
device_printf(sc->sc_dev,
|
|
|
|
|
"PCI IO/Memory space exhausted\n");
|
|
|
|
|
return (ENOMEM);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
|
2008-11-19 11:30:44 +00:00
|
|
|
static struct resource *
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
2008-11-19 11:30:44 +00:00
|
|
|
u_long start, u_long end, u_long count, u_int flags)
|
|
|
|
|
{
|
2010-06-13 13:28:53 +00:00
|
|
|
struct mv_pcib_softc *sc = device_get_softc(dev);
|
2009-01-09 10:20:51 +00:00
|
|
|
struct rman *rm = NULL;
|
|
|
|
|
struct resource *res;
|
2008-11-19 11:30:44 +00:00
|
|
|
|
2009-01-09 10:20:51 +00:00
|
|
|
switch (type) {
|
|
|
|
|
case SYS_RES_IOPORT:
|
2010-06-13 13:28:53 +00:00
|
|
|
rm = &sc->sc_io_rman;
|
2009-01-09 10:20:51 +00:00
|
|
|
break;
|
|
|
|
|
case SYS_RES_MEMORY:
|
2010-06-13 13:28:53 +00:00
|
|
|
rm = &sc->sc_mem_rman;
|
2009-01-09 10:20:51 +00:00
|
|
|
break;
|
|
|
|
|
default:
|
2012-09-14 09:57:41 +00:00
|
|
|
return (BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
|
2009-01-09 10:20:51 +00:00
|
|
|
type, rid, start, end, count, flags));
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
if ((start == 0UL) && (end == ~0UL)) {
|
|
|
|
|
start = sc->sc_mem_base;
|
|
|
|
|
end = sc->sc_mem_base + sc->sc_mem_size - 1;
|
|
|
|
|
count = sc->sc_mem_size;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ((start < sc->sc_mem_base) || (start + count - 1 != end) ||
|
|
|
|
|
(end > sc->sc_mem_base + sc->sc_mem_size - 1))
|
|
|
|
|
return (NULL);
|
|
|
|
|
|
2009-01-09 10:20:51 +00:00
|
|
|
res = rman_reserve_resource(rm, start, end, count, flags, child);
|
|
|
|
|
if (res == NULL)
|
|
|
|
|
return (NULL);
|
|
|
|
|
|
|
|
|
|
rman_set_rid(res, *rid);
|
2010-06-13 13:28:53 +00:00
|
|
|
rman_set_bustag(res, fdtbus_bs_tag);
|
2009-01-09 10:20:51 +00:00
|
|
|
rman_set_bushandle(res, start);
|
|
|
|
|
|
|
|
|
|
if (flags & RF_ACTIVE)
|
|
|
|
|
if (bus_activate_resource(child, type, *rid, res)) {
|
|
|
|
|
rman_release_resource(res);
|
|
|
|
|
return (NULL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return (res);
|
2008-11-19 11:30:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_release_resource(device_t dev, device_t child, int type, int rid,
|
2008-11-19 11:30:44 +00:00
|
|
|
struct resource *res)
|
|
|
|
|
{
|
|
|
|
|
|
2009-01-09 10:20:51 +00:00
|
|
|
if (type != SYS_RES_IOPORT && type != SYS_RES_MEMORY)
|
|
|
|
|
return (BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
|
|
|
|
|
type, rid, res));
|
|
|
|
|
|
|
|
|
|
return (rman_release_resource(res));
|
2008-11-19 11:30:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
|
2008-11-19 11:30:44 +00:00
|
|
|
{
|
2010-06-13 13:28:53 +00:00
|
|
|
struct mv_pcib_softc *sc = device_get_softc(dev);
|
2008-11-19 11:30:44 +00:00
|
|
|
|
|
|
|
|
switch (which) {
|
|
|
|
|
case PCIB_IVAR_BUS:
|
|
|
|
|
*result = sc->sc_busnr;
|
|
|
|
|
return (0);
|
|
|
|
|
case PCIB_IVAR_DOMAIN:
|
|
|
|
|
*result = device_get_unit(dev);
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return (ENOENT);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
2010-06-13 13:28:53 +00:00
|
|
|
mv_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
|
2008-11-19 11:30:44 +00:00
|
|
|
{
|
2010-06-13 13:28:53 +00:00
|
|
|
struct mv_pcib_softc *sc = device_get_softc(dev);
|
2008-11-19 11:30:44 +00:00
|
|
|
|
|
|
|
|
switch (which) {
|
|
|
|
|
case PCIB_IVAR_BUS:
|
|
|
|
|
sc->sc_busnr = value;
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return (ENOENT);
|
|
|
|
|
}
|
2010-06-13 13:28:53 +00:00
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
pcib_write_irq_mask(struct mv_pcib_softc *sc, uint32_t mask)
|
|
|
|
|
{
|
|
|
|
|
|
|
|
|
|
if (!sc->sc_type != MV_TYPE_PCI)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_IRQ_MASK, mask);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
mv_pcib_hw_cfginit(void)
|
|
|
|
|
{
|
|
|
|
|
static int opened = 0;
|
|
|
|
|
|
|
|
|
|
if (opened)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
mtx_init(&pcicfg_mtx, "pcicfg", NULL, MTX_SPIN);
|
|
|
|
|
opened = 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static uint32_t
|
|
|
|
|
mv_pcib_hw_cfgread(struct mv_pcib_softc *sc, u_int bus, u_int slot,
|
|
|
|
|
u_int func, u_int reg, int bytes)
|
|
|
|
|
{
|
|
|
|
|
uint32_t addr, data, ca, cd;
|
|
|
|
|
|
|
|
|
|
ca = (sc->sc_type != MV_TYPE_PCI) ?
|
|
|
|
|
PCIE_REG_CFG_ADDR : PCI_REG_CFG_ADDR;
|
|
|
|
|
cd = (sc->sc_type != MV_TYPE_PCI) ?
|
|
|
|
|
PCIE_REG_CFG_DATA : PCI_REG_CFG_DATA;
|
|
|
|
|
addr = PCI_CFG_ENA | PCI_CFG_BUS(bus) | PCI_CFG_DEV(slot) |
|
|
|
|
|
PCI_CFG_FUN(func) | PCI_CFG_PCIE_REG(reg);
|
|
|
|
|
|
|
|
|
|
mtx_lock_spin(&pcicfg_mtx);
|
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, ca, addr);
|
|
|
|
|
|
|
|
|
|
data = ~0;
|
|
|
|
|
switch (bytes) {
|
|
|
|
|
case 1:
|
|
|
|
|
data = bus_space_read_1(sc->sc_bst, sc->sc_bsh,
|
|
|
|
|
cd + (reg & 3));
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
data = le16toh(bus_space_read_2(sc->sc_bst, sc->sc_bsh,
|
|
|
|
|
cd + (reg & 2)));
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
data = le32toh(bus_space_read_4(sc->sc_bst, sc->sc_bsh,
|
|
|
|
|
cd));
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
mtx_unlock_spin(&pcicfg_mtx);
|
|
|
|
|
return (data);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
mv_pcib_hw_cfgwrite(struct mv_pcib_softc *sc, u_int bus, u_int slot,
|
|
|
|
|
u_int func, u_int reg, uint32_t data, int bytes)
|
|
|
|
|
{
|
|
|
|
|
uint32_t addr, ca, cd;
|
|
|
|
|
|
|
|
|
|
ca = (sc->sc_type != MV_TYPE_PCI) ?
|
|
|
|
|
PCIE_REG_CFG_ADDR : PCI_REG_CFG_ADDR;
|
|
|
|
|
cd = (sc->sc_type != MV_TYPE_PCI) ?
|
|
|
|
|
PCIE_REG_CFG_DATA : PCI_REG_CFG_DATA;
|
|
|
|
|
addr = PCI_CFG_ENA | PCI_CFG_BUS(bus) | PCI_CFG_DEV(slot) |
|
|
|
|
|
PCI_CFG_FUN(func) | PCI_CFG_PCIE_REG(reg);
|
|
|
|
|
|
|
|
|
|
mtx_lock_spin(&pcicfg_mtx);
|
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, ca, addr);
|
|
|
|
|
|
|
|
|
|
switch (bytes) {
|
|
|
|
|
case 1:
|
|
|
|
|
bus_space_write_1(sc->sc_bst, sc->sc_bsh,
|
|
|
|
|
cd + (reg & 3), data);
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
bus_space_write_2(sc->sc_bst, sc->sc_bsh,
|
|
|
|
|
cd + (reg & 2), htole16(data));
|
|
|
|
|
break;
|
|
|
|
|
case 4:
|
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh,
|
|
|
|
|
cd, htole32(data));
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
mtx_unlock_spin(&pcicfg_mtx);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
mv_pcib_maxslots(device_t dev)
|
|
|
|
|
{
|
|
|
|
|
struct mv_pcib_softc *sc = device_get_softc(dev);
|
|
|
|
|
|
|
|
|
|
return ((sc->sc_type != MV_TYPE_PCI) ? 1 : PCI_SLOTMAX);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static uint32_t
|
|
|
|
|
mv_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
|
|
|
|
|
u_int reg, int bytes)
|
|
|
|
|
{
|
|
|
|
|
struct mv_pcib_softc *sc = device_get_softc(dev);
|
|
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
/* Return ~0 if link is inactive or trying to read from Root */
|
|
|
|
|
if ((bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_STATUS) &
|
|
|
|
|
PCIE_STATUS_LINK_DOWN) || (slot == 0))
|
2010-06-13 13:28:53 +00:00
|
|
|
return (~0U);
|
|
|
|
|
|
|
|
|
|
return (mv_pcib_hw_cfgread(sc, bus, slot, func, reg, bytes));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
mv_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
|
|
|
|
|
u_int reg, uint32_t val, int bytes)
|
|
|
|
|
{
|
|
|
|
|
struct mv_pcib_softc *sc = device_get_softc(dev);
|
|
|
|
|
|
2012-09-14 09:57:41 +00:00
|
|
|
/* Return if link is inactive or trying to write to Root */
|
|
|
|
|
if ((bus_space_read_4(sc->sc_bst, sc->sc_bsh, PCIE_REG_STATUS) &
|
|
|
|
|
PCIE_STATUS_LINK_DOWN) || (slot == 0))
|
2010-06-13 13:28:53 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
mv_pcib_hw_cfgwrite(sc, bus, slot, func, reg, val, bytes);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,
r259199, r259484, r259513, r259514, r259516
The kernel stack guard pages are only below the stack pointer, not above.
Remove unnecessary double-setting of the thread's onfault state in
copyinstr().
Open Firmware mandates that certain cross-references, in particular those
in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles,
since FDT has no concept of ihandles. Have the OF FDT CI module interpret
queries about ihandles as cross-reference phandles.
Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use
the right type.
Rearchitect platform memory map parsing to make it less
Open Firmware-centric.
Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
this file is also slated for future demolition.
Return the correct IEEE 1275 code for "nextprop".
Use the common Open Firmware PCI interrupt routing code instead of the
duplicate version in dev/fdt.
Configure interrupt sense based on device tree information.
Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
internally instead of requiring the caller to allocate it.
2014-05-14 14:17:51 +00:00
|
|
|
mv_pcib_route_interrupt(device_t bus, device_t dev, int pin)
|
2010-06-13 13:28:53 +00:00
|
|
|
{
|
|
|
|
|
struct mv_pcib_softc *sc;
|
MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,
r259199, r259484, r259513, r259514, r259516
The kernel stack guard pages are only below the stack pointer, not above.
Remove unnecessary double-setting of the thread's onfault state in
copyinstr().
Open Firmware mandates that certain cross-references, in particular those
in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles,
since FDT has no concept of ihandles. Have the OF FDT CI module interpret
queries about ihandles as cross-reference phandles.
Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use
the right type.
Rearchitect platform memory map parsing to make it less
Open Firmware-centric.
Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
this file is also slated for future demolition.
Return the correct IEEE 1275 code for "nextprop".
Use the common Open Firmware PCI interrupt routing code instead of the
duplicate version in dev/fdt.
Configure interrupt sense based on device tree information.
Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
internally instead of requiring the caller to allocate it.
2014-05-14 14:17:51 +00:00
|
|
|
struct ofw_pci_register reg;
|
MFC r261351, r261352, r261355, r261396, r261397, r261398, r261403, r261404,
r261405
Open Firmware interrupt specifiers can consist of arbitrary-length byte
strings and include arbitrary information (IRQ line/domain/sense). When the
ofw_bus_map_intr() API was introduced, it assumed that, as on most systems,
these were either 1 cell, containing an interrupt line, or 2, containing
a line number plus a sense code. It turns out a non-negligible number of
ARM systems use 3 (or even 4!) cells for interrupts, so make this more
general.
Provide a simpler and more standards-compliant simplebus implementation to
get the Routerboard 800 up and running with the vendor device tree. This
does not implement some BERI-specific features (which hopefully won't be
necessary soon), so move the old code to mips/beri, with a higher attach
priority when built, until MIPS interrupt domain support is rearranged.
Allow nesting of simplebuses.
Add a set of helpers (ofw_bus_get_status() and ofw_bus_status_okay()) to
process "status" properties of OF nodes.
Fix one remnant endian flaw in nexus.
2014-05-15 14:26:11 +00:00
|
|
|
uint32_t pintr, mintr[4];
|
|
|
|
|
int icells;
|
MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,
r259199, r259484, r259513, r259514, r259516
The kernel stack guard pages are only below the stack pointer, not above.
Remove unnecessary double-setting of the thread's onfault state in
copyinstr().
Open Firmware mandates that certain cross-references, in particular those
in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles,
since FDT has no concept of ihandles. Have the OF FDT CI module interpret
queries about ihandles as cross-reference phandles.
Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use
the right type.
Rearchitect platform memory map parsing to make it less
Open Firmware-centric.
Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
this file is also slated for future demolition.
Return the correct IEEE 1275 code for "nextprop".
Use the common Open Firmware PCI interrupt routing code instead of the
duplicate version in dev/fdt.
Configure interrupt sense based on device tree information.
Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
internally instead of requiring the caller to allocate it.
2014-05-14 14:17:51 +00:00
|
|
|
phandle_t iparent;
|
|
|
|
|
|
|
|
|
|
sc = device_get_softc(bus);
|
|
|
|
|
pintr = pin;
|
|
|
|
|
|
|
|
|
|
/* Fabricate imap information in case this isn't an OFW device */
|
|
|
|
|
bzero(®, sizeof(reg));
|
|
|
|
|
reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) |
|
|
|
|
|
(pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) |
|
|
|
|
|
(pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT);
|
2010-06-13 13:28:53 +00:00
|
|
|
|
MFC r261351, r261352, r261355, r261396, r261397, r261398, r261403, r261404,
r261405
Open Firmware interrupt specifiers can consist of arbitrary-length byte
strings and include arbitrary information (IRQ line/domain/sense). When the
ofw_bus_map_intr() API was introduced, it assumed that, as on most systems,
these were either 1 cell, containing an interrupt line, or 2, containing
a line number plus a sense code. It turns out a non-negligible number of
ARM systems use 3 (or even 4!) cells for interrupts, so make this more
general.
Provide a simpler and more standards-compliant simplebus implementation to
get the Routerboard 800 up and running with the vendor device tree. This
does not implement some BERI-specific features (which hopefully won't be
necessary soon), so move the old code to mips/beri, with a higher attach
priority when built, until MIPS interrupt domain support is rearranged.
Allow nesting of simplebuses.
Add a set of helpers (ofw_bus_get_status() and ofw_bus_status_okay()) to
process "status" properties of OF nodes.
Fix one remnant endian flaw in nexus.
2014-05-15 14:26:11 +00:00
|
|
|
icells = ofw_bus_lookup_imap(ofw_bus_get_node(dev), &sc->sc_pci_iinfo,
|
|
|
|
|
®, sizeof(reg), &pintr, sizeof(pintr), mintr, sizeof(mintr),
|
|
|
|
|
&iparent);
|
|
|
|
|
if (icells > 0)
|
|
|
|
|
return (ofw_bus_map_intr(dev, iparent, icells, mintr));
|
2010-06-13 13:28:53 +00:00
|
|
|
|
MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,
r259199, r259484, r259513, r259514, r259516
The kernel stack guard pages are only below the stack pointer, not above.
Remove unnecessary double-setting of the thread's onfault state in
copyinstr().
Open Firmware mandates that certain cross-references, in particular those
in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles,
since FDT has no concept of ihandles. Have the OF FDT CI module interpret
queries about ihandles as cross-reference phandles.
Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use
the right type.
Rearchitect platform memory map parsing to make it less
Open Firmware-centric.
Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
this file is also slated for future demolition.
Return the correct IEEE 1275 code for "nextprop".
Use the common Open Firmware PCI interrupt routing code instead of the
duplicate version in dev/fdt.
Configure interrupt sense based on device tree information.
Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
internally instead of requiring the caller to allocate it.
2014-05-14 14:17:51 +00:00
|
|
|
/* Maybe it's a real interrupt, not an intpin */
|
|
|
|
|
if (pin > 4)
|
|
|
|
|
return (pin);
|
2010-06-13 13:28:53 +00:00
|
|
|
|
MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,
r259199, r259484, r259513, r259514, r259516
The kernel stack guard pages are only below the stack pointer, not above.
Remove unnecessary double-setting of the thread's onfault state in
copyinstr().
Open Firmware mandates that certain cross-references, in particular those
in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles,
since FDT has no concept of ihandles. Have the OF FDT CI module interpret
queries about ihandles as cross-reference phandles.
Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use
the right type.
Rearchitect platform memory map parsing to make it less
Open Firmware-centric.
Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of
this file is also slated for future demolition.
Return the correct IEEE 1275 code for "nextprop".
Use the common Open Firmware PCI interrupt routing code instead of the
duplicate version in dev/fdt.
Configure interrupt sense based on device tree information.
Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf
internally instead of requiring the caller to allocate it.
2014-05-14 14:17:51 +00:00
|
|
|
device_printf(bus, "could not route pin %d for device %d.%d\n",
|
2010-06-13 13:28:53 +00:00
|
|
|
pin, pci_get_slot(dev), pci_get_function(dev));
|
|
|
|
|
return (PCI_INVALID_IRQ);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
mv_pcib_decode_win(phandle_t node, struct mv_pcib_softc *sc)
|
|
|
|
|
{
|
MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375
Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.
In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0
In pmap_mapdev(), first check whether a static mapping exists,
Convert TI static device mapping to use the new arm_devmap_add_entry(),
Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.
Eliminate use of fdt_immr_addr(), it's not needed for tegra
Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.
Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
Add #include <machine/fdt.h> to a few files that used to get it via pollution
Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.
Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.
Switch RPi to using arm_devmap_add_entry() to set up static device mapping.
Allow 'no static device mappings' to potentially work.
Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.
Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
2014-05-14 19:18:58 +00:00
|
|
|
struct mv_pci_range io_space, mem_space;
|
2010-06-13 13:28:53 +00:00
|
|
|
device_t dev;
|
|
|
|
|
int error;
|
|
|
|
|
|
|
|
|
|
dev = sc->sc_dev;
|
|
|
|
|
|
MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375
Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.
In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0
In pmap_mapdev(), first check whether a static mapping exists,
Convert TI static device mapping to use the new arm_devmap_add_entry(),
Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.
Eliminate use of fdt_immr_addr(), it's not needed for tegra
Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.
Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
Add #include <machine/fdt.h> to a few files that used to get it via pollution
Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.
Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.
Switch RPi to using arm_devmap_add_entry() to set up static device mapping.
Allow 'no static device mappings' to potentially work.
Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.
Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
2014-05-14 19:18:58 +00:00
|
|
|
if ((error = mv_pci_ranges(node, &io_space, &mem_space)) != 0) {
|
2010-06-13 13:28:53 +00:00
|
|
|
device_printf(dev, "could not retrieve 'ranges' data\n");
|
|
|
|
|
return (error);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Configure CPU decoding windows */
|
2012-09-14 09:57:41 +00:00
|
|
|
error = decode_win_cpu_set(sc->sc_win_target,
|
|
|
|
|
sc->sc_io_win_attr, io_space.base_parent, io_space.len, ~0);
|
2010-06-13 13:28:53 +00:00
|
|
|
if (error < 0) {
|
|
|
|
|
device_printf(dev, "could not set up CPU decode "
|
|
|
|
|
"window for PCI IO\n");
|
|
|
|
|
return (ENXIO);
|
|
|
|
|
}
|
2012-09-14 09:57:41 +00:00
|
|
|
error = decode_win_cpu_set(sc->sc_win_target,
|
|
|
|
|
sc->sc_mem_win_attr, mem_space.base_parent, mem_space.len,
|
|
|
|
|
mem_space.base_parent);
|
2010-06-13 13:28:53 +00:00
|
|
|
if (error < 0) {
|
|
|
|
|
device_printf(dev, "could not set up CPU decode "
|
|
|
|
|
"windows for PCI MEM\n");
|
|
|
|
|
return (ENXIO);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
sc->sc_io_base = io_space.base_parent;
|
|
|
|
|
sc->sc_io_size = io_space.len;
|
|
|
|
|
|
|
|
|
|
sc->sc_mem_base = mem_space.base_parent;
|
|
|
|
|
sc->sc_mem_size = mem_space.len;
|
|
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
|
2012-09-14 10:06:56 +00:00
|
|
|
#if defined(SOC_MV_ARMADAXP)
|
|
|
|
|
static int
|
|
|
|
|
mv_pcib_map_msi(device_t dev, device_t child, int irq, uint64_t *addr,
|
|
|
|
|
uint32_t *data)
|
|
|
|
|
{
|
|
|
|
|
struct mv_pcib_softc *sc;
|
|
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
|
irq = irq - MSI_IRQ;
|
|
|
|
|
|
|
|
|
|
/* validate parameters */
|
|
|
|
|
if (isclr(&sc->sc_msi_bitmap, irq)) {
|
|
|
|
|
device_printf(dev, "invalid MSI 0x%x\n", irq);
|
|
|
|
|
return (EINVAL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
mv_msi_data(irq, addr, data);
|
|
|
|
|
|
|
|
|
|
debugf("%s: irq: %d addr: %jx data: %x\n",
|
|
|
|
|
__func__, irq, *addr, *data);
|
|
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
mv_pcib_alloc_msi(device_t dev, device_t child, int count,
|
|
|
|
|
int maxcount __unused, int *irqs)
|
|
|
|
|
{
|
|
|
|
|
struct mv_pcib_softc *sc;
|
|
|
|
|
u_int start = 0, i;
|
|
|
|
|
|
|
|
|
|
if (powerof2(count) == 0 || count > MSI_IRQ_NUM)
|
|
|
|
|
return (EINVAL);
|
|
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
|
mtx_lock(&sc->sc_msi_mtx);
|
|
|
|
|
|
|
|
|
|
for (start = 0; (start + count) < MSI_IRQ_NUM; start++) {
|
|
|
|
|
for (i = start; i < start + count; i++) {
|
|
|
|
|
if (isset(&sc->sc_msi_bitmap, i))
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
if (i == start + count)
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ((start + count) == MSI_IRQ_NUM) {
|
|
|
|
|
mtx_unlock(&sc->sc_msi_mtx);
|
|
|
|
|
return (ENXIO);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (i = start; i < start + count; i++) {
|
|
|
|
|
setbit(&sc->sc_msi_bitmap, i);
|
2015-05-23 22:33:06 +00:00
|
|
|
*irqs++ = MSI_IRQ + i;
|
2012-09-14 10:06:56 +00:00
|
|
|
}
|
|
|
|
|
debugf("%s: start: %x count: %x\n", __func__, start, count);
|
|
|
|
|
|
|
|
|
|
mtx_unlock(&sc->sc_msi_mtx);
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
mv_pcib_release_msi(device_t dev, device_t child, int count, int *irqs)
|
|
|
|
|
{
|
|
|
|
|
struct mv_pcib_softc *sc;
|
|
|
|
|
u_int i;
|
|
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
|
mtx_lock(&sc->sc_msi_mtx);
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < count; i++)
|
|
|
|
|
clrbit(&sc->sc_msi_bitmap, irqs[i] - MSI_IRQ);
|
|
|
|
|
|
|
|
|
|
mtx_unlock(&sc->sc_msi_mtx);
|
|
|
|
|
return (0);
|
|
|
|
|
}
|
|
|
|
|
#endif
|
MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,
r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373,
r260374, r260375
Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs.
Correct license statements to reflect the fact that these files were all
derived from sys/arm/mv/bus_space.c.
In pmap_unmapdev(), remember the size, and use that as an argument to
kva_free(), or we'd end up always passing it a size of 0
In pmap_mapdev(), first check whether a static mapping exists,
Convert TI static device mapping to use the new arm_devmap_add_entry(),
Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy.
Eliminate use of fdt_immr_addr(), it's not needed for tegra
Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make
static device mappings.
Retire machine/fdt.h as a header used by MI code, as its function is now
obsolete. This involves the following pieces:
- Remove it entirely on PowerPC, where it is not used by MD code either
- Remove all references to machine/fdt.h in non-architecture-specific code
(aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat
non-arch-specific).
- Fix code relying on header pollution from machine/fdt.h includes
- Legacy fdtbus.c (still used on x86 FDT systems) now passes resource
requests to its parent (nexus). This allows x86 FDT devices to allocate
both memory and IO requests and removes the last notionally MI use of
fdtbus_bs_tag.
- On those architectures that retain a machine/fdt.h, unused bits like
FDT_MAP_IRQ and FDT_INTR_MAX have been removed.
Add #include <machine/fdt.h> to a few files that used to get it via pollution
Enable the mv cesa security/crypto device by providing the required property
in the dts source, and adding the right devices to the kernel config.
Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs,
related to setting up static device mappings. Since it was only used by
arm/mv/mv_pci.c, it's now just static functions within that file, plus
one public function that gets called only from arm/mv/mv_machdep.c.
Switch RPi to using arm_devmap_add_entry() to set up static device mapping.
Allow 'no static device mappings' to potentially work.
Don't try to find a static mapping before calling pmap_mapdev(), that logic
is now part of pmap_mapdev() and doesn't need to be duplicated here.
Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
2014-05-14 19:18:58 +00:00
|
|
|
|
