442 lines
10 KiB
C
442 lines
10 KiB
C
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/*-
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* Copyright (c) 2010 Jakub Wojciech Klama <jceel@FreeBSD.org>
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* Copyright (c) 2015 Hiroki Mori
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/types.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/proc.h>
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#include <sys/rman.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/pmap.h>
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#include <vm/vm_page.h>
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#include <vm/vm_extern.h>
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#define _ARM32_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/ralink/rt1310reg.h>
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#define INTC_NIRQS 32
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#ifdef INTRNG
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#include "pic_if.h"
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struct rt1310_irqsrc {
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struct intr_irqsrc ri_isrc;
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u_int ri_irq;
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};
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#endif
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struct rt1310_intc_softc {
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device_t dev;
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struct resource * ri_res;
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bus_space_tag_t ri_bst;
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bus_space_handle_t ri_bsh;
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#ifdef INTRNG
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struct rt1310_irqsrc ri_isrcs[INTC_NIRQS];
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#endif
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};
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static int rt1310_intc_probe(device_t);
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static int rt1310_intc_attach(device_t);
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#ifndef INTRNG
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static void rt1310_intc_eoi(void *);
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#else
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static int rt1310_pic_attach(struct rt1310_intc_softc *sc);
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#endif
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static struct rt1310_intc_softc *intc_softc = NULL;
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#define intc_read_4(_sc, _reg) \
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bus_space_read_4((_sc)->ri_bst, (_sc)->ri_bsh, (_reg))
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#define intc_write_4(_sc, _reg, _val) \
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bus_space_write_4((_sc)->ri_bst, (_sc)->ri_bsh, (_reg), (_val))
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struct rt1310_irqdef {
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u_int ri_trig;
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u_int ri_prio;
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};
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struct rt1310_irqdef irqdef[INTC_NIRQS] = {
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{RT_INTC_TRIG_HIGH_LVL, 2}, /* 0 */
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{RT_INTC_TRIG_HIGH_LVL, 2},
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{RT_INTC_TRIG_HIGH_LVL, 2},
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{RT_INTC_TRIG_HIGH_LVL, 1},
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{RT_INTC_TRIG_HIGH_LVL, 2},
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{RT_INTC_TRIG_HIGH_LVL, 1},
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{RT_INTC_TRIG_HIGH_LVL, 1},
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{RT_INTC_TRIG_HIGH_LVL, 1},
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{RT_INTC_TRIG_HIGH_LVL, 1}, /* 8 */
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{RT_INTC_TRIG_HIGH_LVL, 1},
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{RT_INTC_TRIG_HIGH_LVL, 2},
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{RT_INTC_TRIG_LOW_LVL, 2},
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{RT_INTC_TRIG_LOW_LVL, 2},
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{RT_INTC_TRIG_LOW_LVL, 4},
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{RT_INTC_TRIG_HIGH_LVL, 2},
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{RT_INTC_TRIG_HIGH_LVL, 2},
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{RT_INTC_TRIG_HIGH_LVL, 2}, /* 16 */
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{RT_INTC_TRIG_HIGH_LVL, 2},
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{RT_INTC_TRIG_LOW_LVL, 2},
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{RT_INTC_TRIG_LOW_LVL, 2},
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{RT_INTC_TRIG_LOW_LVL, 2},
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{RT_INTC_TRIG_LOW_LVL, 2},
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{RT_INTC_TRIG_NEG_EDGE, 2},
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{RT_INTC_TRIG_HIGH_LVL, 3},
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{RT_INTC_TRIG_HIGH_LVL, 2}, /* 24 */
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{RT_INTC_TRIG_POS_EDGE, 2},
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{RT_INTC_TRIG_POS_EDGE, 2},
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{RT_INTC_TRIG_HIGH_LVL, 2},
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{RT_INTC_TRIG_HIGH_LVL, 2},
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{RT_INTC_TRIG_POS_EDGE, 2},
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{RT_INTC_TRIG_POS_EDGE, 3},
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{RT_INTC_TRIG_POS_EDGE, 3},
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};
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static int
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rt1310_intc_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "rt,pic"))
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return (ENXIO);
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#ifdef INTRNG
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device_set_desc(dev, "RT1310 INTRNG Interrupt Controller");
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#else
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device_set_desc(dev, "RT1310 Interrupt Controller");
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#endif
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return (BUS_PROBE_DEFAULT);
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}
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static int
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rt1310_intc_attach(device_t dev)
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{
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struct rt1310_intc_softc *sc = device_get_softc(dev);
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int rid = 0;
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int i;
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if (intc_softc)
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return (ENXIO);
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sc->dev = dev;
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sc->ri_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->ri_res) {
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device_printf(dev, "could not alloc resources\n");
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return (ENXIO);
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}
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sc->ri_bst = rman_get_bustag(sc->ri_res);
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sc->ri_bsh = rman_get_bushandle(sc->ri_res);
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intc_softc = sc;
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#ifndef INTRNG
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arm_post_filter = rt1310_intc_eoi;
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#else
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rt1310_pic_attach(sc);
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#endif
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intc_write_4(sc, RT_INTC_IECR, 0);
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intc_write_4(sc, RT_INTC_ICCR, ~0);
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for (i = 0; i <= INTC_NIRQS; ++i) {
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intc_write_4(sc, RT_INTC_SCR0+i*4,
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(irqdef[i].ri_trig << RT_INTC_TRIG_SHIF) |
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irqdef[i].ri_prio);
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intc_write_4(sc, RT_INTC_SVR0+i*4, i);
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}
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/* Clear interrupt status registers and disable all interrupts */
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intc_write_4(sc, RT_INTC_ICCR, ~0);
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intc_write_4(sc, RT_INTC_IMR, 0);
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return (0);
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}
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#ifndef INTRNG
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int
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arm_get_next_irq(int last)
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{
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struct rt1310_intc_softc *sc = intc_softc;
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uint32_t value;
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int i;
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value = intc_read_4(sc, RT_INTC_IPR);
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for (i = 0; i < 32; i++) {
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if (value & (1 << i))
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return (i);
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}
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return (-1);
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}
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void
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arm_mask_irq(uintptr_t nb)
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{
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struct rt1310_intc_softc *sc = intc_softc;
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uint32_t value;
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/* Make sure that interrupt isn't active already */
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rt1310_intc_eoi((void *)nb);
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/* Clear bit in ER register */
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value = intc_read_4(sc, RT_INTC_IECR);
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value &= ~(1 << nb);
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intc_write_4(sc, RT_INTC_IECR, value);
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intc_write_4(sc, RT_INTC_IMR, value);
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intc_write_4(sc, RT_INTC_ICCR, 1 << nb);
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}
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void
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arm_unmask_irq(uintptr_t nb)
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{
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struct rt1310_intc_softc *sc = intc_softc;
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uint32_t value;
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value = intc_read_4(sc, RT_INTC_IECR);
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value |= (1 << nb);
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intc_write_4(sc, RT_INTC_IMR, value);
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intc_write_4(sc, RT_INTC_IECR, value);
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}
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static void
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rt1310_intc_eoi(void *data)
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{
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struct rt1310_intc_softc *sc = intc_softc;
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int nb = (int)data;
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intc_write_4(sc, RT_INTC_ICCR, 1 << nb);
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if (nb == 0) {
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uint32_t value;
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value = intc_read_4(sc, RT_INTC_IECR);
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value &= ~(1 << nb);
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intc_write_4(sc, RT_INTC_IECR, value);
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intc_write_4(sc, RT_INTC_IMR, value);
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}
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}
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#else
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static void
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rt1310_enable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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u_int irq;
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unsigned int value;
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struct rt1310_intc_softc *sc;
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sc = intc_softc;
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irq = ((struct rt1310_irqsrc *)isrc)->ri_irq;
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value = intc_read_4(sc, RT_INTC_IECR);
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value |= (1 << irq);
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intc_write_4(sc, RT_INTC_IMR, value);
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intc_write_4(sc, RT_INTC_IECR, value);
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}
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static void
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rt1310_disable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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u_int irq;
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unsigned int value;
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struct rt1310_intc_softc *sc;
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sc = intc_softc;
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irq = ((struct rt1310_irqsrc *)isrc)->ri_irq;
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/* Clear bit in ER register */
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value = intc_read_4(sc, RT_INTC_IECR);
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value &= ~(1 << irq);
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intc_write_4(sc, RT_INTC_IECR, value);
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intc_write_4(sc, RT_INTC_IMR, value);
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intc_write_4(sc, RT_INTC_ICCR, 1 << irq);
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}
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static int
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rt1310_map_intr(device_t dev, struct intr_map_data *data,
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struct intr_irqsrc **isrcp)
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{
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struct intr_map_data_fdt *daf;
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struct rt1310_intc_softc *sc;
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if (data->type != INTR_MAP_DATA_FDT)
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return (ENOTSUP);
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daf = (struct intr_map_data_fdt *)data;
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if (daf->ncells != 1 || daf->cells[0] >= INTC_NIRQS)
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return (EINVAL);
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sc = device_get_softc(dev);
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*isrcp = &sc->ri_isrcs[daf->cells[0]].ri_isrc;
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return (0);
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}
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static void
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rt1310_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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arm_irq_memory_barrier(0);
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rt1310_disable_intr(dev, isrc);
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}
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static void
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rt1310_post_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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arm_irq_memory_barrier(0);
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rt1310_enable_intr(dev, isrc);
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}
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static void
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rt1310_post_filter(device_t dev, struct intr_irqsrc *isrc)
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{
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u_int irq;
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struct rt1310_intc_softc *sc;
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arm_irq_memory_barrier(0);
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sc = intc_softc;
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irq = ((struct rt1310_irqsrc *)isrc)->ri_irq;
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intc_write_4(sc, RT_INTC_ICCR, 1 << irq);
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}
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static int
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rt1310_intr(void *arg)
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{
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uint32_t irq;
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struct rt1310_intc_softc *sc = arg;
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irq = ffs(intc_read_4(sc, RT_INTC_IPR)) - 1;
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if (intr_isrc_dispatch(&sc->ri_isrcs[irq].ri_isrc,
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curthread->td_intr_frame) != 0) {
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intc_write_4(sc, RT_INTC_ICCR, 1 << irq);
|
||
|
|
device_printf(sc->dev, "Stray irq %u disabled\n", irq);
|
||
|
|
}
|
||
|
|
|
||
|
|
arm_irq_memory_barrier(0);
|
||
|
|
|
||
|
|
return (FILTER_HANDLED);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int
|
||
|
|
rt1310_pic_attach(struct rt1310_intc_softc *sc)
|
||
|
|
{
|
||
|
|
struct intr_pic *pic;
|
||
|
|
int error;
|
||
|
|
uint32_t irq;
|
||
|
|
const char *name;
|
||
|
|
intptr_t xref;
|
||
|
|
|
||
|
|
name = device_get_nameunit(sc->dev);
|
||
|
|
for (irq = 0; irq < INTC_NIRQS; irq++) {
|
||
|
|
sc->ri_isrcs[irq].ri_irq = irq;
|
||
|
|
|
||
|
|
error = intr_isrc_register(&sc->ri_isrcs[irq].ri_isrc,
|
||
|
|
sc->dev, 0, "%s,%u", name, irq);
|
||
|
|
if (error != 0)
|
||
|
|
return (error);
|
||
|
|
}
|
||
|
|
|
||
|
|
xref = OF_xref_from_node(ofw_bus_get_node(sc->dev));
|
||
|
|
pic = intr_pic_register(sc->dev, xref);
|
||
|
|
if (pic == NULL)
|
||
|
|
return (ENXIO);
|
||
|
|
|
||
|
|
return (intr_pic_claim_root(sc->dev, xref, rt1310_intr, sc, 0));
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
struct fdt_fixup_entry fdt_fixup_table[] = {
|
||
|
|
{ NULL, NULL }
|
||
|
|
};
|
||
|
|
|
||
|
|
#ifndef INTRNG
|
||
|
|
static int
|
||
|
|
fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
|
||
|
|
int *pol)
|
||
|
|
{
|
||
|
|
if (!fdt_is_compatible(node, "lpc,pic"))
|
||
|
|
return (ENXIO);
|
||
|
|
|
||
|
|
*interrupt = fdt32_to_cpu(intr[0]);
|
||
|
|
*trig = INTR_TRIGGER_CONFORM;
|
||
|
|
*pol = INTR_POLARITY_CONFORM;
|
||
|
|
return (0);
|
||
|
|
}
|
||
|
|
|
||
|
|
fdt_pic_decode_t fdt_pic_table[] = {
|
||
|
|
&fdt_pic_decode_ic,
|
||
|
|
NULL
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
|
||
|
|
static device_method_t rt1310_intc_methods[] = {
|
||
|
|
DEVMETHOD(device_probe, rt1310_intc_probe),
|
||
|
|
DEVMETHOD(device_attach, rt1310_intc_attach),
|
||
|
|
#ifdef INTRNG
|
||
|
|
DEVMETHOD(pic_disable_intr, rt1310_disable_intr),
|
||
|
|
DEVMETHOD(pic_enable_intr, rt1310_enable_intr),
|
||
|
|
DEVMETHOD(pic_map_intr, rt1310_map_intr),
|
||
|
|
DEVMETHOD(pic_post_filter, rt1310_post_filter),
|
||
|
|
DEVMETHOD(pic_post_ithread, rt1310_post_ithread),
|
||
|
|
DEVMETHOD(pic_pre_ithread, rt1310_pre_ithread),
|
||
|
|
#endif
|
||
|
|
{ 0, 0 }
|
||
|
|
};
|
||
|
|
|
||
|
|
static driver_t rt1310_intc_driver = {
|
||
|
|
"pic",
|
||
|
|
rt1310_intc_methods,
|
||
|
|
sizeof(struct rt1310_intc_softc),
|
||
|
|
};
|
||
|
|
|
||
|
|
static devclass_t rt1310_intc_devclass;
|
||
|
|
|
||
|
|
EARLY_DRIVER_MODULE(pic, simplebus, rt1310_intc_driver, rt1310_intc_devclass, 0, 0, BUS_PASS_INTERRUPT);
|