2012-08-15 05:37:10 +00:00
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/*-
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* Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _ARM_LPC_IF_LPEREG_H
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#define _ARM_LPC_IF_LPEREG_H
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#define LPE_MAC1 0x000
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#define LPE_MAC1_RXENABLE (1 << 0)
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#define LPE_MAC1_PASSALL (1 << 1)
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#define LPE_MAC1_RXFLOWCTRL (1 << 2)
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#define LPE_MAC1_TXFLOWCTRL (1 << 3)
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#define LPE_MAC1_LOOPBACK (1 << 4)
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#define LPE_MAC1_RESETTX (1 << 8)
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#define LPE_MAC1_RESETMCSTX (1 << 9)
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#define LPE_MAC1_RESETRX (1 << 10)
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#define LPE_MAC1_RESETMCSRX (1 << 11)
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#define LPE_MAC1_SIMRESET (1 << 14)
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#define LPE_MAC1_SOFTRESET (1 << 15)
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#define LPE_MAC2 0x004
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#define LPE_MAC2_FULLDUPLEX (1 << 0)
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#define LPE_MAC2_FRAMELENCHECK (1 << 1)
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#define LPE_MAC2_HUGEFRAME (1 << 2)
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#define LPE_MAC2_DELAYEDCRC (1 << 3)
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#define LPE_MAC2_CRCENABLE (1 << 4)
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#define LPE_MAC2_PADCRCENABLE (1 << 5)
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#define LPE_MAC2_VLANPADENABLE (1 << 6)
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#define LPE_MAC2_AUTOPADENABLE (1 << 7)
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#define LPE_MAC2_PUREPREAMBLE (1 << 8)
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#define LPE_MAC2_LONGPREAMBLE (1 << 9)
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#define LPE_MAC2_NOBACKOFF (1 << 12)
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#define LPE_MAC2_BACKPRESSURE (1 << 13)
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#define LPE_MAC2_EXCESSDEFER (1 << 14)
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#define LPE_IPGT 0x008
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#define LPE_IPGR 0x00c
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#define LPE_CLRT 0x010
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#define LPE_MAXF 0x014
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#define LPE_SUPP 0x018
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#define LPE_SUPP_SPEED (1 << 8)
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#define LPE_TEST 0x01c
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#define LPE_MCFG 0x020
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#define LPE_MCFG_SCANINCR (1 << 0)
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#define LPE_MCFG_SUPPREAMBLE (1 << 1)
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#define LPE_MCFG_CLKSEL(_n) ((_n & 0x7) << 2)
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#define LPC_MCFG_RESETMII (1 << 15)
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#define LPE_MCMD 0x024
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#define LPE_MCMD_READ (1 << 0)
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#define LPE_MCMD_WRITE (0 << 0)
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#define LPE_MCMD_SCAN (1 << 1)
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#define LPE_MADR 0x028
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#define LPE_MADR_REGMASK 0x1f
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#define LPE_MADR_REGSHIFT 0
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#define LPE_MADR_PHYMASK 0x1f
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#define LPE_MADR_PHYSHIFT 8
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#define LPE_MWTD 0x02c
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#define LPE_MWTD_DATAMASK 0xffff
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#define LPE_MRDD 0x030
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#define LPE_MRDD_DATAMASK 0xffff
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#define LPE_MIND 0x034
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#define LPE_MIND_BUSY (1 << 0)
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#define LPE_MIND_SCANNING (1 << 1)
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#define LPE_MIND_INVALID (1 << 2)
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#define LPE_MIND_MIIFAIL (1 << 3)
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#define LPE_SA0 0x040
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#define LPE_SA1 0x044
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#define LPE_SA2 0x048
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#define LPE_COMMAND 0x100
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#define LPE_COMMAND_RXENABLE (1 << 0)
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#define LPE_COMMAND_TXENABLE (1 << 1)
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#define LPE_COMMAND_REGRESET (1 << 3)
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#define LPE_COMMAND_TXRESET (1 << 4)
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#define LPE_COMMAND_RXRESET (1 << 5)
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#define LPE_COMMAND_PASSRUNTFRAME (1 << 6)
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#define LPE_COMMAND_PASSRXFILTER (1 << 7)
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#define LPE_COMMAND_TXFLOWCTL (1 << 8)
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#define LPE_COMMAND_RMII (1 << 9)
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#define LPE_COMMAND_FULLDUPLEX (1 << 10)
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#define LPE_STATUS 0x104
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#define LPE_STATUS_RXACTIVE (1 << 0)
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#define LPE_STATUS_TXACTIVE (1 << 1)
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#define LPE_RXDESC 0x108
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#define LPE_RXSTATUS 0x10c
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#define LPE_RXDESC_NUMBER 0x110
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#define LPE_RXDESC_PROD 0x114
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#define LPE_RXDESC_CONS 0x118
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#define LPE_TXDESC 0x11c
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#define LPE_TXSTATUS 0x120
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#define LPE_TXDESC_NUMBER 0x124
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#define LPE_TXDESC_PROD 0x128
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#define LPE_TXDESC_CONS 0x12c
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#define LPE_TSV0 0x158
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#define LPE_TSV1 0x15c
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#define LPE_RSV 0x160
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#define LPE_FLOWCONTROL_COUNTER 0x170
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#define LPE_FLOWCONTROL_STATUS 0x174
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#define LPE_RXFILTER_CTRL 0x200
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#define LPE_RXFILTER_UNICAST (1 << 0)
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#define LPE_RXFILTER_BROADCAST (1 << 1)
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#define LPE_RXFILTER_MULTICAST (1 << 2)
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#define LPE_RXFILTER_UNIHASH (1 << 3)
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#define LPE_RXFILTER_MULTIHASH (1 << 4)
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#define LPE_RXFILTER_PERFECT (1 << 5)
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#define LPE_RXFILTER_WOL (1 << 12)
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#define LPE_RXFILTER_FILTWOL (1 << 13)
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#define LPE_RXFILTER_WOL_STATUS 0x204
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#define LPE_RXFILTER_WOL_CLEAR 0x208
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#define LPE_HASHFILTER_L 0x210
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#define LPE_HASHFILTER_H 0x214
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#define LPE_INTSTATUS 0xfe0
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#define LPE_INTENABLE 0xfe4
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#define LPE_INTCLEAR 0xfe8
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#define LPE_INTSET 0xfec
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#define LPE_INT_RXOVERRUN (1 << 0)
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#define LPE_INT_RXERROR (1 << 1)
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#define LPE_INT_RXFINISH (1 << 2)
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#define LPE_INT_RXDONE (1 << 3)
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#define LPE_INT_TXUNDERRUN (1 << 4)
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#define LPE_INT_TXERROR (1 << 5)
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#define LPE_INT_TXFINISH (1 << 6)
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#define LPE_INT_TXDONE (1 << 7)
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#define LPE_INT_SOFTINT (1 << 12)
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#define LPE_INTWAKEUPINT (1 << 13)
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#define LPE_POWERDOWN 0xff4
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#define LPE_DESC_ALIGN 8
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#define LPE_TXDESC_NUM 128
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#define LPE_RXDESC_NUM 128
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#define LPE_TXDESC_SIZE (LPE_TXDESC_NUM * sizeof(struct lpe_hwdesc))
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#define LPE_RXDESC_SIZE (LPE_RXDESC_NUM * sizeof(struct lpe_hwdesc))
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#define LPE_TXSTATUS_SIZE (LPE_TXDESC_NUM * sizeof(struct lpe_hwstatus))
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#define LPE_RXSTATUS_SIZE (LPE_RXDESC_NUM * sizeof(struct lpe_hwstatus))
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#define LPE_MAXFRAGS 8
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struct lpe_hwdesc {
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uint32_t lhr_data;
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uint32_t lhr_control;
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};
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struct lpe_hwstatus {
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uint32_t lhs_info;
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uint32_t lhs_crc;
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};
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#define LPE_INC(x, y) (x) = ((x) == ((y)-1)) ? 0 : (x)+1
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/* These are valid for both Rx and Tx descriptors */
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#define LPE_HWDESC_SIZE_MASK (1 << 10)
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2013-11-30 22:17:27 +00:00
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#define LPE_HWDESC_INTERRUPT (1U << 31)
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2012-08-15 05:37:10 +00:00
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/* These are valid for Tx descriptors */
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#define LPE_HWDESC_LAST (1 << 30)
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#define LPE_HWDESC_CRC (1 << 29)
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#define LPE_HWDESC_PAD (1 << 28)
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#define LPE_HWDESC_HUGE (1 << 27)
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#define LPE_HWDESC_OVERRIDE (1 << 26)
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/* These are valid for Tx status descriptors */
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#define LPE_HWDESC_COLLISIONS(_n) (((_n) >> 21) & 0x7)
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#define LPE_HWDESC_DEFER (1 << 25)
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#define LPE_HWDESC_EXCDEFER (1 << 26)
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#define LPE_HWDESC_EXCCOLL (1 << 27)
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#define LPE_HWDESC_LATECOLL (1 << 28)
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#define LPE_HWDESC_UNDERRUN (1 << 29)
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#define LPE_HWDESC_TXNODESCR (1 << 30)
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2013-11-30 22:17:27 +00:00
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#define LPE_HWDESC_ERROR (1U << 31)
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2012-08-15 05:37:10 +00:00
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/* These are valid for Rx status descriptors */
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#define LPE_HWDESC_CONTROL (1 << 18)
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#define LPE_HWDESC_VLAN (1 << 19)
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#define LPE_HWDESC_FAILFILTER (1 << 20)
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#define LPE_HWDESC_MULTICAST (1 << 21)
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#define LPE_HWDESC_BROADCAST (1 << 22)
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#define LPE_HWDESC_CRCERROR (1 << 23)
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#define LPE_HWDESC_SYMBOLERROR (1 << 24)
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#define LPE_HWDESC_LENGTHERROR (1 << 25)
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#define LPE_HWDESC_RANGEERROR (1 << 26)
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#define LPE_HWDESC_ALIGNERROR (1 << 27)
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#define LPE_HWDESC_OVERRUN (1 << 28)
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#define LPE_HWDESC_RXNODESCR (1 << 29)
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#define LPE_HWDESC_LASTFLAG (1 << 30)
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2013-11-30 22:17:27 +00:00
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#define LPE_HWDESC_ERROR (1U << 31)
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2012-08-15 05:37:10 +00:00
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#endif /* _ARM_LPC_IF_LPEREG_H */
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