2005-01-06 01:43:34 +00:00
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/*-
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1997-06-27 19:38:56 +00:00
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* Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD.
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1996-01-03 06:25:32 +00:00
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*
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2002-04-24 16:58:51 +00:00
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* Copyright (c) 1994-2001 Justin T. Gibbs.
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* Copyright (c) 2000-2001 Adaptec Inc.
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1997-06-27 19:38:56 +00:00
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* All rights reserved.
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1996-01-03 06:25:32 +00:00
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*
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1997-06-27 19:38:56 +00:00
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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1999-12-06 18:23:31 +00:00
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* without modification.
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2002-04-24 16:58:51 +00:00
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* substantially similar to the "NO WARRANTY" disclaimer below
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* ("Disclaimer") and any redistribution must be conditioned upon
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* including a substantially similar Disclaimer requirement for further
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* binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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1996-01-03 06:25:32 +00:00
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*
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1999-12-06 18:23:31 +00:00
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* Alternatively, this software may be distributed under the terms of the
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2002-04-24 16:58:51 +00:00
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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1996-01-03 06:25:32 +00:00
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*
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2002-04-24 16:58:51 +00:00
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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1997-06-27 19:38:56 +00:00
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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2002-04-24 16:58:51 +00:00
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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1997-04-04 19:35:30 +00:00
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*
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1999-08-28 01:08:13 +00:00
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* $FreeBSD$
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1997-06-27 19:38:56 +00:00
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*/
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1996-01-03 06:25:32 +00:00
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ahc_eisa.c:
ahc_pci.c:
ahd_pci.c:
aic7xxx.c:
aic79xx.c:
aic_osm_lib.c:
aic_osm_lib.h:
Use common OSM routines from aic_osm_lib for bus dma operations,
delay routines, accessing CCBs, byte swapping, etc.
aic7xxx_pci.c:
Provide a better description for the 2915/30LP on attach.
aic7xxx.c:
aic79xx.c:
aic7770.c:
aic79xx_pci.c:
aic7xxx_pci.c:
aic7xxx_93cx6.c:
Move FBSDID behind an ifdef so that these core files will
still compile under other OSes.
aic79xx.h:
aic79xx_pci.c:
aic79xx.seq:
To speed up non-packetized CDB delivery in Rev B, all CDB
acks are "released" to the output sync as soon as the
command phase starts. There is only one problem with this
approach. If the target changes phase before all data are
sent, we have left over acks that can go out on the bus in
a data phase. Due to other chip contraints, this only
happens if the target goes to data-in, but if the acks go
out before we can test SDONE, we'll think that the transfer
has completed successfully. Work around this by taking
advantage of the 400ns or 800ns dead time between command
phase and the REQ of the new phase. If the transfer has
completed successfully, SCSIEN should fall *long* before we
see a phase change. We thus treat any phasemiss that
occurs before SCSIEN falls as an incomplete transfer.
aic79xx.h:
Add the AHD_FAST_CDB_DELIVERY feature.
aic79xx_pci.c:
Set AHD_FAST_CDB_DELIVERY for all Rev. B parts.
aic79xx.seq:
Test for PHASEMIS in the command phase for
all AHD_FAST_CDB_DELIVERY controlelrs.
ahd_pci.c:
ahc_pci.c:
aic7xxx.h:
aic79xx.h:
Move definition of controller BAR offsets to core header files.
aic7xxx.c:
aic79xx.c:
In the softc free routine, leave removal of a softc from the
global list of softcs to the OSM (the caller of this routine).
This allows us to avoid holding the softc list_lock during device
destruction where we may have to sleep waiting for our recovery
thread to halt.
ahc_pci.c:
Use ahc_pci_test_register access to validate I/O mapped in
addition to the tests already performed for memory mapped
access.
Remove unused ahc_power_state_change() function. The PCI
layer in both 4.X and 5.X now offer this functionality.
ahd_pci.c:
Remove reduntant definition of controller BAR offsets. These
are also defined in aic79xx.h.
Remove unused ahd_power_state_change() function. The PCI
layer in both 4.X and 5.X now offer this functionality.
aic7xxx.c:
aic79xx.c:
aic79xx.h:
aic7xxx.h:
aic7xxx_osm.c:
aic79xx_osm.c:
Move timeout handling to the driver cores. In the case
of the aic79xx driver, the algorithm has been enhanced
to try target resets before performing a bus reset. For
the aic7xxx driver, the algorithm is unchanged. Although
the drivers do not currently sleep during recovery (recovery
is timeout driven), the cores do expect all processing to
be performed via a recovery thread. Our timeout handlers
are now little stubs that wakeup the recovery thread.
aic79xx.c:
aic79xx.h:
aic79xx_inline.h:
Change shared_data allocation to use a map_node so
that the sentinel hscb can use this map node in
ahd_swap_with_next_hscb. This routine now swaps
the hscb_map pointer in additon to the hscb
contents so that any sync operations occur on
the correct map.
physaddr -> busaddr
Pointed out by: Jason Thorpe <thorpej@wasabisystems.com>
aic79xx.c:
Make more use of the in/out/w/l/q macros for accessing
byte registers in the chip.
Correct some issues in the ahd_flush_qoutfifo() routine.
o Run the qoutfifo only once the command channel
DMA engine has been halted. This closes a window
where we might have missed some entries.
o Change ahd_run_data_fifo() to not loop to completion.
If we happen to start on the wrong FIFO and the other
FIFO has a snapshot savepointers, we might deadlock.
This required our delay between FIFO tests to be
moved to the ahd_flush_qoutfifo() routine.
o Update/add comments.
o Remove spurious test for COMPLETE_DMA list being empty
when completing transactions from the GSFIFO with
residuals. The SCB must be put on the COMPLETE_DMA
scb list unconditionally.
o When halting command channel DMA activity, we must
disable the DMA channel in all cases but an update
of the QOUTFIFO. The latter case is required so
that the sequencer will update its position in the
QOUTFIFO. Previously, we left the channel enabled
for all "push" DMAs. This left us vulnerable to
the sequencer handling an SCB push long after that
SCB was already processed manually by this routine.
o Correct the polarity of tests involving
ahd_scb_active_in_fifo(). This routine returns
non-zero for true.
Return to processing bad status completions through
the qoutfifo. This reduces the time that the sequencer
is kept paused when handling transactions with bad
status or underruns.
When waiting for the controller to quiece selections,
add a delay to our loop. Otherwise we may fail to wait
long enough for the sequencer to comply.
On H2A4 hardware, use the slow slewrate for non-paced
transfers. This mirrors what the Adaptec Windows
drivers do.
On the Rev B. only slow down the CRC timing for
older U160 devices that might need the slower timing.
We define "older" as devices that do not support
packetized protocol.
Wait up to 5000 * 5us for the SEEPROM to become unbusy.
Write ops seem to take much longer than read ops.
aic79xx.seq:
For controllers with the FAINT_LED bug, turn the diagnostic
led feature on during selection and reselection. This covers
the non-packetized case. The LED will be disabled for
non-packetized transfers once we return to the top level idle
loop. Add more comments about the busy LED workaround.
Extend a critical section around the entire
command channel idle loop process. Previously
the portion of this handler that directly manipulated
the linked list of completed SCBs was not protected.
This is the likely cause of the recent reports of
commands being completed twice by the driver.
Extend critical sections across the test for,
and the longjump to, longjump routines. This
prevents the firmware from trying to jump to
a longjmp handler that was just cleared by the
host.
Improve the locations of several critical section
begin and end points. Typically these changes
remove instructions that did not need to be
inside a critical section.
Close the "busfree after selection, but before busfree
interrupts can be enabled" race to just a single sequencer
instruction. We now test the BSY line explicitly before
clearing the busfree status and enabling the busfree
interrupt.
Close a race condition in the processing of HS_MAILBOX
updates. We now clear the "updated" status before the
copy. This ensures that we don't accidentally clear
the status incorrectly when the host sneaks in an update
just after our last copy, but before we clear the status.
This race has never been observed.
Don't re-enable SCSIEN if we lose the race to disable SCSIEN
in our interrupt handler's workaround for the RevA data-valid
too early issue.
aic79xx_inline.h:
Add comments indicating that the order in which bytes are
read or written in ahd_inw and ahd_outw is important. This
allows us to use these inlines when accessing registers with
side-effects.
aic79xx_pci.c:
The 29320 and the 29320B are 7902 not 7901 based products.
Correct the driver banner.
aic7xxx.h:
Enable the use of the auto-access pause feature
on the aic7870 and aic7880. It was disabled due
to an oversight.
aic7xxx.reg:
Move TARG_IMMEDIATE_SCB to alias LAST_MSG to
avoid leaving garbage in MWI_RESIDUAL. This
prevents spurious overflows whn operating target
mode on controllers that require the MWI_RESIDUAL
work-around.
aic7xxx.seq:
AHC_TMODE_WIDEODD_BUG is a bug, not a softc flag.
Reference the correct softc field when testing
for its presence.
Set the NOT_IDENTIFIED and NO_CDB_SENT bits
in SEQ_FLAGS to indicate that the nexus is
invalid in await busfree.
aic7xxx_93cx6.c:
Add support for the C56/C66 versions of the EWEN and EWDS
commands.
aic7xxx.c:
aic7xxx_pci.c:
Move test for the validity of left over BIOS data
to ahc_test_register_access(). This guarantees that
any left over CHIPRST value is not clobbered by our
register access test and lost to the test that was
in ahc_reset.
2003-12-17 00:02:10 +00:00
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VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $"
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2002-04-24 16:58:51 +00:00
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PATCH_ARG_LIST = "struct ahc_softc *ahc"
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2002-08-31 06:43:15 +00:00
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PREFIX = "ahc_"
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2001-07-18 21:39:48 +00:00
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2000-09-22 22:06:44 +00:00
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#include "aic7xxx.reg"
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#include "scsi_message.h"
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1996-01-03 06:25:32 +00:00
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1996-10-25 06:34:59 +00:00
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/*
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* A few words on the waiting SCB list:
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* After starting the selection hardware, we check for reconnecting targets
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1996-01-29 03:12:06 +00:00
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* as well as for our selection to complete just in case the reselection wins
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* bus arbitration. The problem with this is that we must keep track of the
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* SCB that we've already pulled from the QINFIFO and started the selection
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* on just in case the reselection wins so that we can retry the selection at
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* a later time. This problem cannot be resolved by holding a single entry
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* in scratch ram since a reconnecting target can request sense and this will
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* create yet another SCB waiting for selection. The solution used here is to
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* use byte 27 of the SCB as a psuedo-next pointer and to thread a list
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1996-10-25 06:34:59 +00:00
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* of SCBs that are awaiting selection. Since 0-0xfe are valid SCB indexes,
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* SCB_LIST_NULL is 0xff which is out of range. An entry is also added to
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* this list everytime a request sense occurs or after completing a non-tagged
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* command for which a second SCB has been queued. The sequencer will
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* automatically consume the entries.
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1996-01-03 06:25:32 +00:00
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*/
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2001-01-22 21:03:48 +00:00
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bus_free_sel:
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/*
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* Turn off the selection hardware. We need to reset the
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* selection request in order to perform a new selection.
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*/
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aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
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and SCSISEQ, TEMODE|ENSELI|ENRSELI|ENAUTOATNP;
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2001-01-22 21:03:48 +00:00
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and SIMODE1, ~ENBUSFREE;
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1995-04-27 17:44:27 +00:00
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poll_for_work:
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1999-03-05 23:35:48 +00:00
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call clear_target_state;
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1998-09-15 07:24:17 +00:00
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and SXFRCTL0, ~SPIOEN;
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2000-11-12 05:19:46 +00:00
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if ((ahc->features & AHC_ULTRA2) != 0) {
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clr SCSIBUSL;
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}
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2001-02-21 20:50:36 +00:00
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test SCSISEQ, ENSELO jnz poll_for_selection;
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1998-09-15 07:24:17 +00:00
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if ((ahc->features & AHC_TWIN) != 0) {
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xor SBLKCTL,SELBUSB; /* Toggle to the other bus */
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2001-02-21 20:50:36 +00:00
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test SCSISEQ, ENSELO jnz poll_for_selection;
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1998-09-15 07:24:17 +00:00
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}
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2004-08-13 21:41:23 +00:00
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BEGIN_CRITICAL;
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Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
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cmp WAITING_SCBH,SCB_LIST_NULL jne start_waiting;
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2004-08-13 21:41:23 +00:00
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END_CRITICAL;
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2001-02-21 20:50:36 +00:00
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poll_for_work_loop:
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if ((ahc->features & AHC_TWIN) != 0) {
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xor SBLKCTL,SELBUSB; /* Toggle to the other bus */
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}
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test SSTAT0, SELDO|SELDI jnz selection;
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1996-10-25 06:34:59 +00:00
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test_queue:
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/* Has the driver posted any work for us? */
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2002-04-24 16:58:51 +00:00
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BEGIN_CRITICAL;
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1998-09-15 07:24:17 +00:00
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if ((ahc->features & AHC_QUEUE_REGS) != 0) {
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test QOFF_CTLSTA, SCB_AVAIL jz poll_for_work_loop;
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} else {
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aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
mov A, QINPOS;
|
1998-09-15 07:24:17 +00:00
|
|
|
cmp KERNEL_QINPOS, A je poll_for_work_loop;
|
|
|
|
|
}
|
2000-10-05 04:24:14 +00:00
|
|
|
mov ARG_1, NEXT_QUEUED_SCB;
|
1996-01-03 06:25:32 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
|
* We have at least one queued SCB now and we don't have any
|
2000-10-05 04:24:14 +00:00
|
|
|
* SCBs in the list of SCBs awaiting selection. Allocate a
|
|
|
|
|
* card SCB for the host's SCB and get to work on it.
|
2000-07-18 20:12:14 +00:00
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
|
|
|
|
mov ALLZEROS call get_free_or_disc_scb;
|
2000-10-05 04:24:14 +00:00
|
|
|
} else {
|
1998-09-15 07:24:17 +00:00
|
|
|
/* In the non-paging case, the SCBID == hardware SCB index */
|
2000-10-05 04:24:14 +00:00
|
|
|
mov SCBPTR, ARG_1;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
or SEQ_FLAGS2, SCB_DMA;
|
2002-04-24 16:58:51 +00:00
|
|
|
END_CRITICAL;
|
1996-10-25 06:34:59 +00:00
|
|
|
dma_queued_scb:
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
|
* DMA the SCB from host ram into the current SCB location.
|
|
|
|
|
*/
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mvi DMAPARAMS, HDMAEN|DIRECTION|FIFORESET;
|
2000-10-05 04:24:14 +00:00
|
|
|
mov ARG_1 call dma_scb;
|
1996-10-25 06:34:59 +00:00
|
|
|
/*
|
2000-10-05 04:24:14 +00:00
|
|
|
* Check one last time to see if this SCB was canceled
|
|
|
|
|
* before we completed the DMA operation. If it was,
|
|
|
|
|
* the QINFIFO next pointer will not match our saved
|
|
|
|
|
* value.
|
1996-10-25 06:34:59 +00:00
|
|
|
*/
|
2000-10-05 04:24:14 +00:00
|
|
|
mov A, ARG_1;
|
2002-04-24 16:58:51 +00:00
|
|
|
BEGIN_CRITICAL;
|
2000-10-05 04:24:14 +00:00
|
|
|
cmp NEXT_QUEUED_SCB, A jne abort_qinscb;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
|
|
|
|
|
cmp SCB_TAG, A je . + 2;
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi SCB_MISMATCH call set_seqint;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
}
|
2000-10-05 04:24:14 +00:00
|
|
|
mov NEXT_QUEUED_SCB, SCB_NEXT;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov SCB_NEXT,WAITING_SCBH;
|
|
|
|
|
mov WAITING_SCBH, SCBPTR;
|
2000-11-06 20:05:38 +00:00
|
|
|
if ((ahc->features & AHC_QUEUE_REGS) != 0) {
|
|
|
|
|
mov NONE, SNSCB_QOFF;
|
|
|
|
|
} else {
|
|
|
|
|
inc QINPOS;
|
|
|
|
|
}
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
and SEQ_FLAGS2, ~SCB_DMA;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
start_waiting:
|
|
|
|
|
/*
|
2000-07-18 20:12:14 +00:00
|
|
|
* Start the first entry on the waiting SCB list.
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
*/
|
|
|
|
|
mov SCBPTR, WAITING_SCBH;
|
|
|
|
|
call start_selection;
|
2004-08-13 21:41:23 +00:00
|
|
|
END_CRITICAL;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2001-02-21 20:50:36 +00:00
|
|
|
poll_for_selection:
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
2001-02-21 20:50:36 +00:00
|
|
|
* Twin channel devices cannot handle things like SELTO
|
|
|
|
|
* interrupts on the "background" channel. So, while
|
|
|
|
|
* selecting, keep polling the current channel until
|
|
|
|
|
* either a selection or reselection occurs.
|
2000-07-18 20:12:14 +00:00
|
|
|
*/
|
2001-02-21 20:50:36 +00:00
|
|
|
test SSTAT0, SELDO|SELDI jz poll_for_selection;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
selection:
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
|
* We aren't expecting a bus free, so interrupt
|
|
|
|
|
* the kernel driver if it happens.
|
|
|
|
|
*/
|
|
|
|
|
mvi CLRSINT1,CLRBUSFREE;
|
2001-05-15 19:41:12 +00:00
|
|
|
if ((ahc->features & AHC_DT) == 0) {
|
|
|
|
|
or SIMODE1, ENBUSFREE;
|
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
/*
|
|
|
|
|
* Guard against a bus free after (re)selection
|
|
|
|
|
* but prior to enabling the busfree interrupt. SELDI
|
|
|
|
|
* and SELDO will be cleared in that case.
|
|
|
|
|
*/
|
2001-01-22 21:03:48 +00:00
|
|
|
test SSTAT0, SELDI|SELDO jz bus_free_sel;
|
1998-09-15 07:24:17 +00:00
|
|
|
test SSTAT0,SELDO jnz select_out;
|
|
|
|
|
select_in:
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
|
|
|
|
if ((ahc->flags & AHC_INITIATORROLE) != 0) {
|
1998-12-10 04:14:50 +00:00
|
|
|
test SSTAT0, TARGET jz initiator_reselect;
|
|
|
|
|
}
|
2001-01-22 21:03:48 +00:00
|
|
|
mvi CLRSINT0, CLRSELDI;
|
1999-01-14 06:14:15 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
|
* We've just been selected. Assert BSY and
|
|
|
|
|
* setup the phase for receiving messages
|
|
|
|
|
* from the target.
|
|
|
|
|
*/
|
|
|
|
|
mvi SCSISIGO, P_MESGOUT|BSYO;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Setup the DMA for sending the identify and
|
1998-11-23 01:33:47 +00:00
|
|
|
* command information.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
mvi SEQ_FLAGS, CMDPHASE_PENDING;
|
1998-11-23 01:33:47 +00:00
|
|
|
|
|
|
|
|
mov A, TQINPOS;
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
mvi DINDEX, CCHADDR;
|
2000-07-18 20:12:14 +00:00
|
|
|
mvi SHARED_DATA_ADDR call set_32byte_addr;
|
1998-09-15 07:24:17 +00:00
|
|
|
mvi CCSCBCTL, CCSCBRESET;
|
|
|
|
|
} else {
|
|
|
|
|
mvi DINDEX, HADDR;
|
2000-07-18 20:12:14 +00:00
|
|
|
mvi SHARED_DATA_ADDR call set_32byte_addr;
|
1998-09-15 07:24:17 +00:00
|
|
|
mvi DFCNTRL, FIFORESET;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Initiator that selected us */
|
2000-07-18 20:12:14 +00:00
|
|
|
and SAVED_SCSIID, SELID_MASK, SELID;
|
|
|
|
|
/* The Target ID we were selected at */
|
|
|
|
|
if ((ahc->features & AHC_MULTI_TID) != 0) {
|
|
|
|
|
and A, OID, TARGIDIN;
|
|
|
|
|
} else if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
and A, OID, SCSIID_ULTRA2;
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
2000-07-18 20:12:14 +00:00
|
|
|
and A, OID, SCSIID;
|
|
|
|
|
}
|
|
|
|
|
or SAVED_SCSIID, A;
|
|
|
|
|
if ((ahc->features & AHC_TWIN) != 0) {
|
|
|
|
|
test SBLKCTL, SELBUSB jz . + 2;
|
|
|
|
|
or SAVED_SCSIID, TWIN_CHNLB;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
1999-03-05 23:35:48 +00:00
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
mov CCSCBRAM, SAVED_SCSIID;
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
2000-07-18 20:12:14 +00:00
|
|
|
mov DFDAT, SAVED_SCSIID;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If ATN isn't asserted, the target isn't interested
|
|
|
|
|
* in talking to us. Go directly to bus free.
|
2000-07-18 20:12:14 +00:00
|
|
|
* XXX SCSI-1 may require us to assume lun 0 if
|
|
|
|
|
* ATN is false.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
|
|
|
|
test SCSISIGI, ATNI jz target_busfree;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Watch ATN closely now as we pull in messages from the
|
|
|
|
|
* initiator. We follow the guidlines from section 6.5
|
|
|
|
|
* of the SCSI-2 spec for what messages are allowed when.
|
|
|
|
|
*/
|
1998-12-10 04:14:50 +00:00
|
|
|
call target_inb;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Our first message must be one of IDENTIFY, ABORT, or
|
|
|
|
|
* BUS_DEVICE_RESET.
|
|
|
|
|
*/
|
1999-01-14 06:14:15 +00:00
|
|
|
test DINDEX, MSG_IDENTIFYFLAG jz host_target_message_loop;
|
1998-09-15 07:24:17 +00:00
|
|
|
/* Store for host */
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
mov CCSCBRAM, DINDEX;
|
|
|
|
|
} else {
|
|
|
|
|
mov DFDAT, DINDEX;
|
|
|
|
|
}
|
2002-04-24 16:58:51 +00:00
|
|
|
and SAVED_LUN, MSG_IDENTIFY_LUNMASK, DINDEX;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
/* Remember for disconnection decision */
|
|
|
|
|
test DINDEX, MSG_IDENTIFY_DISCFLAG jnz . + 2;
|
|
|
|
|
/* XXX Honor per target settings too */
|
|
|
|
|
or SEQ_FLAGS, NO_DISCONNECT;
|
|
|
|
|
|
|
|
|
|
test SCSISIGI, ATNI jz ident_messages_done;
|
1998-12-10 04:14:50 +00:00
|
|
|
call target_inb;
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
|
* If this is a tagged request, the tagged message must
|
|
|
|
|
* immediately follow the identify. We test for a valid
|
|
|
|
|
* tag message by seeing if it is >= MSG_SIMPLE_Q_TAG and
|
|
|
|
|
* < MSG_IGN_WIDE_RESIDUE.
|
|
|
|
|
*/
|
|
|
|
|
add A, -MSG_SIMPLE_Q_TAG, DINDEX;
|
2002-04-24 16:58:51 +00:00
|
|
|
jnc ident_messages_done_msg_pending;
|
1998-09-15 07:24:17 +00:00
|
|
|
add A, -MSG_IGN_WIDE_RESIDUE, DINDEX;
|
2002-04-24 16:58:51 +00:00
|
|
|
jc ident_messages_done_msg_pending;
|
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/* Store for host */
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
mov CCSCBRAM, DINDEX;
|
|
|
|
|
} else {
|
|
|
|
|
mov DFDAT, DINDEX;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If the initiator doesn't feel like providing a tag number,
|
|
|
|
|
* we've got a failed selection and must transition to bus
|
|
|
|
|
* free.
|
|
|
|
|
*/
|
|
|
|
|
test SCSISIGI, ATNI jz target_busfree;
|
1999-01-14 06:14:15 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
|
* Store the tag for the host.
|
|
|
|
|
*/
|
1998-12-10 04:14:50 +00:00
|
|
|
call target_inb;
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
mov CCSCBRAM, DINDEX;
|
|
|
|
|
} else {
|
|
|
|
|
mov DFDAT, DINDEX;
|
|
|
|
|
}
|
1999-01-14 06:14:15 +00:00
|
|
|
mov INITIATOR_TAG, DINDEX;
|
2000-07-18 20:12:14 +00:00
|
|
|
or SEQ_FLAGS, TARGET_CMD_IS_TAGGED;
|
2002-04-24 16:58:51 +00:00
|
|
|
|
|
|
|
|
ident_messages_done:
|
|
|
|
|
/* Terminate the ident list */
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
mvi CCSCBRAM, SCB_LIST_NULL;
|
|
|
|
|
} else {
|
|
|
|
|
mvi DFDAT, SCB_LIST_NULL;
|
|
|
|
|
}
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
or SEQ_FLAGS, TARG_CMD_PENDING;
|
2002-04-24 16:58:51 +00:00
|
|
|
test SEQ_FLAGS2, TARGET_MSG_PENDING
|
|
|
|
|
jnz target_mesgout_pending;
|
|
|
|
|
test SCSISIGI, ATNI jnz target_mesgout_continue;
|
|
|
|
|
jmp target_ITloop;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
ident_messages_done_msg_pending:
|
|
|
|
|
or SEQ_FLAGS2, TARGET_MSG_PENDING;
|
1998-09-15 07:24:17 +00:00
|
|
|
jmp ident_messages_done;
|
|
|
|
|
|
1998-12-10 04:14:50 +00:00
|
|
|
/*
|
|
|
|
|
* Pushed message loop to allow the kernel to
|
1999-01-14 06:14:15 +00:00
|
|
|
* run it's own target mode message state engine.
|
1998-12-10 04:14:50 +00:00
|
|
|
*/
|
|
|
|
|
host_target_message_loop:
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi HOST_MSG_LOOP call set_seqint;
|
1998-12-10 04:14:50 +00:00
|
|
|
cmp RETURN_1, EXIT_MSG_LOOP je target_ITloop;
|
|
|
|
|
test SSTAT0, SPIORDY jz .;
|
|
|
|
|
jmp host_target_message_loop;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_INITIATORROLE) != 0) {
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
* Reselection has been initiated by a target. Make a note that we've been
|
|
|
|
|
* reselected, but haven't seen an IDENTIFY message from the target yet.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
initiator_reselect:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
/* XXX test for and handle ONE BIT condition */
|
2001-01-22 21:03:48 +00:00
|
|
|
or SXFRCTL0, SPIOEN|CLRSTCNT|CLRCHN;
|
2000-07-18 20:12:14 +00:00
|
|
|
and SAVED_SCSIID, SELID_MASK, SELID;
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
and A, OID, SCSIID_ULTRA2;
|
|
|
|
|
} else {
|
|
|
|
|
and A, OID, SCSIID;
|
|
|
|
|
}
|
|
|
|
|
or SAVED_SCSIID, A;
|
1998-09-21 16:46:13 +00:00
|
|
|
if ((ahc->features & AHC_TWIN) != 0) {
|
|
|
|
|
test SBLKCTL, SELBUSB jz . + 2;
|
2000-07-18 20:12:14 +00:00
|
|
|
or SAVED_SCSIID, TWIN_CHNLB;
|
1998-09-21 16:46:13 +00:00
|
|
|
}
|
2001-01-22 21:03:48 +00:00
|
|
|
mvi CLRSINT0, CLRSELDI;
|
1998-09-15 07:24:17 +00:00
|
|
|
jmp ITloop;
|
1998-12-10 04:14:50 +00:00
|
|
|
}
|
1996-01-03 06:25:32 +00:00
|
|
|
|
2001-02-21 20:50:36 +00:00
|
|
|
abort_qinscb:
|
|
|
|
|
call add_scb_to_free_list;
|
|
|
|
|
jmp poll_for_work_loop;
|
|
|
|
|
|
2004-08-13 21:41:23 +00:00
|
|
|
BEGIN_CRITICAL;
|
2001-02-21 20:50:36 +00:00
|
|
|
start_selection:
|
|
|
|
|
/*
|
|
|
|
|
* If bus reset interrupts have been disabled (from a previous
|
|
|
|
|
* reset), re-enable them now. Resets are only of interest
|
|
|
|
|
* when we have outstanding transactions, so we can safely
|
|
|
|
|
* defer re-enabling the interrupt until, as an initiator,
|
|
|
|
|
* we start sending out transactions again.
|
|
|
|
|
*/
|
|
|
|
|
test SIMODE1, ENSCSIRST jnz . + 3;
|
|
|
|
|
mvi CLRSINT1, CLRSCSIRSTI;
|
|
|
|
|
or SIMODE1, ENSCSIRST;
|
|
|
|
|
if ((ahc->features & AHC_TWIN) != 0) {
|
|
|
|
|
and SINDEX,~SELBUSB,SBLKCTL;/* Clear channel select bit */
|
|
|
|
|
test SCB_SCSIID, TWIN_CHNLB jz . + 2;
|
|
|
|
|
or SINDEX, SELBUSB;
|
|
|
|
|
mov SBLKCTL,SINDEX; /* select channel */
|
|
|
|
|
}
|
|
|
|
|
initialize_scsiid:
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
mov SCSIID_ULTRA2, SCB_SCSIID;
|
|
|
|
|
} else if ((ahc->features & AHC_TWIN) != 0) {
|
|
|
|
|
and SCSIID, TWIN_TID|OID, SCB_SCSIID;
|
|
|
|
|
} else {
|
|
|
|
|
mov SCSIID, SCB_SCSIID;
|
|
|
|
|
}
|
|
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
|
|
|
|
mov SINDEX, SCSISEQ_TEMPLATE;
|
|
|
|
|
test SCB_CONTROL, TARGET_SCB jz . + 2;
|
|
|
|
|
or SINDEX, TEMODE;
|
|
|
|
|
mov SCSISEQ, SINDEX ret;
|
|
|
|
|
} else {
|
|
|
|
|
mov SCSISEQ, SCSISEQ_TEMPLATE ret;
|
|
|
|
|
}
|
2004-08-13 21:41:23 +00:00
|
|
|
END_CRITICAL;
|
2001-02-21 20:50:36 +00:00
|
|
|
|
|
|
|
|
/*
|
2002-08-31 06:43:15 +00:00
|
|
|
* Initialize transfer settings with SCB provided settings.
|
2001-02-21 20:50:36 +00:00
|
|
|
*/
|
|
|
|
|
set_transfer_settings:
|
|
|
|
|
if ((ahc->features & AHC_ULTRA) != 0) {
|
|
|
|
|
test SCB_CONTROL, ULTRAENB jz . + 2;
|
|
|
|
|
or SXFRCTL0, FAST20;
|
|
|
|
|
}
|
|
|
|
|
/*
|
|
|
|
|
* Initialize SCSIRATE with the appropriate value for this target.
|
|
|
|
|
*/
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
bmov SCSIRATE, SCB_SCSIRATE, 2 ret;
|
|
|
|
|
} else {
|
|
|
|
|
mov SCSIRATE, SCB_SCSIRATE ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
|
|
|
|
/*
|
|
|
|
|
* We carefully toggle SPIOEN to allow us to return the
|
|
|
|
|
* message byte we receive so it can be checked prior to
|
|
|
|
|
* driving REQ on the bus for the next byte.
|
|
|
|
|
*/
|
|
|
|
|
target_inb:
|
|
|
|
|
/*
|
|
|
|
|
* Drive REQ on the bus by enabling SCSI PIO.
|
|
|
|
|
*/
|
|
|
|
|
or SXFRCTL0, SPIOEN;
|
|
|
|
|
/* Wait for the byte */
|
|
|
|
|
test SSTAT0, SPIORDY jz .;
|
|
|
|
|
/* Prevent our read from triggering another REQ */
|
|
|
|
|
and SXFRCTL0, ~SPIOEN;
|
|
|
|
|
/* Save latched contents */
|
|
|
|
|
mov DINDEX, SCSIDATL ret;
|
|
|
|
|
}
|
|
|
|
|
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
/*
|
|
|
|
|
* After the selection, remove this SCB from the "waiting SCB"
|
|
|
|
|
* list. This is achieved by simply moving our "next" pointer into
|
|
|
|
|
* WAITING_SCBH. Our next pointer will be set to null the next time this
|
|
|
|
|
* SCB is used, so don't bother with it now.
|
|
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
select_out:
|
1997-04-18 16:31:55 +00:00
|
|
|
/* Turn off the selection hardware */
|
2000-03-18 22:28:20 +00:00
|
|
|
and SCSISEQ, TEMODE|ENSELI|ENRSELI|ENAUTOATNP, SCSISEQ;
|
1997-04-18 16:31:55 +00:00
|
|
|
mov SCBPTR, WAITING_SCBH;
|
|
|
|
|
mov WAITING_SCBH,SCB_NEXT;
|
2000-07-18 20:12:14 +00:00
|
|
|
mov SAVED_SCSIID, SCB_SCSIID;
|
2003-05-26 21:24:01 +00:00
|
|
|
and SAVED_LUN, LID, SCB_LUN;
|
2002-08-31 06:43:15 +00:00
|
|
|
call set_transfer_settings;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
1998-09-15 07:24:17 +00:00
|
|
|
test SSTAT0, TARGET jz initiator_select;
|
|
|
|
|
|
2002-08-31 06:43:15 +00:00
|
|
|
or SXFRCTL0, CLRSTCNT|CLRCHN;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Put tag in connonical location since not
|
|
|
|
|
* all connections have an SCB.
|
|
|
|
|
*/
|
|
|
|
|
mov INITIATOR_TAG, SCB_TARGET_ITAG;
|
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
|
* We've just re-selected an initiator.
|
|
|
|
|
* Assert BSY and setup the phase for
|
|
|
|
|
* sending our identify messages.
|
|
|
|
|
*/
|
1998-12-10 04:14:50 +00:00
|
|
|
mvi P_MESGIN|BSYO call change_phase;
|
2002-08-31 06:43:15 +00:00
|
|
|
mvi CLRSINT0, CLRSELDO;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Start out with a simple identify message.
|
|
|
|
|
*/
|
2003-05-26 21:24:01 +00:00
|
|
|
or SAVED_LUN, MSG_IDENTIFYFLAG call target_outb;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If we are the result of a tagged command, send
|
|
|
|
|
* a simple Q tag and the tag id.
|
|
|
|
|
*/
|
|
|
|
|
test SCB_CONTROL, TAG_ENB jz . + 3;
|
|
|
|
|
mvi MSG_SIMPLE_Q_TAG call target_outb;
|
2002-04-24 16:58:51 +00:00
|
|
|
mov SCB_TARGET_ITAG call target_outb;
|
1998-09-15 07:24:17 +00:00
|
|
|
target_synccmd:
|
|
|
|
|
/*
|
|
|
|
|
* Now determine what phases the host wants us
|
|
|
|
|
* to go through.
|
|
|
|
|
*/
|
2002-04-24 16:58:51 +00:00
|
|
|
mov SEQ_FLAGS, SCB_TARGET_PHASES;
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2001-03-29 00:36:35 +00:00
|
|
|
test SCB_CONTROL, MK_MESSAGE jz target_ITloop;
|
|
|
|
|
mvi P_MESGIN|BSYO call change_phase;
|
|
|
|
|
jmp host_target_message_loop;
|
1998-09-15 07:24:17 +00:00
|
|
|
target_ITloop:
|
|
|
|
|
/*
|
1998-12-10 04:14:50 +00:00
|
|
|
* Start honoring ATN signals now that
|
1999-03-05 23:35:48 +00:00
|
|
|
* we properly identified ourselves.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
1998-12-10 04:14:50 +00:00
|
|
|
test SCSISIGI, ATNI jnz target_mesgout;
|
1998-09-15 07:24:17 +00:00
|
|
|
test SEQ_FLAGS, CMDPHASE_PENDING jnz target_cmdphase;
|
|
|
|
|
test SEQ_FLAGS, DPHASE_PENDING jnz target_dphase;
|
|
|
|
|
test SEQ_FLAGS, SPHASE_PENDING jnz target_sphase;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* No more work to do. Either disconnect or not depending
|
|
|
|
|
* on the state of NO_DISCONNECT.
|
|
|
|
|
*/
|
|
|
|
|
test SEQ_FLAGS, NO_DISCONNECT jz target_disconnect;
|
2002-08-31 06:43:15 +00:00
|
|
|
mvi TARG_IMMEDIATE_SCB, SCB_LIST_NULL;
|
1998-09-15 07:24:17 +00:00
|
|
|
call complete_target_cmd;
|
2001-03-29 00:36:35 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
|
|
|
|
mov ALLZEROS call get_free_or_disc_scb;
|
|
|
|
|
}
|
2002-08-31 06:43:15 +00:00
|
|
|
cmp TARG_IMMEDIATE_SCB, SCB_LIST_NULL je .;
|
1998-09-15 07:24:17 +00:00
|
|
|
mvi DMAPARAMS, HDMAEN|DIRECTION|FIFORESET;
|
2002-08-31 06:43:15 +00:00
|
|
|
mov TARG_IMMEDIATE_SCB call dma_scb;
|
2002-04-24 16:58:51 +00:00
|
|
|
call set_transfer_settings;
|
2002-08-31 06:43:15 +00:00
|
|
|
or SXFRCTL0, CLRSTCNT|CLRCHN;
|
1998-09-15 07:24:17 +00:00
|
|
|
jmp target_synccmd;
|
|
|
|
|
|
1998-12-10 04:14:50 +00:00
|
|
|
target_mesgout:
|
|
|
|
|
mvi SCSISIGO, P_MESGOUT|BSYO;
|
2000-07-18 20:12:14 +00:00
|
|
|
target_mesgout_continue:
|
1998-12-10 04:14:50 +00:00
|
|
|
call target_inb;
|
2000-07-18 20:12:14 +00:00
|
|
|
target_mesgout_pending:
|
aic7xxx.reg:
Add a constant for the controller's stack size and the
maximum scsi offset.
aic7xxx.seq:
Style nit. The source is implied to be the destination
unless overridden in an "and" instruction.
Update target mode code for changes in identify seen
sequencer flags.
aic7xxx_pci.c:
Ensure that the PCIERRGENDIS bit is set in the
PCIERRGEN config space register. Perhaps this
is a reason for the spurios parity errors reported
on U160 controllers.
Honor the AHC_NO_BIOS_INIT flag.
Allow PCI interrupt reporting to be disabled,
by clearing the PERRRESEN bit in the command
register. This option is now enabled via a new
softc flag: AHC_DISABLE_PCI_PERR.
Disable SERR and pause the controller prior to performing
our mmapped I/O test. This should handle the case of
controllers that do not "auto-access pause". For legacy
controllers, use SCB ram instead of scratch ram since
the latter may contain settings left over from the BIOS
that we will use if an seeprom is not found.
Make use of new ahc_inl/outl() inlines.
aic7xxx.h:
Reformat a few comments to follow driver style.
Add a controller flags that indicate that a controller
has not been initialized by the BIOS and whether to
disable PCI parity errors..
Remove stack probing softc members.
Add a few more syncrate constants that are useful in speed
fallback calculations.
Add the SHOW_MASKED_ERRORS debug flag.
aic7xxx.h:
aic7xxx.c:
Implement the SCB_SILENT flag. This is useful for
hushing up the driver during DV or other operations
that we expect to cause transmission errors. The
messages will still print if the SHOW_MASKED_ERRORS
debug option is enabled.
aic7xxx_inline.h:
Implement ahc_[in|out][w|l|q]. This removes the need
for manual 'or and shift" type operations throughout
the driver.
aic7xxx.c:
Move SELTO dignostic so that the SCB is still valid
when we use it for printing path information.
If we are narrow, limit syncrate to Ultra2.
Don't clobber ppr_options when forcing a renegotiation.
The current ppr_options may be referenced while queuing
new commands. Don't set our width to unknown when forcing
negotiation on narrow controllers. This will confuse the
negotiation code into negotiating with a wide message on
narrow controllers.
Add an "asserting atn" diagnostic with controller/target
information.
Remove the probe_stack code. The stack is always
4 deep on legacy controllers, so probing is pointless.
This also avoids an issue where probing the stack would
upset the aic7770.
In ahc_reset(), record whether or not we found the
controller in a reset state. If the controller was
already reset, assume that no BIOS has initialized
the controller and ignore left over scratch ram
settings.
Fix an ifdef bug that caused sequencer debugging to
be enabled always.
Clear the ultraenb flag in our tstate during startup.
The ultraenbled'ness of a device is recorded in the user
transfer settings. tstate->ultraenb bitmask indicates
which devices we have negotiated an ultra speed with.
Just after initialization, we are async. Setting the
ultraenb flag while async seems to be harmless, but it
was confusing to see the ULTRAENB flag set in the SCB.
Enhance residual diagnostic to indicate if the residual
if for sense information or normal data transfers.
Indicate the features, bugs, and flags set in the softc
that are used to control firmware patch download when
booting verbose.
In ahc_dump_card_state() fix a logic reversal. The
SCSIPHASE register only exists on U160 controllers.
The SCSISIGI register exists on all controllers. Not
the other way around. Also print out the ERROR register.
Allow ahc_dump_card_state() to be called when the sequencer
is not paused. Add dump card state markers as in the U320
driver.
2003-01-20 20:44:55 +00:00
|
|
|
and SEQ_FLAGS2, ~TARGET_MSG_PENDING;
|
1998-12-10 04:14:50 +00:00
|
|
|
/* Local Processing goes here... */
|
|
|
|
|
jmp host_target_message_loop;
|
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
target_disconnect:
|
1998-12-10 04:14:50 +00:00
|
|
|
mvi P_MESGIN|BSYO call change_phase;
|
1998-12-15 08:22:42 +00:00
|
|
|
test SEQ_FLAGS, DPHASE jz . + 2;
|
|
|
|
|
mvi MSG_SAVEDATAPOINTER call target_outb;
|
1998-09-15 07:24:17 +00:00
|
|
|
mvi MSG_DISCONNECT call target_outb;
|
|
|
|
|
|
1999-02-11 07:10:20 +00:00
|
|
|
target_busfree_wait:
|
2001-02-18 10:25:42 +00:00
|
|
|
/* Wait for preceding I/O session to complete. */
|
1999-02-11 07:10:20 +00:00
|
|
|
test SCSISIGI, ACKI jnz .;
|
1998-09-15 07:24:17 +00:00
|
|
|
target_busfree:
|
2000-07-18 20:12:14 +00:00
|
|
|
and SIMODE1, ~ENBUSFREE;
|
2000-11-12 05:19:46 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
clr SCSIBUSL;
|
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
clr SCSISIGO;
|
2000-02-09 21:25:00 +00:00
|
|
|
mvi LASTPHASE, P_BUSFREE;
|
1998-09-15 07:24:17 +00:00
|
|
|
call complete_target_cmd;
|
|
|
|
|
jmp poll_for_work;
|
|
|
|
|
|
|
|
|
|
target_cmdphase:
|
2002-04-24 16:58:51 +00:00
|
|
|
/*
|
|
|
|
|
* The target has dropped ATN (doesn't want to abort or BDR)
|
|
|
|
|
* and we believe this selection to be valid. If the ring
|
|
|
|
|
* buffer for new commands is full, return busy or queue full.
|
|
|
|
|
*/
|
|
|
|
|
if ((ahc->features & AHC_HS_MAILBOX) != 0) {
|
|
|
|
|
and A, HOST_TQINPOS, HS_MAILBOX;
|
|
|
|
|
} else {
|
|
|
|
|
mov A, KERNEL_TQINPOS;
|
|
|
|
|
}
|
|
|
|
|
cmp TQINPOS, A jne tqinfifo_has_space;
|
|
|
|
|
mvi P_STATUS|BSYO call change_phase;
|
|
|
|
|
test SEQ_FLAGS, TARGET_CMD_IS_TAGGED jz . + 3;
|
|
|
|
|
mvi STATUS_QUEUE_FULL call target_outb;
|
|
|
|
|
jmp target_busfree_wait;
|
|
|
|
|
mvi STATUS_BUSY call target_outb;
|
|
|
|
|
jmp target_busfree_wait;
|
|
|
|
|
tqinfifo_has_space:
|
1998-12-10 04:14:50 +00:00
|
|
|
mvi P_COMMAND|BSYO call change_phase;
|
|
|
|
|
call target_inb;
|
1998-09-15 07:24:17 +00:00
|
|
|
mov A, DINDEX;
|
|
|
|
|
/* Store for host */
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
mov CCSCBRAM, A;
|
|
|
|
|
} else {
|
|
|
|
|
mov DFDAT, A;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Determine the number of bytes to read
|
1998-11-23 01:33:47 +00:00
|
|
|
* based on the command group code via table lookup.
|
|
|
|
|
* We reuse the first 8 bytes of the TARG_SCSIRATE
|
|
|
|
|
* BIOS array for this table. Count is one less than
|
|
|
|
|
* the total for the command since we've already fetched
|
|
|
|
|
* the first byte.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
|
|
|
|
shr A, CMD_GROUP_CODE_SHIFT;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
add SINDEX, CMDSIZE_TABLE, A;
|
1998-09-15 07:24:17 +00:00
|
|
|
mov A, SINDIR;
|
|
|
|
|
|
|
|
|
|
test A, 0xFF jz command_phase_done;
|
|
|
|
|
or SXFRCTL0, SPIOEN;
|
2001-01-22 21:03:48 +00:00
|
|
|
command_loop:
|
1998-09-15 07:24:17 +00:00
|
|
|
test SSTAT0, SPIORDY jz .;
|
|
|
|
|
cmp A, 1 jne . + 2;
|
|
|
|
|
and SXFRCTL0, ~SPIOEN; /* Last Byte */
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
mov CCSCBRAM, SCSIDATL;
|
|
|
|
|
} else {
|
|
|
|
|
mov DFDAT, SCSIDATL;
|
|
|
|
|
}
|
|
|
|
|
dec A;
|
|
|
|
|
test A, 0xFF jnz command_loop;
|
|
|
|
|
|
|
|
|
|
command_phase_done:
|
|
|
|
|
and SEQ_FLAGS, ~CMDPHASE_PENDING;
|
|
|
|
|
jmp target_ITloop;
|
|
|
|
|
|
|
|
|
|
target_dphase:
|
|
|
|
|
/*
|
2000-07-18 20:12:14 +00:00
|
|
|
* Data phases on the bus are from the
|
|
|
|
|
* perspective of the initiator. The dma
|
|
|
|
|
* code looks at LASTPHASE to determine the
|
|
|
|
|
* data direction of the DMA. Toggle it for
|
|
|
|
|
* target transfers.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2002-04-24 16:58:51 +00:00
|
|
|
xor LASTPHASE, IOI, SCB_TARGET_DATA_DIR;
|
|
|
|
|
or SCB_TARGET_DATA_DIR, BSYO call change_phase;
|
1998-09-15 07:24:17 +00:00
|
|
|
jmp p_data;
|
|
|
|
|
|
|
|
|
|
target_sphase:
|
1998-12-10 04:14:50 +00:00
|
|
|
mvi P_STATUS|BSYO call change_phase;
|
|
|
|
|
mvi LASTPHASE, P_STATUS;
|
2002-04-24 16:58:51 +00:00
|
|
|
mov SCB_SCSI_STATUS call target_outb;
|
1998-12-10 04:14:50 +00:00
|
|
|
/* XXX Watch for ATN or parity errors??? */
|
1998-09-15 07:24:17 +00:00
|
|
|
mvi SCSISIGO, P_MESGIN|BSYO;
|
|
|
|
|
/* MSG_CMDCMPLT is 0, but we can't do an immediate of 0 */
|
|
|
|
|
mov ALLZEROS call target_outb;
|
1999-02-11 07:10:20 +00:00
|
|
|
jmp target_busfree_wait;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
complete_target_cmd:
|
|
|
|
|
test SEQ_FLAGS, TARG_CMD_PENDING jnz . + 2;
|
|
|
|
|
mov SCB_TAG jmp complete_post;
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
1998-11-23 01:33:47 +00:00
|
|
|
/* Set the valid byte */
|
|
|
|
|
mvi CCSCBADDR, 24;
|
|
|
|
|
mov CCSCBRAM, ALLONES;
|
|
|
|
|
mvi CCHCNT, 28;
|
1998-09-15 07:24:17 +00:00
|
|
|
or CCSCBCTL, CCSCBEN|CCSCBRESET;
|
|
|
|
|
test CCSCBCTL, CCSCBDONE jz .;
|
|
|
|
|
clr CCSCBCTL;
|
|
|
|
|
} else {
|
1998-11-23 01:33:47 +00:00
|
|
|
/* Set the valid byte */
|
|
|
|
|
or DFCNTRL, FIFORESET;
|
|
|
|
|
mvi DFWADDR, 3; /* Third 64bit word or byte 24 */
|
|
|
|
|
mov DFDAT, ALLONES;
|
2000-07-18 20:12:14 +00:00
|
|
|
mvi 28 call set_hcnt;
|
1998-09-15 07:24:17 +00:00
|
|
|
or DFCNTRL, HDMAEN|FIFOFLUSH;
|
|
|
|
|
call dma_finish;
|
|
|
|
|
}
|
1998-11-23 01:33:47 +00:00
|
|
|
inc TQINPOS;
|
|
|
|
|
mvi INTSTAT,CMDCMPLT ret;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
1998-12-10 04:14:50 +00:00
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_INITIATORROLE) != 0) {
|
1998-09-15 07:24:17 +00:00
|
|
|
initiator_select:
|
2002-08-31 06:43:15 +00:00
|
|
|
or SXFRCTL0, SPIOEN|CLRSTCNT|CLRCHN;
|
1998-12-10 04:14:50 +00:00
|
|
|
/*
|
|
|
|
|
* As soon as we get a successful selection, the target
|
|
|
|
|
* should go into the message out phase since we have ATN
|
|
|
|
|
* asserted.
|
|
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
mvi MSG_OUT, MSG_IDENTIFYFLAG;
|
2002-11-30 19:30:09 +00:00
|
|
|
mvi SEQ_FLAGS, NO_CDB_SENT;
|
2002-08-31 06:43:15 +00:00
|
|
|
mvi CLRSINT0, CLRSELDO;
|
1996-05-21 18:32:23 +00:00
|
|
|
|
1998-12-10 04:14:50 +00:00
|
|
|
/*
|
|
|
|
|
* Main loop for information transfer phases. Wait for the
|
|
|
|
|
* target to assert REQ before checking MSG, C/D and I/O for
|
|
|
|
|
* the bus phase.
|
|
|
|
|
*/
|
2000-07-18 20:12:14 +00:00
|
|
|
mesgin_phasemis:
|
1994-11-17 20:19:10 +00:00
|
|
|
ITloop:
|
1998-09-15 07:24:17 +00:00
|
|
|
call phase_lock;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
mov A, LASTPHASE;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
test A, ~P_DATAIN jz p_data;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
cmp A,P_COMMAND je p_command;
|
|
|
|
|
cmp A,P_MESGOUT je p_mesgout;
|
|
|
|
|
cmp A,P_STATUS je p_status;
|
|
|
|
|
cmp A,P_MESGIN je p_mesgin;
|
|
|
|
|
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi BAD_PHASE call set_seqint;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
jmp ITloop; /* Try reading the bus again. */
|
|
|
|
|
|
|
|
|
|
await_busfree:
|
|
|
|
|
and SIMODE1, ~ENBUSFREE;
|
1997-04-10 19:13:07 +00:00
|
|
|
mov NONE, SCSIDATL; /* Ack the last byte */
|
2000-11-12 05:19:46 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
clr SCSIBUSL; /* Prevent bit leakage durint SELTO */
|
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
and SXFRCTL0, ~SPIOEN;
|
ahc_eisa.c:
ahc_pci.c:
ahd_pci.c:
aic7xxx.c:
aic79xx.c:
aic_osm_lib.c:
aic_osm_lib.h:
Use common OSM routines from aic_osm_lib for bus dma operations,
delay routines, accessing CCBs, byte swapping, etc.
aic7xxx_pci.c:
Provide a better description for the 2915/30LP on attach.
aic7xxx.c:
aic79xx.c:
aic7770.c:
aic79xx_pci.c:
aic7xxx_pci.c:
aic7xxx_93cx6.c:
Move FBSDID behind an ifdef so that these core files will
still compile under other OSes.
aic79xx.h:
aic79xx_pci.c:
aic79xx.seq:
To speed up non-packetized CDB delivery in Rev B, all CDB
acks are "released" to the output sync as soon as the
command phase starts. There is only one problem with this
approach. If the target changes phase before all data are
sent, we have left over acks that can go out on the bus in
a data phase. Due to other chip contraints, this only
happens if the target goes to data-in, but if the acks go
out before we can test SDONE, we'll think that the transfer
has completed successfully. Work around this by taking
advantage of the 400ns or 800ns dead time between command
phase and the REQ of the new phase. If the transfer has
completed successfully, SCSIEN should fall *long* before we
see a phase change. We thus treat any phasemiss that
occurs before SCSIEN falls as an incomplete transfer.
aic79xx.h:
Add the AHD_FAST_CDB_DELIVERY feature.
aic79xx_pci.c:
Set AHD_FAST_CDB_DELIVERY for all Rev. B parts.
aic79xx.seq:
Test for PHASEMIS in the command phase for
all AHD_FAST_CDB_DELIVERY controlelrs.
ahd_pci.c:
ahc_pci.c:
aic7xxx.h:
aic79xx.h:
Move definition of controller BAR offsets to core header files.
aic7xxx.c:
aic79xx.c:
In the softc free routine, leave removal of a softc from the
global list of softcs to the OSM (the caller of this routine).
This allows us to avoid holding the softc list_lock during device
destruction where we may have to sleep waiting for our recovery
thread to halt.
ahc_pci.c:
Use ahc_pci_test_register access to validate I/O mapped in
addition to the tests already performed for memory mapped
access.
Remove unused ahc_power_state_change() function. The PCI
layer in both 4.X and 5.X now offer this functionality.
ahd_pci.c:
Remove reduntant definition of controller BAR offsets. These
are also defined in aic79xx.h.
Remove unused ahd_power_state_change() function. The PCI
layer in both 4.X and 5.X now offer this functionality.
aic7xxx.c:
aic79xx.c:
aic79xx.h:
aic7xxx.h:
aic7xxx_osm.c:
aic79xx_osm.c:
Move timeout handling to the driver cores. In the case
of the aic79xx driver, the algorithm has been enhanced
to try target resets before performing a bus reset. For
the aic7xxx driver, the algorithm is unchanged. Although
the drivers do not currently sleep during recovery (recovery
is timeout driven), the cores do expect all processing to
be performed via a recovery thread. Our timeout handlers
are now little stubs that wakeup the recovery thread.
aic79xx.c:
aic79xx.h:
aic79xx_inline.h:
Change shared_data allocation to use a map_node so
that the sentinel hscb can use this map node in
ahd_swap_with_next_hscb. This routine now swaps
the hscb_map pointer in additon to the hscb
contents so that any sync operations occur on
the correct map.
physaddr -> busaddr
Pointed out by: Jason Thorpe <thorpej@wasabisystems.com>
aic79xx.c:
Make more use of the in/out/w/l/q macros for accessing
byte registers in the chip.
Correct some issues in the ahd_flush_qoutfifo() routine.
o Run the qoutfifo only once the command channel
DMA engine has been halted. This closes a window
where we might have missed some entries.
o Change ahd_run_data_fifo() to not loop to completion.
If we happen to start on the wrong FIFO and the other
FIFO has a snapshot savepointers, we might deadlock.
This required our delay between FIFO tests to be
moved to the ahd_flush_qoutfifo() routine.
o Update/add comments.
o Remove spurious test for COMPLETE_DMA list being empty
when completing transactions from the GSFIFO with
residuals. The SCB must be put on the COMPLETE_DMA
scb list unconditionally.
o When halting command channel DMA activity, we must
disable the DMA channel in all cases but an update
of the QOUTFIFO. The latter case is required so
that the sequencer will update its position in the
QOUTFIFO. Previously, we left the channel enabled
for all "push" DMAs. This left us vulnerable to
the sequencer handling an SCB push long after that
SCB was already processed manually by this routine.
o Correct the polarity of tests involving
ahd_scb_active_in_fifo(). This routine returns
non-zero for true.
Return to processing bad status completions through
the qoutfifo. This reduces the time that the sequencer
is kept paused when handling transactions with bad
status or underruns.
When waiting for the controller to quiece selections,
add a delay to our loop. Otherwise we may fail to wait
long enough for the sequencer to comply.
On H2A4 hardware, use the slow slewrate for non-paced
transfers. This mirrors what the Adaptec Windows
drivers do.
On the Rev B. only slow down the CRC timing for
older U160 devices that might need the slower timing.
We define "older" as devices that do not support
packetized protocol.
Wait up to 5000 * 5us for the SEEPROM to become unbusy.
Write ops seem to take much longer than read ops.
aic79xx.seq:
For controllers with the FAINT_LED bug, turn the diagnostic
led feature on during selection and reselection. This covers
the non-packetized case. The LED will be disabled for
non-packetized transfers once we return to the top level idle
loop. Add more comments about the busy LED workaround.
Extend a critical section around the entire
command channel idle loop process. Previously
the portion of this handler that directly manipulated
the linked list of completed SCBs was not protected.
This is the likely cause of the recent reports of
commands being completed twice by the driver.
Extend critical sections across the test for,
and the longjump to, longjump routines. This
prevents the firmware from trying to jump to
a longjmp handler that was just cleared by the
host.
Improve the locations of several critical section
begin and end points. Typically these changes
remove instructions that did not need to be
inside a critical section.
Close the "busfree after selection, but before busfree
interrupts can be enabled" race to just a single sequencer
instruction. We now test the BSY line explicitly before
clearing the busfree status and enabling the busfree
interrupt.
Close a race condition in the processing of HS_MAILBOX
updates. We now clear the "updated" status before the
copy. This ensures that we don't accidentally clear
the status incorrectly when the host sneaks in an update
just after our last copy, but before we clear the status.
This race has never been observed.
Don't re-enable SCSIEN if we lose the race to disable SCSIEN
in our interrupt handler's workaround for the RevA data-valid
too early issue.
aic79xx_inline.h:
Add comments indicating that the order in which bytes are
read or written in ahd_inw and ahd_outw is important. This
allows us to use these inlines when accessing registers with
side-effects.
aic79xx_pci.c:
The 29320 and the 29320B are 7902 not 7901 based products.
Correct the driver banner.
aic7xxx.h:
Enable the use of the auto-access pause feature
on the aic7870 and aic7880. It was disabled due
to an oversight.
aic7xxx.reg:
Move TARG_IMMEDIATE_SCB to alias LAST_MSG to
avoid leaving garbage in MWI_RESIDUAL. This
prevents spurious overflows whn operating target
mode on controllers that require the MWI_RESIDUAL
work-around.
aic7xxx.seq:
AHC_TMODE_WIDEODD_BUG is a bug, not a softc flag.
Reference the correct softc field when testing
for its presence.
Set the NOT_IDENTIFIED and NO_CDB_SENT bits
in SEQ_FLAGS to indicate that the nexus is
invalid in await busfree.
aic7xxx_93cx6.c:
Add support for the C56/C66 versions of the EWEN and EWDS
commands.
aic7xxx.c:
aic7xxx_pci.c:
Move test for the validity of left over BIOS data
to ahc_test_register_access(). This guarantees that
any left over CHIPRST value is not clobbered by our
register access test and lost to the test that was
in ahc_reset.
2003-12-17 00:02:10 +00:00
|
|
|
mvi SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
test SSTAT1,REQINIT|BUSFREE jz .;
|
|
|
|
|
test SSTAT1, BUSFREE jnz poll_for_work;
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
mvi MISSED_BUSFREE call set_seqint;
|
1998-12-10 04:14:50 +00:00
|
|
|
}
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
|
|
|
|
|
clear_target_state:
|
1998-12-10 04:14:50 +00:00
|
|
|
/*
|
|
|
|
|
* We assume that the kernel driver may reset us
|
|
|
|
|
* at any time, even in the middle of a DMA, so
|
|
|
|
|
* clear DFCNTRL too.
|
|
|
|
|
*/
|
|
|
|
|
clr DFCNTRL;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
or SXFRCTL0, CLRSTCNT|CLRCHN;
|
1998-12-10 04:14:50 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* We don't know the target we will connect to,
|
|
|
|
|
* so default to narrow transfers to avoid
|
|
|
|
|
* parity problems.
|
|
|
|
|
*/
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
bmov SCSIRATE, ALLZEROS, 2;
|
|
|
|
|
} else {
|
|
|
|
|
clr SCSIRATE;
|
2000-07-18 20:12:14 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA) != 0) {
|
|
|
|
|
and SXFRCTL0, ~(FAST20);
|
|
|
|
|
}
|
1998-12-10 04:14:50 +00:00
|
|
|
}
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mvi LASTPHASE, P_BUSFREE;
|
|
|
|
|
/* clear target specific flags */
|
2002-11-30 19:30:09 +00:00
|
|
|
mvi SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT ret;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
sg_advance:
|
|
|
|
|
clr A; /* add sizeof(struct scatter) */
|
|
|
|
|
add SCB_RESIDUAL_SGPTR[0],SG_SIZEOF;
|
|
|
|
|
adc SCB_RESIDUAL_SGPTR[1],A;
|
|
|
|
|
adc SCB_RESIDUAL_SGPTR[2],A;
|
|
|
|
|
adc SCB_RESIDUAL_SGPTR[3],A ret;
|
|
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
disable_ccsgen:
|
|
|
|
|
test CCSGCTL, CCSGEN jz return;
|
|
|
|
|
test CCSGCTL, CCSGDONE jz .;
|
|
|
|
|
disable_ccsgen_fetch_done:
|
|
|
|
|
clr CCSGCTL;
|
|
|
|
|
test CCSGCTL, CCSGEN jnz .;
|
|
|
|
|
ret;
|
2000-07-18 20:12:14 +00:00
|
|
|
idle_loop:
|
2001-05-15 19:41:12 +00:00
|
|
|
/*
|
|
|
|
|
* Do we need any more segments for this transfer?
|
|
|
|
|
*/
|
|
|
|
|
test SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jnz return;
|
|
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
/* Did we just finish fetching segs? */
|
|
|
|
|
cmp CCSGCTL, CCSGEN|CCSGDONE je idle_sgfetch_complete;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
/* Are we actively fetching segments? */
|
|
|
|
|
test CCSGCTL, CCSGEN jnz return;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
/*
|
|
|
|
|
* Do we have any prefetch left???
|
|
|
|
|
*/
|
|
|
|
|
cmp CCSGADDR, SG_PREFETCH_CNT jne idle_sg_avail;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
/*
|
|
|
|
|
* Need to fetch segments, but we can only do that
|
|
|
|
|
* if the command channel is completely idle. Make
|
|
|
|
|
* sure we don't have an SCB prefetch going on.
|
|
|
|
|
*/
|
|
|
|
|
test CCSCBCTL, CCSCBEN jnz return;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
/*
|
|
|
|
|
* We fetch a "cacheline aligned" and sized amount of data
|
|
|
|
|
* so we don't end up referencing a non-existant page.
|
|
|
|
|
* Cacheline aligned is in quotes because the kernel will
|
|
|
|
|
* set the prefetch amount to a reasonable level if the
|
|
|
|
|
* cacheline size is unknown.
|
|
|
|
|
*/
|
|
|
|
|
mvi CCHCNT, SG_PREFETCH_CNT;
|
|
|
|
|
and CCHADDR[0], SG_PREFETCH_ALIGN_MASK, SCB_RESIDUAL_SGPTR;
|
|
|
|
|
bmov CCHADDR[1], SCB_RESIDUAL_SGPTR[1], 3;
|
|
|
|
|
mvi CCSGCTL, CCSGEN|CCSGRESET ret;
|
2000-07-18 20:12:14 +00:00
|
|
|
idle_sgfetch_complete:
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
call disable_ccsgen_fetch_done;
|
|
|
|
|
and CCSGADDR, SG_PREFETCH_ADDR_MASK, SCB_RESIDUAL_SGPTR;
|
2000-07-18 20:12:14 +00:00
|
|
|
idle_sg_avail:
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
/* Does the hardware have space for another SG entry? */
|
|
|
|
|
test DFSTATUS, PRELOAD_AVAIL jz return;
|
2001-07-18 21:39:48 +00:00
|
|
|
bmov HADDR, CCSGRAM, 7;
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
bmov SCB_RESIDUAL_DATACNT[3], CCSGRAM, 1;
|
2001-07-18 21:39:48 +00:00
|
|
|
if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
|
|
|
|
|
mov SCB_RESIDUAL_DATACNT[3] call set_hhaddr;
|
|
|
|
|
}
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
call sg_advance;
|
|
|
|
|
mov SINDEX, SCB_RESIDUAL_SGPTR[0];
|
|
|
|
|
test SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz . + 2;
|
|
|
|
|
or SINDEX, LAST_SEG;
|
|
|
|
|
mov SG_CACHE_PRE, SINDEX;
|
2001-03-20 04:37:19 +00:00
|
|
|
/* Load the segment */
|
|
|
|
|
or DFCNTRL, PRELOADEN;
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
ret;
|
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0 && ahc->pci_cachesize != 0) {
|
|
|
|
|
/*
|
|
|
|
|
* Calculate the trailing portion of this S/G segment that cannot
|
|
|
|
|
* be transferred using memory write and invalidate PCI transactions.
|
|
|
|
|
* XXX Can we optimize this for PCI writes only???
|
|
|
|
|
*/
|
|
|
|
|
calc_mwi_residual:
|
|
|
|
|
/*
|
|
|
|
|
* If the ending address is on a cacheline boundary,
|
|
|
|
|
* there is no need for an extra segment.
|
|
|
|
|
*/
|
|
|
|
|
mov A, HCNT[0];
|
|
|
|
|
add A, A, HADDR[0];
|
|
|
|
|
and A, CACHESIZE_MASK;
|
|
|
|
|
test A, 0xFF jz return;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If the transfer is less than a cachline,
|
|
|
|
|
* there is no need for an extra segment.
|
|
|
|
|
*/
|
|
|
|
|
test HCNT[1], 0xFF jnz calc_mwi_residual_final;
|
|
|
|
|
test HCNT[2], 0xFF jnz calc_mwi_residual_final;
|
|
|
|
|
add NONE, INVERTED_CACHESIZE_MASK, HCNT[0];
|
|
|
|
|
jnc return;
|
|
|
|
|
|
|
|
|
|
calc_mwi_residual_final:
|
|
|
|
|
mov MWI_RESIDUAL, A;
|
|
|
|
|
not A;
|
|
|
|
|
inc A;
|
|
|
|
|
add HCNT[0], A;
|
|
|
|
|
adc HCNT[1], -1;
|
|
|
|
|
adc HCNT[2], -1 ret;
|
|
|
|
|
}
|
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
p_data:
|
2002-11-30 19:30:09 +00:00
|
|
|
test SEQ_FLAGS,NOT_IDENTIFIED|NO_CDB_SENT jz p_data_allowed;
|
|
|
|
|
mvi PROTO_VIOLATION call set_seqint;
|
|
|
|
|
p_data_allowed:
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
mvi DMAPARAMS, PRELOADEN|SCSIEN|HDMAEN;
|
|
|
|
|
} else {
|
|
|
|
|
mvi DMAPARAMS, WIDEODD|SCSIEN|SDMAEN|HDMAEN|FIFORESET;
|
|
|
|
|
}
|
|
|
|
|
test LASTPHASE, IOI jnz . + 2;
|
|
|
|
|
or DMAPARAMS, DIRECTION;
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
/* We don't have any valid S/G elements */
|
2000-10-05 04:24:14 +00:00
|
|
|
mvi CCSGADDR, SG_PREFETCH_CNT;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2001-07-18 21:39:48 +00:00
|
|
|
test SEQ_FLAGS, DPHASE jz data_phase_initialize;
|
1996-10-25 06:34:59 +00:00
|
|
|
|
2001-07-18 21:39:48 +00:00
|
|
|
/*
|
|
|
|
|
* If we re-enter the data phase after going through another
|
|
|
|
|
* phase, our transfer location has almost certainly been
|
|
|
|
|
* corrupted by the interveining, non-data, transfers. Ask
|
|
|
|
|
* the host driver to fix us up based on the transfer residual.
|
|
|
|
|
*/
|
|
|
|
|
mvi PDATA_REINIT call set_seqint;
|
|
|
|
|
jmp data_phase_loop;
|
|
|
|
|
|
|
|
|
|
data_phase_initialize:
|
|
|
|
|
/* We have seen a data phase for the first time */
|
1998-09-15 07:24:17 +00:00
|
|
|
or SEQ_FLAGS, DPHASE;
|
|
|
|
|
|
1996-10-25 06:34:59 +00:00
|
|
|
/*
|
|
|
|
|
* Initialize the DMA address and counter from the SCB.
|
2000-07-18 20:12:14 +00:00
|
|
|
* Also set SCB_RESIDUAL_SGPTR, including the LAST_SEG
|
|
|
|
|
* flag in the highest byte of the data count. We cannot
|
|
|
|
|
* modify the saved values in the SCB until we see a save
|
|
|
|
|
* data pointers message.
|
1996-10-25 06:34:59 +00:00
|
|
|
*/
|
2001-07-18 21:39:48 +00:00
|
|
|
if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
|
|
|
|
|
/* The lowest address byte must be loaded last. */
|
|
|
|
|
mov SCB_DATACNT[3] call set_hhaddr;
|
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
bmov HADDR, SCB_DATAPTR, 7;
|
2000-07-18 20:12:14 +00:00
|
|
|
bmov SCB_RESIDUAL_DATACNT[3], SCB_DATACNT[3], 5;
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
|
|
|
|
mvi DINDEX, HADDR;
|
|
|
|
|
mvi SCB_DATAPTR call bcopy_7;
|
2000-07-18 20:12:14 +00:00
|
|
|
mvi DINDEX, SCB_RESIDUAL_DATACNT + 3;
|
|
|
|
|
mvi SCB_DATACNT + 3 call bcopy_5;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0 && ahc->pci_cachesize != 0) {
|
|
|
|
|
call calc_mwi_residual;
|
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
and SCB_RESIDUAL_SGPTR[0], ~SG_FULL_RESID;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) == 0) {
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
bmov STCNT, HCNT, 3;
|
|
|
|
|
} else {
|
|
|
|
|
call set_stcnt_from_hcnt;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
1995-08-05 17:31:39 +00:00
|
|
|
data_phase_loop:
|
2000-07-18 20:12:14 +00:00
|
|
|
/* Guard against overruns */
|
|
|
|
|
test SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL jz data_phase_inbounds;
|
|
|
|
|
|
|
|
|
|
/*
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
* Turn on `Bit Bucket' mode, wait until the target takes
|
|
|
|
|
* us to another phase, and then notify the host.
|
2000-07-18 20:12:14 +00:00
|
|
|
*/
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
and DMAPARAMS, DIRECTION;
|
|
|
|
|
mov DFCNTRL, DMAPARAMS;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
or SXFRCTL1,BITBUCKET;
|
2001-05-15 19:41:12 +00:00
|
|
|
if ((ahc->features & AHC_DT) == 0) {
|
|
|
|
|
test SSTAT1,PHASEMIS jz .;
|
|
|
|
|
} else {
|
|
|
|
|
test SCSIPHASE, DATA_PHASE_MASK jnz .;
|
|
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
and SXFRCTL1, ~BITBUCKET;
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi DATA_OVERRUN call set_seqint;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
jmp ITloop;
|
|
|
|
|
|
1996-06-09 17:33:18 +00:00
|
|
|
data_phase_inbounds:
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
mov SINDEX, SCB_RESIDUAL_SGPTR[0];
|
|
|
|
|
test SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz . + 2;
|
|
|
|
|
or SINDEX, LAST_SEG;
|
|
|
|
|
mov SG_CACHE_PRE, SINDEX;
|
|
|
|
|
mov DFCNTRL, DMAPARAMS;
|
|
|
|
|
ultra2_dma_loop:
|
|
|
|
|
call idle_loop;
|
|
|
|
|
/*
|
|
|
|
|
* The transfer is complete if either the last segment
|
|
|
|
|
* completes or the target changes phase.
|
|
|
|
|
*/
|
|
|
|
|
test SG_CACHE_SHADOW, LAST_SEG_DONE jnz ultra2_dmafinish;
|
2001-05-15 19:41:12 +00:00
|
|
|
if ((ahc->features & AHC_DT) == 0) {
|
|
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
|
|
|
|
/*
|
|
|
|
|
* As a target, we control the phases,
|
|
|
|
|
* so ignore PHASEMIS.
|
|
|
|
|
*/
|
|
|
|
|
test SSTAT0, TARGET jnz ultra2_dma_loop;
|
|
|
|
|
}
|
|
|
|
|
if ((ahc->flags & AHC_INITIATORROLE) != 0) {
|
|
|
|
|
test SSTAT1,PHASEMIS jz ultra2_dma_loop;
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
test DFCNTRL, SCSIEN jnz ultra2_dma_loop;
|
ahc_eisa.c:
ahc_pci.c:
Add detach support.
Make use of soft allocated on our behalf by newbus.
For PCI devices, disable the mapping type we aren't
using for extra protection from rogue code.
aic7xxx_93cx6.c:
aic7xxx_93cx6.h:
Sync perforce IDs.
aic7xxx_freebsd.c:
Capture the eventhandle returned by EVENTHANDER_REGISTER
so we can kill the handler off during detach.
Use AHC_* constants instead of hard coded numbers in a
few more places.
Test PPR option state when deciding to "really" negotiate
when the CAM_NEGOTIATE flag is passed in a CCB.
Make use of core "ahc_pause_and_flushwork" routine in our
timeout handler rather than re-inventing this code.
Cleanup all of our resources (really!) in ahc_platform_free().
We should be all set to become a module now.
Implement the core ahc_detach() routine shared by all of
the FreeBSD front-ends.
aic7xxx_freebsd.h:
Softc storage for our event handler.
Null implementation for the ahc_platform_flushwork() OSM
callback. FreeBSD doesn't need this as XPT callbacks are
safe from all contexts and are done directly in ahc_done().
aic7xxx_inline.h:
Implement new lazy interrupt scheme. To avoid an extra
PCI bus read, we first check our completion queues to
see if any work has completed. If work is available, we
assume that this is the source of the interrupt and skip
reading INTSTAT. Any remaining interrupt status will be
cleared by a second call to the interrupt handler should
the interrupt line still be asserted. This drops the
interrupt handler down to a single PCI bus read in the
common case of I/O completion. This is the same overhead
as in the not so distant past, but the extra sanity of
perforning a PCI read after clearing the command complete
interrupt and before running the completion queue to avoid
missing command complete interrupts added a cycle.
aic7xxx.c:
During initialization, be sure to initialize all scratch
ram locations before they are read to avoid parity errors.
In this case, we use a new function, ahc_unbusy_tcl() to
initialize the scratch ram busy target table.
Replace instances of ahc_index_busy_tcl() used to unbusy
a tcl without looking at the old value with ahc_unbusy_tcl().
Modify ahc_sent_msg so that it can find single byte messages.
ahc_sent_msg is now used to determine if a transfer negotiation
attempt resulted in a bus free.
Be more careful in filtering out only the SCSI interrupts
of interest in ahc_handle_scsiint.
Rearrange interrupt clearing code to ensure that at least
one PCI transaction occurrs after hitting CLRSINT1 and
writting to CLRINT. CLRSINT1 writes take a bit to
take effect, and the re-arrangement provides sufficient
delay to ensure the write to CLRINT is effective. The
old code might report a spurious interrupt on some "fast"
chipsets.
export ahc-update_target_msg_request for use by OSM code.
If a target does not respond to our ATN request, clear
it once we move to a non-message phase. This avoids
sending a MSG_NOOP in some later message out phase.
Use max lun and max target constants instead of
hard-coded values.
Use softc storage built into our device_t under FreeBSD.
Fix a bug in ahc_free() that caused us to delete
resources that were not allocated.
Clean up any tstate/lstate info in ahc_free().
Clear the powerdown state in ahc_reset() so that
registers can be accessed.
Add a preliminary function for pausing the chip and
processing any posted work.
Add a preliminary suspend and resume functions.
aic7xxx.h:
Limit the number of supported luns to 64. We don't
support information unit transfers, so this is the
maximum that makes sense for these chips.
Add a new flag AHC_ALL_INTERRUPTS that forces the
processing of all interrupt state in a single invokation
of ahc_intr(). When the flag is not set, we use the
lazy interrupt handling scheme.
Add data structures to store controller state while
we are suspended.
Use constants instead of hard coded values where appropriate.
Correct some harmless "unsigned/signed" conflicts.
aic7xxx.seq:
Only perform the SCSIBUSL fix on ULTRA2 or newer controllers.
Older controllers seem to be confused by this.
In target mode, ignore PHASEMIS during data phases.
This bit seems to be flakey on U160 controllers acting
in target mode.
aic7xxx_pci.c:
Add support for the 29160C CPCI adapter.
Add definitions for subvendor ID information
available for devices with the "9005" vendor id.
We currently use this information to determine
if a multi-function device doesn't have the second
channel hooked up on a board.
Add rudimentary power mode code so we can put the
controller into the D0 state. In the future this
will be an OSM callback so that in FreeBSD we don't
duplicate functionality provided by the PCI code.
The powerstate code was added after I'd completed
my regression tests on this code.
Only capture "left over BIOS state" if the POWRDN
setting is not set in HCNTRL.
In target mode, don't bother sending incremental
CRC data.
2000-12-20 01:11:37 +00:00
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
|
|
|
|
|
ultra2_dmafinish:
|
2001-05-15 19:41:12 +00:00
|
|
|
/*
|
|
|
|
|
* The transfer has terminated either due to a phase
|
|
|
|
|
* change, and/or the completion of the last segment.
|
|
|
|
|
* We have two goals here. Do as much other work
|
|
|
|
|
* as possible while the data fifo drains on a read
|
|
|
|
|
* and respond as quickly as possible to the standard
|
|
|
|
|
* messages (save data pointers/disconnect and command
|
|
|
|
|
* complete) that usually follow a data phase.
|
|
|
|
|
*/
|
2000-07-18 20:12:14 +00:00
|
|
|
if ((ahc->bugs & AHC_AUTOFLUSH_BUG) != 0) {
|
|
|
|
|
/*
|
2001-05-15 19:41:12 +00:00
|
|
|
* On chips with broken auto-flush, start
|
|
|
|
|
* the flushing process now. We'll poke
|
|
|
|
|
* the chip from time to time to keep the
|
|
|
|
|
* flush process going as we complete the
|
|
|
|
|
* data phase.
|
2000-07-18 20:12:14 +00:00
|
|
|
*/
|
|
|
|
|
or DFCNTRL, FIFOFLUSH;
|
|
|
|
|
}
|
ahc_pci.c:
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
2000-07-27 23:17:52 +00:00
|
|
|
/*
|
2001-05-15 19:41:12 +00:00
|
|
|
* We assume that, even though data may still be
|
|
|
|
|
* transferring to the host, that the SCSI side of
|
|
|
|
|
* the DMA engine is now in a static state. This
|
|
|
|
|
* allows us to update our notion of where we are
|
|
|
|
|
* in this transfer.
|
|
|
|
|
*
|
ahc_pci.c:
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
2000-07-27 23:17:52 +00:00
|
|
|
* If, by chance, we stopped before being able
|
|
|
|
|
* to fetch additional segments for this transfer,
|
|
|
|
|
* yet the last S/G was completely exhausted,
|
|
|
|
|
* call our idle loop until it is able to load
|
|
|
|
|
* another segment. This will allow us to immediately
|
|
|
|
|
* pickup on the next segment on the next data phase.
|
|
|
|
|
*
|
|
|
|
|
* If we happened to stop on the last segment, then
|
|
|
|
|
* our residual information is still correct from
|
|
|
|
|
* the idle loop and there is no need to perform
|
2001-05-15 19:41:12 +00:00
|
|
|
* any fixups.
|
ahc_pci.c:
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
2000-07-27 23:17:52 +00:00
|
|
|
*/
|
|
|
|
|
ultra2_ensure_sg:
|
|
|
|
|
test SG_CACHE_SHADOW, LAST_SEG jz ultra2_shvalid;
|
|
|
|
|
/* Record if we've consumed all S/G entries */
|
2002-04-24 16:58:51 +00:00
|
|
|
test SSTAT2, SHVALID jnz residuals_correct;
|
ahc_pci.c:
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
2000-07-27 23:17:52 +00:00
|
|
|
or SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL;
|
2001-05-15 19:41:12 +00:00
|
|
|
jmp residuals_correct;
|
ahc_pci.c:
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
2000-07-27 23:17:52 +00:00
|
|
|
|
|
|
|
|
ultra2_shvalid:
|
2002-04-24 16:58:51 +00:00
|
|
|
test SSTAT2, SHVALID jnz sgptr_fixup;
|
ahc_pci.c:
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
2000-07-27 23:17:52 +00:00
|
|
|
call idle_loop;
|
|
|
|
|
jmp ultra2_ensure_sg;
|
|
|
|
|
|
|
|
|
|
sgptr_fixup:
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
|
* Fixup the residual next S/G pointer. The S/G preload
|
|
|
|
|
* feature of the chip allows us to load two elements
|
|
|
|
|
* in addition to the currently active element. We
|
|
|
|
|
* store the bottom byte of the next S/G pointer in
|
|
|
|
|
* the SG_CACEPTR register so we can restore the
|
|
|
|
|
* correct value when the DMA completes. If the next
|
|
|
|
|
* sg ptr value has advanced to the point where higher
|
|
|
|
|
* bytes in the address have been affected, fix them
|
|
|
|
|
* too.
|
|
|
|
|
*/
|
|
|
|
|
test SG_CACHE_SHADOW, 0x80 jz sgptr_fixup_done;
|
|
|
|
|
test SCB_RESIDUAL_SGPTR[0], 0x80 jnz sgptr_fixup_done;
|
|
|
|
|
add SCB_RESIDUAL_SGPTR[1], -1;
|
|
|
|
|
adc SCB_RESIDUAL_SGPTR[2], -1;
|
|
|
|
|
adc SCB_RESIDUAL_SGPTR[3], -1;
|
|
|
|
|
sgptr_fixup_done:
|
|
|
|
|
and SCB_RESIDUAL_SGPTR[0], SG_ADDR_MASK, SG_CACHE_SHADOW;
|
2003-05-26 21:24:01 +00:00
|
|
|
/* We are not the last seg */
|
|
|
|
|
and SCB_RESIDUAL_DATACNT[3], ~SG_LAST_SEG;
|
2001-05-15 19:41:12 +00:00
|
|
|
residuals_correct:
|
|
|
|
|
/*
|
|
|
|
|
* Go ahead and shut down the DMA engine now.
|
|
|
|
|
* In the future, we'll want to handle end of
|
|
|
|
|
* transfer messages prior to doing this, but this
|
|
|
|
|
* requires similar restructuring for pre-ULTRA2
|
|
|
|
|
* controllers.
|
|
|
|
|
*/
|
|
|
|
|
test DMAPARAMS, DIRECTION jnz ultra2_fifoempty;
|
|
|
|
|
ultra2_fifoflush:
|
|
|
|
|
if ((ahc->features & AHC_DT) == 0) {
|
|
|
|
|
if ((ahc->bugs & AHC_AUTOFLUSH_BUG) != 0) {
|
|
|
|
|
/*
|
|
|
|
|
* On Rev A of the aic7890, the autoflush
|
|
|
|
|
* feature doesn't function correctly.
|
|
|
|
|
* Perform an explicit manual flush. During
|
|
|
|
|
* a manual flush, the FIFOEMP bit becomes
|
|
|
|
|
* true every time the PCI FIFO empties
|
|
|
|
|
* regardless of the state of the SCSI FIFO.
|
|
|
|
|
* It can take up to 4 clock cycles for the
|
|
|
|
|
* SCSI FIFO to get data into the PCI FIFO
|
|
|
|
|
* and for FIFOEMP to de-assert. Here we
|
|
|
|
|
* guard against this condition by making
|
|
|
|
|
* sure the FIFOEMP bit stays on for 5 full
|
|
|
|
|
* clock cycles.
|
|
|
|
|
*/
|
|
|
|
|
or DFCNTRL, FIFOFLUSH;
|
|
|
|
|
test DFSTATUS, FIFOEMP jz ultra2_fifoflush;
|
|
|
|
|
test DFSTATUS, FIFOEMP jz ultra2_fifoflush;
|
|
|
|
|
test DFSTATUS, FIFOEMP jz ultra2_fifoflush;
|
|
|
|
|
test DFSTATUS, FIFOEMP jz ultra2_fifoflush;
|
|
|
|
|
}
|
|
|
|
|
test DFSTATUS, FIFOEMP jz ultra2_fifoflush;
|
|
|
|
|
} else {
|
|
|
|
|
/*
|
|
|
|
|
* We enable the auto-ack feature on DT capable
|
|
|
|
|
* controllers. This means that the controller may
|
|
|
|
|
* have already transferred some overrun bytes into
|
|
|
|
|
* the data FIFO and acked them on the bus. The only
|
|
|
|
|
* way to detect this situation is to wait for
|
|
|
|
|
* LAST_SEG_DONE to come true on a completed transfer
|
|
|
|
|
* and then test to see if the data FIFO is non-empty.
|
|
|
|
|
*/
|
2003-05-26 21:24:55 +00:00
|
|
|
test SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL
|
|
|
|
|
jz ultra2_wait_fifoemp;
|
2001-05-15 19:41:12 +00:00
|
|
|
test SG_CACHE_SHADOW, LAST_SEG_DONE jz .;
|
2003-05-26 21:24:55 +00:00
|
|
|
/*
|
|
|
|
|
* FIFOEMP can lag LAST_SEG_DONE. Wait a few
|
|
|
|
|
* clocks before calling this an overrun.
|
|
|
|
|
*/
|
|
|
|
|
test DFSTATUS, FIFOEMP jnz ultra2_fifoempty;
|
|
|
|
|
test DFSTATUS, FIFOEMP jnz ultra2_fifoempty;
|
2001-05-15 19:41:12 +00:00
|
|
|
test DFSTATUS, FIFOEMP jnz ultra2_fifoempty;
|
|
|
|
|
/* Overrun */
|
|
|
|
|
jmp data_phase_loop;
|
2003-05-26 21:24:55 +00:00
|
|
|
ultra2_wait_fifoemp:
|
2001-05-15 19:41:12 +00:00
|
|
|
test DFSTATUS, FIFOEMP jz .;
|
|
|
|
|
}
|
|
|
|
|
ultra2_fifoempty:
|
|
|
|
|
/* Don't clobber an inprogress host data transfer */
|
|
|
|
|
test DFSTATUS, MREQPEND jnz ultra2_fifoempty;
|
|
|
|
|
ultra2_dmahalt:
|
|
|
|
|
and DFCNTRL, ~(SCSIEN|HDMAEN);
|
|
|
|
|
test DFCNTRL, SCSIEN|HDMAEN jnz .;
|
2001-07-18 21:39:48 +00:00
|
|
|
if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
|
|
|
|
|
/*
|
|
|
|
|
* Keep HHADDR cleared for future, 32bit addressed
|
|
|
|
|
* only, DMA operations.
|
|
|
|
|
*
|
|
|
|
|
* Due to bayonette style S/G handling, our residual
|
|
|
|
|
* data must be "fixed up" once the transfer is halted.
|
|
|
|
|
* Here we fixup the HSHADDR stored in the high byte
|
|
|
|
|
* of the residual data cnt. By postponing the fixup,
|
|
|
|
|
* we can batch the clearing of HADDR with the fixup.
|
|
|
|
|
* If we halted on the last segment, the residual is
|
|
|
|
|
* already correct. If we are not on the last
|
|
|
|
|
* segment, copy the high address directly from HSHADDR.
|
|
|
|
|
* We don't need to worry about maintaining the
|
|
|
|
|
* SG_LAST_SEG flag as it will always be false in the
|
|
|
|
|
* case where an update is required.
|
|
|
|
|
*/
|
|
|
|
|
or DSCOMMAND1, HADDLDSEL0;
|
|
|
|
|
test SG_CACHE_SHADOW, LAST_SEG jnz . + 2;
|
|
|
|
|
mov SCB_RESIDUAL_DATACNT[3], SHADDR;
|
|
|
|
|
clr HADDR;
|
|
|
|
|
and DSCOMMAND1, ~HADDLDSEL0;
|
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
2000-07-18 20:12:14 +00:00
|
|
|
/* If we are the last SG block, tell the hardware. */
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
|
|
|
|
|
&& ahc->pci_cachesize != 0) {
|
|
|
|
|
test MWI_RESIDUAL, 0xFF jnz dma_mid_sg;
|
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
test SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz dma_mid_sg;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
ahc_pci.c:
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
2000-07-27 23:17:52 +00:00
|
|
|
test SSTAT0, TARGET jz dma_last_sg;
|
ahc_eisa.c:
ahc_pci.c:
ahd_pci.c:
aic7xxx.c:
aic79xx.c:
aic_osm_lib.c:
aic_osm_lib.h:
Use common OSM routines from aic_osm_lib for bus dma operations,
delay routines, accessing CCBs, byte swapping, etc.
aic7xxx_pci.c:
Provide a better description for the 2915/30LP on attach.
aic7xxx.c:
aic79xx.c:
aic7770.c:
aic79xx_pci.c:
aic7xxx_pci.c:
aic7xxx_93cx6.c:
Move FBSDID behind an ifdef so that these core files will
still compile under other OSes.
aic79xx.h:
aic79xx_pci.c:
aic79xx.seq:
To speed up non-packetized CDB delivery in Rev B, all CDB
acks are "released" to the output sync as soon as the
command phase starts. There is only one problem with this
approach. If the target changes phase before all data are
sent, we have left over acks that can go out on the bus in
a data phase. Due to other chip contraints, this only
happens if the target goes to data-in, but if the acks go
out before we can test SDONE, we'll think that the transfer
has completed successfully. Work around this by taking
advantage of the 400ns or 800ns dead time between command
phase and the REQ of the new phase. If the transfer has
completed successfully, SCSIEN should fall *long* before we
see a phase change. We thus treat any phasemiss that
occurs before SCSIEN falls as an incomplete transfer.
aic79xx.h:
Add the AHD_FAST_CDB_DELIVERY feature.
aic79xx_pci.c:
Set AHD_FAST_CDB_DELIVERY for all Rev. B parts.
aic79xx.seq:
Test for PHASEMIS in the command phase for
all AHD_FAST_CDB_DELIVERY controlelrs.
ahd_pci.c:
ahc_pci.c:
aic7xxx.h:
aic79xx.h:
Move definition of controller BAR offsets to core header files.
aic7xxx.c:
aic79xx.c:
In the softc free routine, leave removal of a softc from the
global list of softcs to the OSM (the caller of this routine).
This allows us to avoid holding the softc list_lock during device
destruction where we may have to sleep waiting for our recovery
thread to halt.
ahc_pci.c:
Use ahc_pci_test_register access to validate I/O mapped in
addition to the tests already performed for memory mapped
access.
Remove unused ahc_power_state_change() function. The PCI
layer in both 4.X and 5.X now offer this functionality.
ahd_pci.c:
Remove reduntant definition of controller BAR offsets. These
are also defined in aic79xx.h.
Remove unused ahd_power_state_change() function. The PCI
layer in both 4.X and 5.X now offer this functionality.
aic7xxx.c:
aic79xx.c:
aic79xx.h:
aic7xxx.h:
aic7xxx_osm.c:
aic79xx_osm.c:
Move timeout handling to the driver cores. In the case
of the aic79xx driver, the algorithm has been enhanced
to try target resets before performing a bus reset. For
the aic7xxx driver, the algorithm is unchanged. Although
the drivers do not currently sleep during recovery (recovery
is timeout driven), the cores do expect all processing to
be performed via a recovery thread. Our timeout handlers
are now little stubs that wakeup the recovery thread.
aic79xx.c:
aic79xx.h:
aic79xx_inline.h:
Change shared_data allocation to use a map_node so
that the sentinel hscb can use this map node in
ahd_swap_with_next_hscb. This routine now swaps
the hscb_map pointer in additon to the hscb
contents so that any sync operations occur on
the correct map.
physaddr -> busaddr
Pointed out by: Jason Thorpe <thorpej@wasabisystems.com>
aic79xx.c:
Make more use of the in/out/w/l/q macros for accessing
byte registers in the chip.
Correct some issues in the ahd_flush_qoutfifo() routine.
o Run the qoutfifo only once the command channel
DMA engine has been halted. This closes a window
where we might have missed some entries.
o Change ahd_run_data_fifo() to not loop to completion.
If we happen to start on the wrong FIFO and the other
FIFO has a snapshot savepointers, we might deadlock.
This required our delay between FIFO tests to be
moved to the ahd_flush_qoutfifo() routine.
o Update/add comments.
o Remove spurious test for COMPLETE_DMA list being empty
when completing transactions from the GSFIFO with
residuals. The SCB must be put on the COMPLETE_DMA
scb list unconditionally.
o When halting command channel DMA activity, we must
disable the DMA channel in all cases but an update
of the QOUTFIFO. The latter case is required so
that the sequencer will update its position in the
QOUTFIFO. Previously, we left the channel enabled
for all "push" DMAs. This left us vulnerable to
the sequencer handling an SCB push long after that
SCB was already processed manually by this routine.
o Correct the polarity of tests involving
ahd_scb_active_in_fifo(). This routine returns
non-zero for true.
Return to processing bad status completions through
the qoutfifo. This reduces the time that the sequencer
is kept paused when handling transactions with bad
status or underruns.
When waiting for the controller to quiece selections,
add a delay to our loop. Otherwise we may fail to wait
long enough for the sequencer to comply.
On H2A4 hardware, use the slow slewrate for non-paced
transfers. This mirrors what the Adaptec Windows
drivers do.
On the Rev B. only slow down the CRC timing for
older U160 devices that might need the slower timing.
We define "older" as devices that do not support
packetized protocol.
Wait up to 5000 * 5us for the SEEPROM to become unbusy.
Write ops seem to take much longer than read ops.
aic79xx.seq:
For controllers with the FAINT_LED bug, turn the diagnostic
led feature on during selection and reselection. This covers
the non-packetized case. The LED will be disabled for
non-packetized transfers once we return to the top level idle
loop. Add more comments about the busy LED workaround.
Extend a critical section around the entire
command channel idle loop process. Previously
the portion of this handler that directly manipulated
the linked list of completed SCBs was not protected.
This is the likely cause of the recent reports of
commands being completed twice by the driver.
Extend critical sections across the test for,
and the longjump to, longjump routines. This
prevents the firmware from trying to jump to
a longjmp handler that was just cleared by the
host.
Improve the locations of several critical section
begin and end points. Typically these changes
remove instructions that did not need to be
inside a critical section.
Close the "busfree after selection, but before busfree
interrupts can be enabled" race to just a single sequencer
instruction. We now test the BSY line explicitly before
clearing the busfree status and enabling the busfree
interrupt.
Close a race condition in the processing of HS_MAILBOX
updates. We now clear the "updated" status before the
copy. This ensures that we don't accidentally clear
the status incorrectly when the host sneaks in an update
just after our last copy, but before we clear the status.
This race has never been observed.
Don't re-enable SCSIEN if we lose the race to disable SCSIEN
in our interrupt handler's workaround for the RevA data-valid
too early issue.
aic79xx_inline.h:
Add comments indicating that the order in which bytes are
read or written in ahd_inw and ahd_outw is important. This
allows us to use these inlines when accessing registers with
side-effects.
aic79xx_pci.c:
The 29320 and the 29320B are 7902 not 7901 based products.
Correct the driver banner.
aic7xxx.h:
Enable the use of the auto-access pause feature
on the aic7870 and aic7880. It was disabled due
to an oversight.
aic7xxx.reg:
Move TARG_IMMEDIATE_SCB to alias LAST_MSG to
avoid leaving garbage in MWI_RESIDUAL. This
prevents spurious overflows whn operating target
mode on controllers that require the MWI_RESIDUAL
work-around.
aic7xxx.seq:
AHC_TMODE_WIDEODD_BUG is a bug, not a softc flag.
Reference the correct softc field when testing
for its presence.
Set the NOT_IDENTIFIED and NO_CDB_SENT bits
in SEQ_FLAGS to indicate that the nexus is
invalid in await busfree.
aic7xxx_93cx6.c:
Add support for the C56/C66 versions of the EWEN and EWDS
commands.
aic7xxx.c:
aic7xxx_pci.c:
Move test for the validity of left over BIOS data
to ahc_test_register_access(). This guarantees that
any left over CHIPRST value is not clobbered by our
register access test and lost to the test that was
in ahc_reset.
2003-12-17 00:02:10 +00:00
|
|
|
if ((ahc->bugs & AHC_TMODE_WIDEODD_BUG) != 0) {
|
ahc_pci.c:
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
2000-07-27 23:17:52 +00:00
|
|
|
test DMAPARAMS, DIRECTION jz dma_mid_sg;
|
|
|
|
|
}
|
2000-02-09 21:25:00 +00:00
|
|
|
}
|
ahc_pci.c:
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
2000-07-27 23:17:52 +00:00
|
|
|
dma_last_sg:
|
1998-09-15 07:24:17 +00:00
|
|
|
and DMAPARAMS, ~WIDEODD;
|
2000-07-18 20:12:14 +00:00
|
|
|
dma_mid_sg:
|
|
|
|
|
/* Start DMA data transfer. */
|
1998-09-15 07:24:17 +00:00
|
|
|
mov DFCNTRL, DMAPARAMS;
|
2000-07-18 20:12:14 +00:00
|
|
|
dma_loop:
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
call idle_loop;
|
|
|
|
|
}
|
|
|
|
|
test SSTAT0,DMADONE jnz dma_dmadone;
|
|
|
|
|
test SSTAT1,PHASEMIS jz dma_loop; /* ie. underrun */
|
|
|
|
|
dma_phasemis:
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-07-18 20:12:14 +00:00
|
|
|
* We will be "done" DMAing when the transfer count goes to
|
|
|
|
|
* zero, or the target changes the phase (in light of this,
|
|
|
|
|
* it makes sense that the DMA circuitry doesn't ACK when
|
|
|
|
|
* PHASEMIS is active). If we are doing a SCSI->Host transfer,
|
|
|
|
|
* the data FIFO should be flushed auto-magically on STCNT=0
|
|
|
|
|
* or a phase change, so just wait for FIFO empty status.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-07-18 20:12:14 +00:00
|
|
|
dma_checkfifo:
|
|
|
|
|
test DFCNTRL,DIRECTION jnz dma_fifoempty;
|
|
|
|
|
dma_fifoflush:
|
|
|
|
|
test DFSTATUS,FIFOEMP jz dma_fifoflush;
|
|
|
|
|
dma_fifoempty:
|
|
|
|
|
/* Don't clobber an inprogress host data transfer */
|
|
|
|
|
test DFSTATUS, MREQPEND jnz dma_fifoempty;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
/*
|
2000-07-18 20:12:14 +00:00
|
|
|
* Now shut off the DMA and make sure that the DMA
|
|
|
|
|
* hardware has actually stopped. Touching the DMA
|
|
|
|
|
* counters, etc. while a DMA is active will result
|
|
|
|
|
* in an ILLSADDR exception.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-07-18 20:12:14 +00:00
|
|
|
dma_dmadone:
|
|
|
|
|
and DFCNTRL, ~(SCSIEN|SDMAEN|HDMAEN);
|
|
|
|
|
dma_halt:
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-09-16 20:02:28 +00:00
|
|
|
* Some revisions of the aic78XX have a problem where, if the
|
2000-07-18 20:12:14 +00:00
|
|
|
* data fifo is full, but the PCI input latch is not empty,
|
|
|
|
|
* HDMAEN cannot be cleared. The fix used here is to drain
|
|
|
|
|
* the prefetched but unused data from the data fifo until
|
|
|
|
|
* there is space for the input latch to drain.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->bugs & AHC_PCI_2_1_RETRY_BUG) != 0) {
|
|
|
|
|
mov NONE, DFDAT;
|
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
test DFCNTRL, (SCSIEN|SDMAEN|HDMAEN) jnz dma_halt;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
/* See if we have completed this last segment */
|
|
|
|
|
test STCNT[0], 0xff jnz data_phase_finish;
|
|
|
|
|
test STCNT[1], 0xff jnz data_phase_finish;
|
|
|
|
|
test STCNT[2], 0xff jnz data_phase_finish;
|
1999-01-14 06:14:15 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
|
* Advance the scatter-gather pointers if needed
|
|
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
|
|
|
|
|
&& ahc->pci_cachesize != 0) {
|
|
|
|
|
test MWI_RESIDUAL, 0xFF jz no_mwi_resid;
|
|
|
|
|
/*
|
|
|
|
|
* Reload HADDR from SHADDR and setup the
|
|
|
|
|
* count to be the size of our residual.
|
|
|
|
|
*/
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
bmov HADDR, SHADDR, 4;
|
|
|
|
|
mov HCNT, MWI_RESIDUAL;
|
|
|
|
|
bmov HCNT[1], ALLZEROS, 2;
|
|
|
|
|
} else {
|
|
|
|
|
mvi DINDEX, HADDR;
|
|
|
|
|
mvi SHADDR call bcopy_4;
|
|
|
|
|
mov MWI_RESIDUAL call set_hcnt;
|
|
|
|
|
}
|
|
|
|
|
clr MWI_RESIDUAL;
|
|
|
|
|
jmp sg_load_done;
|
|
|
|
|
no_mwi_resid:
|
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
test SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz sg_load;
|
|
|
|
|
or SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL;
|
|
|
|
|
jmp data_phase_finish;
|
|
|
|
|
sg_load:
|
|
|
|
|
/*
|
|
|
|
|
* Load the next SG element's data address and length
|
|
|
|
|
* into the DMA engine. If we don't have hardware
|
|
|
|
|
* to perform a prefetch, we'll have to fetch the
|
|
|
|
|
* segment from host memory first.
|
|
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
/* Wait for the idle loop to complete */
|
|
|
|
|
test CCSGCTL, CCSGEN jz . + 3;
|
|
|
|
|
call idle_loop;
|
|
|
|
|
test CCSGCTL, CCSGEN jnz . - 1;
|
|
|
|
|
bmov HADDR, CCSGRAM, 7;
|
2001-07-18 21:39:48 +00:00
|
|
|
/*
|
|
|
|
|
* Workaround for flaky external SCB RAM
|
|
|
|
|
* on certain aic7895 setups. It seems
|
|
|
|
|
* unable to handle direct transfers from
|
|
|
|
|
* S/G ram to certain SCB locations.
|
|
|
|
|
*/
|
|
|
|
|
mov SINDEX, CCSGRAM;
|
|
|
|
|
mov SCB_RESIDUAL_DATACNT[3], SINDEX;
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
2001-07-18 21:39:48 +00:00
|
|
|
if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
|
|
|
|
|
mov ALLZEROS call set_hhaddr;
|
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
mvi DINDEX, HADDR;
|
|
|
|
|
mvi SCB_RESIDUAL_SGPTR call bcopy_4;
|
|
|
|
|
|
|
|
|
|
mvi SG_SIZEOF call set_hcnt;
|
|
|
|
|
|
|
|
|
|
or DFCNTRL, HDMAEN|DIRECTION|FIFORESET;
|
|
|
|
|
|
|
|
|
|
call dma_finish;
|
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
mvi DINDEX, HADDR;
|
|
|
|
|
call dfdat_in_7;
|
2000-07-18 20:12:14 +00:00
|
|
|
mov SCB_RESIDUAL_DATACNT[3], DFDAT;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
|
2001-07-18 21:39:48 +00:00
|
|
|
if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
|
|
|
|
|
mov SCB_RESIDUAL_DATACNT[3] call set_hhaddr;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* The lowest address byte must be loaded
|
|
|
|
|
* last as it triggers the computation of
|
|
|
|
|
* some items in the PCI block. The ULTRA2
|
|
|
|
|
* chips do this on PRELOAD.
|
|
|
|
|
*/
|
|
|
|
|
mov HADDR, HADDR;
|
|
|
|
|
}
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
|
|
|
|
|
&& ahc->pci_cachesize != 0) {
|
|
|
|
|
call calc_mwi_residual;
|
|
|
|
|
}
|
1994-11-17 20:19:10 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
/* Point to the new next sg in memory */
|
|
|
|
|
call sg_advance;
|
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
sg_load_done:
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
bmov STCNT, HCNT, 3;
|
|
|
|
|
} else {
|
|
|
|
|
call set_stcnt_from_hcnt;
|
|
|
|
|
}
|
|
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
test SSTAT0, TARGET jnz data_phase_loop;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
data_phase_finish:
|
|
|
|
|
/*
|
|
|
|
|
* If the target has left us in data phase, loop through
|
|
|
|
|
* the dma code again. In the case of ULTRA2 adapters,
|
|
|
|
|
* we should only loop if there is a data overrun. For
|
|
|
|
|
* all other adapters, we'll loop after each S/G element
|
|
|
|
|
* is loaded as well as if there is an overrun.
|
|
|
|
|
*/
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
test SSTAT0, TARGET jnz data_phase_done;
|
1998-12-10 04:14:50 +00:00
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_INITIATORROLE) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
test SSTAT1, REQINIT jz .;
|
2001-05-15 19:41:12 +00:00
|
|
|
if ((ahc->features & AHC_DT) == 0) {
|
|
|
|
|
test SSTAT1,PHASEMIS jz data_phase_loop;
|
|
|
|
|
} else {
|
|
|
|
|
test SCSIPHASE, DATA_PHASE_MASK jnz data_phase_loop;
|
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
1995-08-05 17:31:39 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
data_phase_done:
|
|
|
|
|
/*
|
|
|
|
|
* After a DMA finishes, save the SG and STCNT residuals back into
|
|
|
|
|
* the SCB. We use STCNT instead of HCNT, since it's a reflection
|
|
|
|
|
* of how many bytes were transferred on the SCSI (as opposed to the
|
|
|
|
|
* host) bus.
|
|
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
/* Kill off any pending prefetch */
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
call disable_ccsgen;
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
|
2001-07-18 21:39:48 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) == 0) {
|
|
|
|
|
/*
|
|
|
|
|
* Clear the high address byte so that all other DMA
|
|
|
|
|
* operations, which use 32bit addressing, can assume
|
|
|
|
|
* HHADDR is 0.
|
|
|
|
|
*/
|
|
|
|
|
if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
|
|
|
|
|
mov ALLZEROS call set_hhaddr;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Update our residual information before the information is
|
|
|
|
|
* lost by some other type of SCSI I/O (e.g. PIO). If we have
|
|
|
|
|
* transferred all data, no update is needed.
|
|
|
|
|
*
|
|
|
|
|
*/
|
|
|
|
|
test SCB_RESIDUAL_SGPTR, SG_LIST_NULL jnz residual_update_done;
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
|
|
|
|
|
&& ahc->pci_cachesize != 0) {
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
test MWI_RESIDUAL, 0xFF jz bmov_resid;
|
|
|
|
|
}
|
|
|
|
|
mov A, MWI_RESIDUAL;
|
|
|
|
|
add SCB_RESIDUAL_DATACNT[0], A, STCNT[0];
|
|
|
|
|
clr A;
|
|
|
|
|
adc SCB_RESIDUAL_DATACNT[1], A, STCNT[1];
|
|
|
|
|
adc SCB_RESIDUAL_DATACNT[2], A, STCNT[2];
|
|
|
|
|
clr MWI_RESIDUAL;
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
jmp . + 2;
|
|
|
|
|
bmov_resid:
|
|
|
|
|
bmov SCB_RESIDUAL_DATACNT, STCNT, 3;
|
|
|
|
|
}
|
|
|
|
|
} else if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
bmov SCB_RESIDUAL_DATACNT, STCNT, 3;
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
2000-09-16 20:02:28 +00:00
|
|
|
mov SCB_RESIDUAL_DATACNT[0], STCNT[0];
|
|
|
|
|
mov SCB_RESIDUAL_DATACNT[1], STCNT[1];
|
|
|
|
|
mov SCB_RESIDUAL_DATACNT[2], STCNT[2];
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2001-07-18 21:39:48 +00:00
|
|
|
residual_update_done:
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
|
* Since we've been through a data phase, the SCB_RESID* fields
|
|
|
|
|
* are now initialized. Clear the full residual flag.
|
|
|
|
|
*/
|
|
|
|
|
and SCB_SGPTR[0], ~SG_FULL_RESID;
|
1997-02-11 17:07:54 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
/* Clear the channel in case we return to data phase later */
|
1998-09-15 07:24:17 +00:00
|
|
|
or SXFRCTL0, CLRSTCNT|CLRCHN;
|
2000-11-06 20:05:38 +00:00
|
|
|
or SXFRCTL0, CLRSTCNT|CLRCHN;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
1997-02-11 17:07:54 +00:00
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
1998-12-10 04:14:50 +00:00
|
|
|
test SEQ_FLAGS, DPHASE_PENDING jz ITloop;
|
1998-09-15 07:24:17 +00:00
|
|
|
and SEQ_FLAGS, ~DPHASE_PENDING;
|
1999-01-14 06:14:15 +00:00
|
|
|
/*
|
|
|
|
|
* For data-in phases, wait for any pending acks from the
|
2002-04-24 16:58:51 +00:00
|
|
|
* initiator before changing phase. We only need to
|
|
|
|
|
* send Ignore Wide Residue messages for data-in phases.
|
1999-01-14 06:14:15 +00:00
|
|
|
*/
|
|
|
|
|
test DFCNTRL, DIRECTION jz target_ITloop;
|
|
|
|
|
test SSTAT1, REQINIT jnz .;
|
2003-05-26 21:24:01 +00:00
|
|
|
test SCB_LUN, SCB_XFERLEN_ODD jz target_ITloop;
|
2002-04-24 16:58:51 +00:00
|
|
|
test SCSIRATE, WIDEXFER jz target_ITloop;
|
|
|
|
|
/*
|
|
|
|
|
* Issue an Ignore Wide Residue Message.
|
|
|
|
|
*/
|
|
|
|
|
mvi P_MESGIN|BSYO call change_phase;
|
|
|
|
|
mvi MSG_IGN_WIDE_RESIDUE call target_outb;
|
|
|
|
|
mvi 1 call target_outb;
|
1998-09-15 07:24:17 +00:00
|
|
|
jmp target_ITloop;
|
2000-07-18 20:12:14 +00:00
|
|
|
} else {
|
|
|
|
|
jmp ITloop;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_INITIATORROLE) != 0) {
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
1996-04-20 21:20:31 +00:00
|
|
|
* Command phase. Set up the DMA registers and let 'er rip.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1994-11-17 20:19:10 +00:00
|
|
|
p_command:
|
2002-11-30 19:30:09 +00:00
|
|
|
test SEQ_FLAGS, NOT_IDENTIFIED jz p_command_okay;
|
|
|
|
|
mvi PROTO_VIOLATION call set_seqint;
|
2001-07-18 21:39:48 +00:00
|
|
|
p_command_okay:
|
1994-11-17 20:19:10 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
bmov HCNT[0], SCB_CDB_LEN, 1;
|
1998-09-15 07:24:17 +00:00
|
|
|
bmov HCNT[1], ALLZEROS, 2;
|
ahc_pci.c:
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
2000-07-27 23:17:52 +00:00
|
|
|
mvi SG_CACHE_PRE, LAST_SEG;
|
2000-07-18 20:12:14 +00:00
|
|
|
} else if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
bmov STCNT[0], SCB_CDB_LEN, 1;
|
|
|
|
|
bmov STCNT[1], ALLZEROS, 2;
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
2000-07-18 20:12:14 +00:00
|
|
|
mov STCNT[0], SCB_CDB_LEN;
|
|
|
|
|
clr STCNT[1];
|
|
|
|
|
clr STCNT[2];
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
add NONE, -13, SCB_CDB_LEN;
|
2000-09-16 20:02:28 +00:00
|
|
|
mvi SCB_CDB_STORE jnc p_command_embedded;
|
2000-07-18 20:12:14 +00:00
|
|
|
p_command_from_host:
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
bmov HADDR[0], SCB_CDB_PTR, 4;
|
|
|
|
|
mvi DFCNTRL, (PRELOADEN|SCSIEN|HDMAEN|DIRECTION);
|
|
|
|
|
} else {
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
bmov HADDR[0], SCB_CDB_PTR, 4;
|
2000-09-16 20:02:28 +00:00
|
|
|
bmov HCNT, STCNT, 3;
|
2000-07-18 20:12:14 +00:00
|
|
|
} else {
|
|
|
|
|
mvi DINDEX, HADDR;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
mvi SCB_CDB_PTR call bcopy_4;
|
|
|
|
|
mov SCB_CDB_LEN call set_hcnt;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
mvi DFCNTRL, (SCSIEN|SDMAEN|HDMAEN|DIRECTION|FIFORESET);
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
2002-11-30 19:30:09 +00:00
|
|
|
jmp p_command_xfer;
|
2000-07-18 20:12:14 +00:00
|
|
|
p_command_embedded:
|
|
|
|
|
/*
|
2001-05-15 19:41:12 +00:00
|
|
|
* The data fifo seems to require 4 byte aligned
|
2000-07-18 20:12:14 +00:00
|
|
|
* transfers from the sequencer. Force this to
|
|
|
|
|
* be the case by clearing HADDR[0] even though
|
2002-04-24 16:58:51 +00:00
|
|
|
* we aren't going to touch host memory.
|
2000-07-18 20:12:14 +00:00
|
|
|
*/
|
|
|
|
|
clr HADDR[0];
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
mvi DFCNTRL, (PRELOADEN|SCSIEN|DIRECTION);
|
|
|
|
|
bmov DFDAT, SCB_CDB_STORE, 12;
|
2000-09-16 20:02:28 +00:00
|
|
|
} else if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
/*
|
|
|
|
|
* On the 7895 the data FIFO will
|
|
|
|
|
* get corrupted if you try to dump
|
|
|
|
|
* data from external SCB memory into
|
|
|
|
|
* the FIFO while it is enabled. So,
|
|
|
|
|
* fill the fifo and then enable SCSI
|
|
|
|
|
* transfers.
|
|
|
|
|
*/
|
|
|
|
|
mvi DFCNTRL, (DIRECTION|FIFORESET);
|
|
|
|
|
} else {
|
|
|
|
|
mvi DFCNTRL, (SCSIEN|SDMAEN|DIRECTION|FIFORESET);
|
|
|
|
|
}
|
|
|
|
|
bmov DFDAT, SCB_CDB_STORE, 12;
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
mvi DFCNTRL, (SCSIEN|SDMAEN|DIRECTION|FIFOFLUSH);
|
|
|
|
|
} else {
|
2000-07-24 22:27:40 +00:00
|
|
|
or DFCNTRL, FIFOFLUSH;
|
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
} else {
|
2000-09-16 20:02:28 +00:00
|
|
|
mvi DFCNTRL, (SCSIEN|SDMAEN|DIRECTION|FIFORESET);
|
2000-07-24 22:27:40 +00:00
|
|
|
call copy_to_fifo_6;
|
|
|
|
|
call copy_to_fifo_6;
|
|
|
|
|
or DFCNTRL, FIFOFLUSH;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2002-11-30 19:30:09 +00:00
|
|
|
p_command_xfer:
|
|
|
|
|
and SEQ_FLAGS, ~NO_CDB_SENT;
|
2001-05-15 19:41:12 +00:00
|
|
|
if ((ahc->features & AHC_DT) == 0) {
|
|
|
|
|
test SSTAT0, SDONE jnz . + 2;
|
2002-11-30 19:30:09 +00:00
|
|
|
test SSTAT1, PHASEMIS jz . - 1;
|
2001-05-15 19:41:12 +00:00
|
|
|
/*
|
|
|
|
|
* Wait for our ACK to go-away on it's own
|
|
|
|
|
* instead of being killed by SCSIEN getting cleared.
|
|
|
|
|
*/
|
|
|
|
|
test SCSISIGI, ACKI jnz .;
|
|
|
|
|
} else {
|
2002-11-30 19:30:09 +00:00
|
|
|
test DFCNTRL, SCSIEN jnz .;
|
2001-05-15 19:41:12 +00:00
|
|
|
}
|
2002-11-30 19:30:09 +00:00
|
|
|
test SSTAT0, SDONE jnz p_command_successful;
|
|
|
|
|
/*
|
|
|
|
|
* Don't allow a data phase if the command
|
|
|
|
|
* was not fully transferred.
|
|
|
|
|
*/
|
|
|
|
|
or SEQ_FLAGS, NO_CDB_SENT;
|
|
|
|
|
p_command_successful:
|
2000-01-07 23:08:20 +00:00
|
|
|
and DFCNTRL, ~(SCSIEN|SDMAEN|HDMAEN);
|
1998-09-15 07:24:17 +00:00
|
|
|
test DFCNTRL, (SCSIEN|SDMAEN|HDMAEN) jnz .;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
jmp ITloop;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
|
|
|
|
* Status phase. Wait for the data byte to appear, then read it
|
|
|
|
|
* and store it into the SCB.
|
|
|
|
|
*/
|
1994-11-17 20:19:10 +00:00
|
|
|
p_status:
|
2002-11-30 19:30:09 +00:00
|
|
|
test SEQ_FLAGS, NOT_IDENTIFIED jnz mesgin_proto_violation;
|
2001-07-18 21:39:48 +00:00
|
|
|
p_status_okay:
|
2000-07-18 20:12:14 +00:00
|
|
|
mov SCB_SCSI_STATUS, SCSIDATL;
|
2002-11-30 19:30:09 +00:00
|
|
|
or SCB_CONTROL, STATUS_RCVD;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
jmp ITloop;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
1998-12-10 04:14:50 +00:00
|
|
|
* Message out phase. If MSG_OUT is MSG_IDENTIFYFLAG, build a full
|
|
|
|
|
* indentify message sequence and send it to the target. The host may
|
|
|
|
|
* override this behavior by setting the MK_MESSAGE bit in the SCB
|
|
|
|
|
* control byte. This will cause us to interrupt the host and allow
|
|
|
|
|
* it to handle the message phase completely on its own. If the bit
|
|
|
|
|
* associated with this target is set, we will also interrupt the host,
|
|
|
|
|
* thereby allowing it to send a message on the next selection regardless
|
|
|
|
|
* of the transaction being sent.
|
1998-09-15 07:24:17 +00:00
|
|
|
*
|
|
|
|
|
* If MSG_OUT is == HOST_MSG, also interrupt the host and take a message.
|
1998-12-10 04:14:50 +00:00
|
|
|
* This is done to allow the host to send messages outside of an identify
|
1998-09-15 07:24:17 +00:00
|
|
|
* sequence while protecting the seqencer from testing the MK_MESSAGE bit
|
|
|
|
|
* on an SCB that might not be for the current nexus. (For example, a
|
|
|
|
|
* BDR message in responce to a bad reselection would leave us pointed to
|
|
|
|
|
* an SCB that doesn't have anything to do with the current target).
|
1998-12-10 04:14:50 +00:00
|
|
|
*
|
1998-09-15 07:24:17 +00:00
|
|
|
* Otherwise, treat MSG_OUT as a 1 byte message to send (abort, abort tag,
|
|
|
|
|
* bus device reset).
|
|
|
|
|
*
|
|
|
|
|
* When there are no messages to send, MSG_OUT should be set to MSG_NOOP,
|
|
|
|
|
* in case the target decides to put us in this phase for some strange
|
|
|
|
|
* reason.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1998-12-10 04:14:50 +00:00
|
|
|
p_mesgout_retry:
|
2001-05-15 19:41:12 +00:00
|
|
|
/* Turn on ATN for the retry */
|
|
|
|
|
if ((ahc->features & AHC_DT) == 0) {
|
|
|
|
|
or SCSISIGO, ATNO, LASTPHASE;
|
|
|
|
|
} else {
|
|
|
|
|
mvi SCSISIGO, ATNO;
|
|
|
|
|
}
|
1994-11-17 20:19:10 +00:00
|
|
|
p_mesgout:
|
1998-09-15 07:24:17 +00:00
|
|
|
mov SINDEX, MSG_OUT;
|
|
|
|
|
cmp SINDEX, MSG_IDENTIFYFLAG jne p_mesgout_from_host;
|
1998-12-10 04:14:50 +00:00
|
|
|
test SCB_CONTROL,MK_MESSAGE jnz host_message_loop;
|
1998-09-15 07:24:17 +00:00
|
|
|
p_mesgout_identify:
|
2003-05-26 21:24:01 +00:00
|
|
|
or SINDEX, MSG_IDENTIFYFLAG|DISCENB, SAVED_LUN;
|
2000-07-18 20:12:14 +00:00
|
|
|
test SCB_CONTROL, DISCENB jnz . + 2;
|
|
|
|
|
and SINDEX, ~DISCENB;
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
1998-09-15 07:24:17 +00:00
|
|
|
* Send a tag message if TAG_ENB is set in the SCB control block.
|
|
|
|
|
* Use SCB_TAG (the position in the kernel's SCB array) as the tag value.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
p_mesgout_tag:
|
|
|
|
|
test SCB_CONTROL,TAG_ENB jz p_mesgout_onebyte;
|
|
|
|
|
mov SCSIDATL, SINDEX; /* Send the identify message */
|
|
|
|
|
call phase_lock;
|
|
|
|
|
cmp LASTPHASE, P_MESGOUT jne p_mesgout_done;
|
|
|
|
|
and SCSIDATL,TAG_ENB|SCB_TAG_TYPE,SCB_CONTROL;
|
|
|
|
|
call phase_lock;
|
|
|
|
|
cmp LASTPHASE, P_MESGOUT jne p_mesgout_done;
|
|
|
|
|
mov SCB_TAG jmp p_mesgout_onebyte;
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
1998-12-10 04:14:50 +00:00
|
|
|
* Interrupt the driver, and allow it to handle this message
|
|
|
|
|
* phase and any required retries.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
p_mesgout_from_host:
|
|
|
|
|
cmp SINDEX, HOST_MSG jne p_mesgout_onebyte;
|
1998-12-10 04:14:50 +00:00
|
|
|
jmp host_message_loop;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
p_mesgout_onebyte:
|
|
|
|
|
mvi CLRSINT1, CLRATNO;
|
|
|
|
|
mov SCSIDATL, SINDEX;
|
|
|
|
|
|
1997-04-18 16:31:55 +00:00
|
|
|
/*
|
1998-12-10 04:14:50 +00:00
|
|
|
* If the next bus phase after ATN drops is message out, it means
|
1997-04-18 16:31:55 +00:00
|
|
|
* that the target is requesting that the last message(s) be resent.
|
|
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
call phase_lock;
|
1998-12-10 04:14:50 +00:00
|
|
|
cmp LASTPHASE, P_MESGOUT je p_mesgout_retry;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
p_mesgout_done:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mvi CLRSINT1,CLRATNO; /* Be sure to turn ATNO off */
|
1998-09-15 07:24:17 +00:00
|
|
|
mov LAST_MSG, MSG_OUT;
|
|
|
|
|
mvi MSG_OUT, MSG_NOOP; /* No message left */
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
jmp ITloop;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
|
|
|
|
* Message in phase. Bytes are read using Automatic PIO mode.
|
|
|
|
|
*/
|
1994-11-17 20:19:10 +00:00
|
|
|
p_mesgin:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mvi ACCUM call inb_first; /* read the 1st message byte */
|
|
|
|
|
|
|
|
|
|
test A,MSG_IDENTIFYFLAG jnz mesgin_identify;
|
|
|
|
|
cmp A,MSG_DISCONNECT je mesgin_disconnect;
|
|
|
|
|
cmp A,MSG_SAVEDATAPOINTER je mesgin_sdptrs;
|
|
|
|
|
cmp ALLZEROS,A je mesgin_complete;
|
|
|
|
|
cmp A,MSG_RESTOREPOINTERS je mesgin_rdptrs;
|
2000-07-18 20:12:14 +00:00
|
|
|
cmp A,MSG_IGN_WIDE_RESIDUE je mesgin_ign_wide_residue;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
cmp A,MSG_NOOP je mesgin_done;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
1998-12-17 00:06:52 +00:00
|
|
|
* Pushed message loop to allow the kernel to
|
2000-02-09 21:25:00 +00:00
|
|
|
* run it's own message state engine. To avoid an
|
1998-12-17 00:06:52 +00:00
|
|
|
* extra nop instruction after signaling the kernel,
|
|
|
|
|
* we perform the phase_lock before checking to see
|
|
|
|
|
* if we should exit the loop and skip the phase_lock
|
|
|
|
|
* in the ITloop. Performing back to back phase_locks
|
|
|
|
|
* shouldn't hurt, but why do it twice...
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1998-12-17 00:06:52 +00:00
|
|
|
host_message_loop:
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi HOST_MSG_LOOP call set_seqint;
|
1998-12-17 00:06:52 +00:00
|
|
|
call phase_lock;
|
|
|
|
|
cmp RETURN_1, EXIT_MSG_LOOP je ITloop + 1;
|
|
|
|
|
jmp host_message_loop;
|
1995-08-06 05:15:45 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
mesgin_ign_wide_residue:
|
|
|
|
|
if ((ahc->features & AHC_WIDE) != 0) {
|
|
|
|
|
test SCSIRATE, WIDEXFER jz mesgin_reject;
|
|
|
|
|
/* Pull the residue byte */
|
|
|
|
|
mvi ARG_1 call inb_next;
|
|
|
|
|
cmp ARG_1, 0x01 jne mesgin_reject;
|
|
|
|
|
test SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL jz . + 2;
|
2003-05-26 21:24:01 +00:00
|
|
|
test SCB_LUN, SCB_XFERLEN_ODD jnz mesgin_done;
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi IGN_WIDE_RES call set_seqint;
|
2000-07-18 20:12:14 +00:00
|
|
|
jmp mesgin_done;
|
|
|
|
|
}
|
|
|
|
|
|
2002-11-30 19:30:09 +00:00
|
|
|
mesgin_proto_violation:
|
|
|
|
|
mvi PROTO_VIOLATION call set_seqint;
|
|
|
|
|
jmp mesgin_done;
|
2000-07-18 20:12:14 +00:00
|
|
|
mesgin_reject:
|
|
|
|
|
mvi MSG_MESSAGE_REJECT call mk_mesg;
|
1995-08-06 05:15:45 +00:00
|
|
|
mesgin_done:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
|
|
|
|
|
jmp ITloop;
|
1995-08-06 05:15:45 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
2000-07-18 20:12:14 +00:00
|
|
|
* We received a "command complete" message. Put the SCB_TAG into the QOUTFIFO,
|
1996-10-25 06:34:59 +00:00
|
|
|
* and trigger a completion interrupt. Before doing so, check to see if there
|
1998-09-15 07:24:17 +00:00
|
|
|
* is a residual or the status byte is something other than STATUS_GOOD (0).
|
|
|
|
|
* In either of these conditions, we upload the SCB back to the host so it can
|
1996-10-25 06:34:59 +00:00
|
|
|
* process this information. In the case of a non zero status byte, we
|
|
|
|
|
* additionally interrupt the kernel driver synchronously, allowing it to
|
|
|
|
|
* decide if sense should be retrieved. If the kernel driver wishes to request
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
* sense, it will fill the kernel SCB with a request sense command, requeue
|
|
|
|
|
* it to the QINFIFO and tell us not to post to the QOUTFIFO by setting
|
|
|
|
|
* RETURN_1 to SEND_SENSE.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
2002-11-30 19:30:09 +00:00
|
|
|
mesgin_complete:
|
1996-10-25 06:34:59 +00:00
|
|
|
|
2002-11-30 19:30:09 +00:00
|
|
|
/*
|
|
|
|
|
* If ATN is raised, we still want to give the target a message.
|
|
|
|
|
* Perhaps there was a parity error on this last message byte.
|
|
|
|
|
* Either way, the target should take us to message out phase
|
|
|
|
|
* and then attempt to complete the command again. We should use a
|
|
|
|
|
* critical section here to guard against a timeout triggering
|
|
|
|
|
* for this command and setting ATN while we are still processing
|
|
|
|
|
* the completion.
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
test SCSISIGI, ATNI jnz mesgin_done;
|
2002-11-30 19:30:09 +00:00
|
|
|
*/
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
|
2002-11-30 19:30:09 +00:00
|
|
|
/*
|
|
|
|
|
* If we are identified and have successfully sent the CDB,
|
|
|
|
|
* any status will do. Optimize this fast path.
|
|
|
|
|
*/
|
|
|
|
|
test SCB_CONTROL, STATUS_RCVD jz mesgin_proto_violation;
|
|
|
|
|
test SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT jz complete_accepted;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If the target never sent an identify message but instead went
|
|
|
|
|
* to mesgin to give an invalid message, let the host abort us.
|
|
|
|
|
*/
|
|
|
|
|
test SEQ_FLAGS, NOT_IDENTIFIED jnz mesgin_proto_violation;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If we recevied good status but never successfully sent the
|
|
|
|
|
* cdb, abort the command.
|
|
|
|
|
*/
|
|
|
|
|
test SCB_SCSI_STATUS,0xff jnz complete_accepted;
|
|
|
|
|
test SEQ_FLAGS, NO_CDB_SENT jnz mesgin_proto_violation;
|
|
|
|
|
|
|
|
|
|
complete_accepted:
|
|
|
|
|
/*
|
|
|
|
|
* See if we attempted to deliver a message but the target ingnored us.
|
|
|
|
|
*/
|
2000-11-06 20:05:38 +00:00
|
|
|
test SCB_CONTROL, MK_MESSAGE jz . + 2;
|
|
|
|
|
mvi MKMSG_FAILED call set_seqint;
|
|
|
|
|
|
2002-11-30 19:30:09 +00:00
|
|
|
/*
|
|
|
|
|
* Check for residuals
|
|
|
|
|
*/
|
2000-07-18 20:12:14 +00:00
|
|
|
test SCB_SGPTR, SG_LIST_NULL jnz check_status;/* No xfer */
|
|
|
|
|
test SCB_SGPTR, SG_FULL_RESID jnz upload_scb;/* Never xfered */
|
|
|
|
|
test SCB_RESIDUAL_SGPTR, SG_LIST_NULL jz upload_scb;
|
|
|
|
|
check_status:
|
|
|
|
|
test SCB_SCSI_STATUS,0xff jz complete; /* Good Status? */
|
1996-10-25 06:34:59 +00:00
|
|
|
upload_scb:
|
2000-07-18 20:12:14 +00:00
|
|
|
or SCB_SGPTR, SG_RESID_VALID;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mvi DMAPARAMS, FIFORESET;
|
|
|
|
|
mov SCB_TAG call dma_scb;
|
2000-07-18 20:12:14 +00:00
|
|
|
test SCB_SCSI_STATUS, 0xff jz complete; /* Just a residual? */
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi BAD_STATUS call set_seqint; /* let driver know */
|
2000-07-18 20:12:14 +00:00
|
|
|
cmp RETURN_1, SEND_SENSE jne complete;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
call add_scb_to_free_list;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
jmp await_busfree;
|
1998-09-15 07:24:17 +00:00
|
|
|
complete:
|
|
|
|
|
mov SCB_TAG call complete_post;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
jmp await_busfree;
|
1998-12-10 04:14:50 +00:00
|
|
|
}
|
1995-03-31 14:06:02 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
complete_post:
|
|
|
|
|
/* Post the SCBID in SINDEX and issue an interrupt */
|
1999-03-05 23:35:48 +00:00
|
|
|
call add_scb_to_free_list;
|
1998-09-15 07:24:17 +00:00
|
|
|
mov ARG_1, SINDEX;
|
|
|
|
|
if ((ahc->features & AHC_QUEUE_REGS) != 0) {
|
|
|
|
|
mov A, SDSCB_QOFF;
|
|
|
|
|
} else {
|
|
|
|
|
mov A, QOUTPOS;
|
|
|
|
|
}
|
|
|
|
|
mvi QOUTFIFO_OFFSET call post_byte_setup;
|
|
|
|
|
mov ARG_1 call post_byte;
|
|
|
|
|
if ((ahc->features & AHC_QUEUE_REGS) == 0) {
|
|
|
|
|
inc QOUTPOS;
|
|
|
|
|
}
|
|
|
|
|
mvi INTSTAT,CMDCMPLT ret;
|
|
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_INITIATORROLE) != 0) {
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
|
|
|
|
* Is it a disconnect message? Set a flag in the SCB to remind us
|
2000-07-18 20:12:14 +00:00
|
|
|
* and await the bus going free. If this is an untagged transaction
|
|
|
|
|
* store the SCB id for it in our untagged target table for lookup on
|
|
|
|
|
* a reselction.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1995-08-06 05:15:45 +00:00
|
|
|
mesgin_disconnect:
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
/*
|
|
|
|
|
* If ATN is raised, we still want to give the target a message.
|
|
|
|
|
* Perhaps there was a parity error on this last message byte
|
|
|
|
|
* or we want to abort this command. Either way, the target
|
|
|
|
|
* should take us to message out phase and then attempt to
|
|
|
|
|
* disconnect again.
|
|
|
|
|
* XXX - Wait for more testing.
|
|
|
|
|
test SCSISIGI, ATNI jnz mesgin_done;
|
|
|
|
|
*/
|
2002-11-30 19:30:09 +00:00
|
|
|
test SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT
|
|
|
|
|
jnz mesgin_proto_violation;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
or SCB_CONTROL,DISCONNECTED;
|
2000-07-18 20:12:14 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
|
|
|
|
call add_scb_to_disc_list;
|
|
|
|
|
}
|
|
|
|
|
test SCB_CONTROL, TAG_ENB jnz await_busfree;
|
|
|
|
|
mov ARG_1, SCB_TAG;
|
2003-05-26 21:24:01 +00:00
|
|
|
and SAVED_LUN, LID, SCB_LUN;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
mov SCB_SCSIID call set_busy_target;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
jmp await_busfree;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
1996-10-25 06:34:59 +00:00
|
|
|
* Save data pointers message:
|
|
|
|
|
* Copying RAM values back to SCB, for Save Data Pointers message, but
|
|
|
|
|
* only if we've actually been into a data phase to change them. This
|
|
|
|
|
* protects against bogus data in scratch ram and the residual counts
|
|
|
|
|
* since they are only initialized when we go into data_in or data_out.
|
2001-05-15 19:41:12 +00:00
|
|
|
* Ack the message as soon as possible. For chips without S/G pipelining,
|
|
|
|
|
* we can only ack the message after SHADDR has been saved. On these
|
|
|
|
|
* chips, SHADDR increments with every bus transaction, even PIO.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1995-08-06 05:15:45 +00:00
|
|
|
mesgin_sdptrs:
|
2001-05-15 19:41:12 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
|
|
|
|
|
test SEQ_FLAGS, DPHASE jz ITloop;
|
|
|
|
|
} else {
|
|
|
|
|
test SEQ_FLAGS, DPHASE jz mesgin_done;
|
|
|
|
|
}
|
2001-07-18 21:39:48 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If we are asked to save our position at the end of the
|
|
|
|
|
* transfer, just mark us at the end rather than perform a
|
|
|
|
|
* full save.
|
|
|
|
|
*/
|
|
|
|
|
test SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL jz mesgin_sdptrs_full;
|
|
|
|
|
or SCB_SGPTR, SG_LIST_NULL;
|
2001-08-05 22:20:12 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) != 0) {
|
|
|
|
|
jmp ITloop;
|
|
|
|
|
} else {
|
|
|
|
|
jmp mesgin_done;
|
|
|
|
|
}
|
2001-07-18 21:39:48 +00:00
|
|
|
|
|
|
|
|
mesgin_sdptrs_full:
|
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
2000-07-18 20:12:14 +00:00
|
|
|
* The SCB_SGPTR becomes the next one we'll download,
|
|
|
|
|
* and the SCB_DATAPTR becomes the current SHADDR.
|
1998-09-15 07:24:17 +00:00
|
|
|
* Use the residual number since STCNT is corrupted by
|
|
|
|
|
* any message transfer.
|
|
|
|
|
*/
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
bmov SCB_DATAPTR, SHADDR, 4;
|
2001-05-15 19:41:12 +00:00
|
|
|
if ((ahc->features & AHC_ULTRA2) == 0) {
|
|
|
|
|
mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
|
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
bmov SCB_DATACNT, SCB_RESIDUAL_DATACNT, 8;
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
|
|
|
|
mvi DINDEX, SCB_DATAPTR;
|
2000-07-18 20:12:14 +00:00
|
|
|
mvi SHADDR call bcopy_4;
|
2001-05-15 19:41:12 +00:00
|
|
|
mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
|
2000-07-18 20:12:14 +00:00
|
|
|
mvi SCB_RESIDUAL_DATACNT call bcopy_8;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2001-05-15 19:41:12 +00:00
|
|
|
jmp ITloop;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
|
|
|
|
* Restore pointers message? Data pointers are recopied from the
|
|
|
|
|
* SCB anytime we enter a data phase for the first time, so all
|
|
|
|
|
* we need to do is clear the DPHASE flag and let the data phase
|
2002-11-30 19:30:09 +00:00
|
|
|
* code do the rest. We also reset/reallocate the FIFO to make
|
|
|
|
|
* sure we have a clean start for the next data or command phase.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1995-08-06 05:15:45 +00:00
|
|
|
mesgin_rdptrs:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
and SEQ_FLAGS, ~DPHASE; /*
|
|
|
|
|
* We'll reload them
|
1996-01-03 06:25:32 +00:00
|
|
|
* the next time through
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
* the dataphase.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
2002-11-30 19:30:09 +00:00
|
|
|
or SXFRCTL0, CLRSTCNT|CLRCHN;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
jmp mesgin_done;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
|
* Index into our Busy Target table. SINDEX and DINDEX are modified
|
|
|
|
|
* upon return. SCBPTR may be modified by this action.
|
|
|
|
|
*/
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
set_busy_target:
|
|
|
|
|
shr DINDEX, 4, SINDEX;
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
mov SCBPTR, SAVED_LUN;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
add DINDEX, SCB_64_BTT;
|
2000-07-18 20:12:14 +00:00
|
|
|
} else {
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
add DINDEX, BUSY_TARGETS;
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
mov DINDIR, ARG_1 ret;
|
2000-07-18 20:12:14 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
|
|
|
|
* Identify message? For a reconnecting target, this tells us the lun
|
|
|
|
|
* that the reconnection is for - find the correct SCB and switch to it,
|
|
|
|
|
* clearing the "disconnected" bit so we don't "find" it by accident later.
|
|
|
|
|
*/
|
1995-08-06 05:15:45 +00:00
|
|
|
mesgin_identify:
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
|
* Determine whether a target is using tagged or non-tagged
|
|
|
|
|
* transactions by first looking at the transaction stored in
|
|
|
|
|
* the busy target array. If there is no untagged transaction
|
|
|
|
|
* for this target or the transaction is for a different lun, then
|
2002-08-31 06:43:15 +00:00
|
|
|
* this must be a tagged transaction.
|
2000-07-18 20:12:14 +00:00
|
|
|
*/
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
shr SINDEX, 4, SAVED_SCSIID;
|
2001-01-22 21:03:48 +00:00
|
|
|
and SAVED_LUN, MSG_IDENTIFY_LUNMASK, A;
|
|
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
|
|
|
|
add SINDEX, SCB_64_BTT;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
mov SCBPTR, SAVED_LUN;
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
|
|
|
|
|
add NONE, -SCB_64_BTT, SINDEX;
|
|
|
|
|
jc . + 2;
|
|
|
|
|
mvi INTSTAT, OUT_OF_RANGE;
|
|
|
|
|
nop;
|
|
|
|
|
add NONE, -(SCB_64_BTT + 16), SINDEX;
|
|
|
|
|
jnc . + 2;
|
|
|
|
|
mvi INTSTAT, OUT_OF_RANGE;
|
|
|
|
|
nop;
|
|
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
} else {
|
2001-01-22 21:03:48 +00:00
|
|
|
add SINDEX, BUSY_TARGETS;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
|
2001-01-22 21:03:48 +00:00
|
|
|
add NONE, -BUSY_TARGETS, SINDEX;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
jc . + 2;
|
|
|
|
|
mvi INTSTAT, OUT_OF_RANGE;
|
2000-11-06 20:05:38 +00:00
|
|
|
nop;
|
2001-01-22 21:03:48 +00:00
|
|
|
add NONE, -(BUSY_TARGETS + 16), SINDEX;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
jnc . + 2;
|
|
|
|
|
mvi INTSTAT, OUT_OF_RANGE;
|
2000-11-06 20:05:38 +00:00
|
|
|
nop;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
mov ARG_1, SINDIR;
|
|
|
|
|
cmp ARG_1, SCB_LIST_NULL je snoop_tag;
|
2000-07-18 20:12:14 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
mov ARG_1 call findSCB;
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
mov SCBPTR, ARG_1;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
jmp setup_SCB_id_lun_okay;
|
|
|
|
|
} else {
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
/*
|
|
|
|
|
* We only allow one untagged command per-target
|
|
|
|
|
* at a time. So, if the lun doesn't match, look
|
|
|
|
|
* for a tag message.
|
|
|
|
|
*/
|
2003-05-26 21:24:01 +00:00
|
|
|
and A, LID, SCB_LUN;
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
cmp SAVED_LUN, A je setup_SCB_id_lun_okay;
|
|
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
|
|
|
|
/*
|
|
|
|
|
* findSCB removes the SCB from the
|
|
|
|
|
* disconnected list, so we must replace
|
|
|
|
|
* it there should this SCB be for another
|
|
|
|
|
* lun.
|
|
|
|
|
*/
|
|
|
|
|
call cleanup_scb;
|
|
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
|
|
|
|
* Here we "snoop" the bus looking for a SIMPLE QUEUE TAG message.
|
1997-02-28 03:51:00 +00:00
|
|
|
* If we get one, we use the tag returned to find the proper
|
2000-07-18 20:12:14 +00:00
|
|
|
* SCB. With SCB paging, we must search for non-tagged
|
|
|
|
|
* transactions since the SCB may exist in any slot. If we're not
|
|
|
|
|
* using SCB paging, we can use the tag as the direct index to the
|
|
|
|
|
* SCB.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1997-04-04 04:09:29 +00:00
|
|
|
snoop_tag:
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
|
|
|
|
|
or SEQ_FLAGS, 0x80;
|
|
|
|
|
}
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov NONE,SCSIDATL; /* ACK Identify MSG */
|
1998-09-15 07:24:17 +00:00
|
|
|
call phase_lock;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
|
|
|
|
|
or SEQ_FLAGS, 0x1;
|
|
|
|
|
}
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
cmp LASTPHASE, P_MESGIN jne not_found;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
|
|
|
|
|
or SEQ_FLAGS, 0x2;
|
|
|
|
|
}
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
cmp SCSIBUSL,MSG_SIMPLE_Q_TAG jne not_found;
|
1995-02-22 01:37:52 +00:00
|
|
|
get_tag:
|
2000-07-18 20:12:14 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
|
|
|
|
mvi ARG_1 call inb_next; /* tag value */
|
|
|
|
|
mov ARG_1 call findSCB;
|
|
|
|
|
} else {
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
mvi ARG_1 call inb_next; /* tag value */
|
|
|
|
|
mov SCBPTR, ARG_1;
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
1996-01-03 06:25:32 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
/*
|
|
|
|
|
* Ensure that the SCB the tag points to is for
|
|
|
|
|
* an SCB transaction to the reconnecting target.
|
|
|
|
|
*/
|
1996-04-20 21:20:31 +00:00
|
|
|
setup_SCB:
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
|
|
|
|
|
or SEQ_FLAGS, 0x4;
|
|
|
|
|
}
|
2001-01-22 21:03:48 +00:00
|
|
|
mov A, SCB_SCSIID;
|
|
|
|
|
cmp SAVED_SCSIID, A jne not_found_cleanup_scb;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
|
|
|
|
|
or SEQ_FLAGS, 0x8;
|
|
|
|
|
}
|
2001-01-22 21:03:48 +00:00
|
|
|
setup_SCB_id_okay:
|
2003-05-26 21:24:01 +00:00
|
|
|
and A, LID, SCB_LUN;
|
2001-01-22 21:03:48 +00:00
|
|
|
cmp SAVED_LUN, A jne not_found_cleanup_scb;
|
2000-07-18 20:12:14 +00:00
|
|
|
setup_SCB_id_lun_okay:
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_SEQUENCER_DEBUG) != 0) {
|
|
|
|
|
or SEQ_FLAGS, 0x10;
|
2000-07-18 20:12:14 +00:00
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
test SCB_CONTROL,DISCONNECTED jz not_found_cleanup_scb;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
and SCB_CONTROL,~DISCONNECTED;
|
2000-07-18 20:12:14 +00:00
|
|
|
test SCB_CONTROL, TAG_ENB jnz setup_SCB_tagged;
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
|
|
|
|
mov A, SCBPTR;
|
|
|
|
|
}
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
mvi ARG_1, SCB_LIST_NULL;
|
|
|
|
|
mov SAVED_SCSIID call set_busy_target;
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
|
|
|
|
mov SCBPTR, A;
|
|
|
|
|
}
|
2000-07-18 20:12:14 +00:00
|
|
|
setup_SCB_tagged:
|
2002-11-30 19:30:09 +00:00
|
|
|
clr SEQ_FLAGS; /* make note of IDENTIFY */
|
1998-09-15 07:24:17 +00:00
|
|
|
call set_transfer_settings;
|
|
|
|
|
/* See if the host wants to send a message upon reconnection */
|
|
|
|
|
test SCB_CONTROL, MK_MESSAGE jz mesgin_done;
|
|
|
|
|
mvi HOST_MSG call mk_mesg;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
jmp mesgin_done;
|
1996-04-20 21:20:31 +00:00
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
not_found_cleanup_scb:
|
|
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
call cleanup_scb;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
}
|
1996-10-28 06:01:08 +00:00
|
|
|
not_found:
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi NO_MATCH call set_seqint;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
jmp mesgin_done;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
|
|
|
|
mk_mesg:
|
2001-05-15 19:41:12 +00:00
|
|
|
if ((ahc->features & AHC_DT) == 0) {
|
|
|
|
|
or SCSISIGO, ATNO, LASTPHASE;
|
|
|
|
|
} else {
|
|
|
|
|
mvi SCSISIGO, ATNO;
|
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
mov MSG_OUT,SINDEX ret;
|
1996-01-03 06:25:32 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Functions to read data in Automatic PIO mode.
|
|
|
|
|
*
|
|
|
|
|
* According to Adaptec's documentation, an ACK is not sent on input from
|
|
|
|
|
* the target until SCSIDATL is read from. So we wait until SCSIDATL is
|
|
|
|
|
* latched (the usual way), then read the data byte directly off the bus
|
|
|
|
|
* using SCSIBUSL. When we have pulled the ATN line, or we just want to
|
|
|
|
|
* acknowledge the byte, then we do a dummy read from SCISDATL. The SCSI
|
|
|
|
|
* spec guarantees that the target will hold the data byte on the bus until
|
|
|
|
|
* we send our ACK.
|
|
|
|
|
*
|
|
|
|
|
* The assumption here is that these are called in a particular sequence,
|
|
|
|
|
* and that REQ is already set when inb_first is called. inb_{first,next}
|
|
|
|
|
* use the same calling convention as inb.
|
|
|
|
|
*/
|
2000-02-09 21:25:00 +00:00
|
|
|
inb_next_wait_perr:
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi PERR_DETECTED call set_seqint;
|
2000-02-09 21:25:00 +00:00
|
|
|
jmp inb_next_wait;
|
1994-11-17 20:19:10 +00:00
|
|
|
inb_next:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
|
1996-01-09 16:14:03 +00:00
|
|
|
inb_next_wait:
|
1997-01-22 18:01:07 +00:00
|
|
|
/*
|
|
|
|
|
* If there is a parity error, wait for the kernel to
|
|
|
|
|
* see the interrupt and prepare our message response
|
|
|
|
|
* before continuing.
|
|
|
|
|
*/
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
test SSTAT1, REQINIT jz inb_next_wait;
|
2000-02-09 21:25:00 +00:00
|
|
|
test SSTAT1, SCSIPERR jnz inb_next_wait_perr;
|
|
|
|
|
inb_next_check_phase:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
and LASTPHASE, PHASE_MASK, SCSISIGI;
|
|
|
|
|
cmp LASTPHASE, P_MESGIN jne mesgin_phasemis;
|
1996-11-16 01:07:35 +00:00
|
|
|
inb_first:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov DINDEX,SINDEX;
|
|
|
|
|
mov DINDIR,SCSIBUSL ret; /*read byte directly from bus*/
|
1996-01-03 06:25:32 +00:00
|
|
|
inb_last:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov NONE,SCSIDATL ret; /*dummy read from latch to ACK*/
|
1998-12-10 04:14:50 +00:00
|
|
|
}
|
1996-01-05 16:11:49 +00:00
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
1998-12-10 04:14:50 +00:00
|
|
|
/*
|
|
|
|
|
* Change to a new phase. If we are changing the state of the I/O signal,
|
|
|
|
|
* from out to in, wait an additional data release delay before continuing.
|
|
|
|
|
*/
|
|
|
|
|
change_phase:
|
2001-05-15 19:41:12 +00:00
|
|
|
/* Wait for preceeding I/O session to complete. */
|
1999-02-11 07:10:20 +00:00
|
|
|
test SCSISIGI, ACKI jnz .;
|
|
|
|
|
|
|
|
|
|
/* Change the phase */
|
1998-12-10 04:14:50 +00:00
|
|
|
and DINDEX, IOI, SCSISIGI;
|
|
|
|
|
mov SCSISIGO, SINDEX;
|
|
|
|
|
and A, IOI, SINDEX;
|
1999-02-11 07:10:20 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* If the data direction has changed, from
|
|
|
|
|
* out (initiator driving) to in (target driving),
|
2000-07-18 20:12:14 +00:00
|
|
|
* we must wait at least a data release delay plus
|
1999-02-11 07:10:20 +00:00
|
|
|
* the normal bus settle delay. [SCSI III SPI 10.11.0]
|
|
|
|
|
*/
|
1998-12-10 04:14:50 +00:00
|
|
|
cmp DINDEX, A je change_phase_wait;
|
|
|
|
|
test SINDEX, IOI jz change_phase_wait;
|
|
|
|
|
call change_phase_wait;
|
|
|
|
|
change_phase_wait:
|
|
|
|
|
nop;
|
|
|
|
|
nop;
|
|
|
|
|
nop;
|
|
|
|
|
nop ret;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Send a byte to an initiator in Automatic PIO mode.
|
|
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
target_outb:
|
|
|
|
|
or SXFRCTL0, SPIOEN;
|
|
|
|
|
test SSTAT0, SPIORDY jz .;
|
|
|
|
|
mov SCSIDATL, SINDEX;
|
|
|
|
|
test SSTAT0, SPIORDY jz .;
|
1998-12-10 04:14:50 +00:00
|
|
|
and SXFRCTL0, ~SPIOEN ret;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
|
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
2000-07-18 20:12:14 +00:00
|
|
|
* Locate a disconnected SCB by SCBID. Upon return, SCBPTR and SINDEX will
|
|
|
|
|
* be set to the position of the SCB. If the SCB cannot be found locally,
|
|
|
|
|
* it will be paged in from host memory. RETURN_2 stores the address of the
|
|
|
|
|
* preceding SCB in the disconnected list which can be used to speed up
|
|
|
|
|
* removal of the found SCB from the disconnected list.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
2000-09-16 20:02:28 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
2002-04-24 16:58:51 +00:00
|
|
|
BEGIN_CRITICAL;
|
1994-11-17 20:19:10 +00:00
|
|
|
findSCB:
|
2000-07-18 20:12:14 +00:00
|
|
|
mov A, SINDEX; /* Tag passed in SINDEX */
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
cmp DISCONNECTED_SCBH, SCB_LIST_NULL je findSCB_notFound;
|
|
|
|
|
mov SCBPTR, DISCONNECTED_SCBH; /* Initialize SCBPTR */
|
|
|
|
|
mvi ARG_2, SCB_LIST_NULL; /* Head of list */
|
2000-07-18 20:12:14 +00:00
|
|
|
jmp findSCB_loop;
|
1998-09-15 07:24:17 +00:00
|
|
|
findSCB_next:
|
2000-07-18 20:12:14 +00:00
|
|
|
cmp SCB_NEXT, SCB_LIST_NULL je findSCB_notFound;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
mov ARG_2, SCBPTR;
|
1998-09-15 07:24:17 +00:00
|
|
|
mov SCBPTR,SCB_NEXT;
|
1997-02-28 03:51:00 +00:00
|
|
|
findSCB_loop:
|
2000-07-18 20:12:14 +00:00
|
|
|
cmp SCB_TAG, A jne findSCB_next;
|
1996-10-25 06:34:59 +00:00
|
|
|
rem_scb_from_disc_list:
|
1998-09-15 07:24:17 +00:00
|
|
|
cmp ARG_2, SCB_LIST_NULL je rHead;
|
|
|
|
|
mov DINDEX, SCB_NEXT;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
mov SINDEX, SCBPTR;
|
1998-09-15 07:24:17 +00:00
|
|
|
mov SCBPTR, ARG_2;
|
|
|
|
|
mov SCB_NEXT, DINDEX;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov SCBPTR, SINDEX ret;
|
1996-04-20 21:20:31 +00:00
|
|
|
rHead:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov DISCONNECTED_SCBH,SCB_NEXT ret;
|
2002-04-24 16:58:51 +00:00
|
|
|
END_CRITICAL;
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
findSCB_notFound:
|
|
|
|
|
/*
|
|
|
|
|
* We didn't find it. Page in the SCB.
|
|
|
|
|
*/
|
|
|
|
|
mov ARG_1, A; /* Save tag */
|
|
|
|
|
mov ALLZEROS call get_free_or_disc_scb;
|
|
|
|
|
mvi DMAPARAMS, HDMAEN|DIRECTION|FIFORESET;
|
|
|
|
|
mov ARG_1 jmp dma_scb;
|
|
|
|
|
}
|
1994-11-17 20:19:10 +00:00
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
|
* Prepare the hardware to post a byte to host memory given an
|
2000-07-18 20:12:14 +00:00
|
|
|
* index of (A + (256 * SINDEX)) and a base address of SHARED_DATA_ADDR.
|
1998-09-15 07:24:17 +00:00
|
|
|
*/
|
|
|
|
|
post_byte_setup:
|
|
|
|
|
mov ARG_2, SINDEX;
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
mvi DINDEX, CCHADDR;
|
2000-07-18 20:12:14 +00:00
|
|
|
mvi SHARED_DATA_ADDR call set_1byte_addr;
|
1998-09-15 07:24:17 +00:00
|
|
|
mvi CCHCNT, 1;
|
|
|
|
|
mvi CCSCBCTL, CCSCBRESET ret;
|
|
|
|
|
} else {
|
|
|
|
|
mvi DINDEX, HADDR;
|
2000-07-18 20:12:14 +00:00
|
|
|
mvi SHARED_DATA_ADDR call set_1byte_addr;
|
|
|
|
|
mvi 1 call set_hcnt;
|
1998-09-15 07:24:17 +00:00
|
|
|
mvi DFCNTRL, FIFORESET ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
post_byte:
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
bmov CCSCBRAM, SINDEX, 1;
|
|
|
|
|
or CCSCBCTL, CCSCBEN|CCSCBRESET;
|
|
|
|
|
test CCSCBCTL, CCSCBDONE jz .;
|
|
|
|
|
clr CCSCBCTL ret;
|
|
|
|
|
} else {
|
|
|
|
|
mov DFDAT, SINDEX;
|
|
|
|
|
or DFCNTRL, HDMAEN|FIFOFLUSH;
|
|
|
|
|
jmp dma_finish;
|
|
|
|
|
}
|
|
|
|
|
|
2000-02-09 21:25:00 +00:00
|
|
|
phase_lock_perr:
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi PERR_DETECTED call set_seqint;
|
1998-09-15 07:24:17 +00:00
|
|
|
phase_lock:
|
2000-02-09 21:25:00 +00:00
|
|
|
/*
|
|
|
|
|
* If there is a parity error, wait for the kernel to
|
|
|
|
|
* see the interrupt and prepare our message response
|
|
|
|
|
* before continuing.
|
|
|
|
|
*/
|
1998-09-15 07:24:17 +00:00
|
|
|
test SSTAT1, REQINIT jz phase_lock;
|
2000-02-09 21:25:00 +00:00
|
|
|
test SSTAT1, SCSIPERR jnz phase_lock_perr;
|
|
|
|
|
phase_lock_latch_phase:
|
2001-05-15 19:41:12 +00:00
|
|
|
if ((ahc->features & AHC_DT) == 0) {
|
|
|
|
|
and SCSISIGO, PHASE_MASK, SCSISIGI;
|
|
|
|
|
}
|
1998-12-10 04:14:50 +00:00
|
|
|
and LASTPHASE, PHASE_MASK, SCSISIGI ret;
|
1998-09-15 07:24:17 +00:00
|
|
|
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) == 0) {
|
2000-07-18 20:12:14 +00:00
|
|
|
set_hcnt:
|
|
|
|
|
mov HCNT[0], SINDEX;
|
|
|
|
|
clear_hcnt:
|
|
|
|
|
clr HCNT[1];
|
|
|
|
|
clr HCNT[2] ret;
|
|
|
|
|
|
1996-10-25 06:34:59 +00:00
|
|
|
set_stcnt_from_hcnt:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov STCNT[0], HCNT[0];
|
|
|
|
|
mov STCNT[1], HCNT[1];
|
|
|
|
|
mov STCNT[2], HCNT[2] ret;
|
1996-10-25 06:34:59 +00:00
|
|
|
|
2000-07-18 20:12:14 +00:00
|
|
|
bcopy_8:
|
|
|
|
|
mov DINDIR, SINDIR;
|
1996-10-25 06:34:59 +00:00
|
|
|
bcopy_7:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov DINDIR, SINDIR;
|
|
|
|
|
mov DINDIR, SINDIR;
|
1996-10-25 06:34:59 +00:00
|
|
|
bcopy_5:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov DINDIR, SINDIR;
|
1996-10-25 06:34:59 +00:00
|
|
|
bcopy_4:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov DINDIR, SINDIR;
|
1996-10-25 06:34:59 +00:00
|
|
|
bcopy_3:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov DINDIR, SINDIR;
|
|
|
|
|
mov DINDIR, SINDIR;
|
|
|
|
|
mov DINDIR, SINDIR ret;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
1996-10-25 06:34:59 +00:00
|
|
|
|
aic7xxx.c:
Filter incoming transfer negotiation requests to ensure they
never exceed the settings specified by the user.
In restart sequencer attempt to deal with a bug in the aic7895.
If a third party reset occurs at just the right time, the
stack register can lock up. When restarting the sequencer
after handling the SCSI reset, poke SEQADDR1 before resting
the sequencers program counter.
When something strange happens, dump the card's transaction
state via ahc_dump_card_state(). This should aid in debugging.
Handle request sense transactions via the QINFIFO instead of
attaching them to the waiting queue directly. The waiting
queue consumes card SCB resources and, in the pathological case
of every target on the bus beating our selection attemps and
issuing a check condition, could have caused us to run out
of SCBs. I have never seen this happen, and only early
cards with 3 or 4 SCBs had any real chance of ever getting
into this state.
Add additional sequencer interrupt codes to support firmware
diagnostics. The diagnostic code is enabled with the
AHC_DEBUG_SEQUENCER kernel option.
Make it possible to switch into and out of target mode on
the fly. The card comes up by default as an initiator but
will switch into target mode as soon as an enable lun operation
is performed. As always, target mode behavior is gated
by the AHC_TMODE_ENABLE kernel option so most users will
not be affected by this change.
In ahc_update_target_msg_request(), also issue a new
request if the ppr_options have changed.
Never issue a PPR as a target. It is forbidden by the spec.
Correct a bug in ahc_parse_msg() that prevented us from
responding to PPR messages as a target.
Mark SCBs that are on the untagged queue with a flag instead
of checking several fields in the SCB to see if the SCB should
be on the queue. This makes it easier for things like automatic
request sense requests to be queued without touching the
untagged queues even though they are untagged requests.
When dealing with ignore wide residue messages that occur
in the middle of a transfer, reset HADDR, not SHADDR for
non-ultra2 chips. Although SHADDR is where the firmware
fetches the ending transfer address for a save data pointers
request, it is readonly. Setting HADDR has the side effect
of also updating SHADDR.
Cleanup the output of ahc_dump_card_state() by nulling out the
free scb list in the non-paging case. The free list is only
used if we must page SCBs.
Correct the transmission of cdbs > 12 bytes in length. When
swapping HSCBs prior to notifing the sequencer of the new
transaction, the bus address pointer for the cdb must also
be recalculated to reflect its new location. We now defer
the calculation of the cdb address until just before queing
it to the card.
When pulling transfer negotiation settings out of scratch
ram, convert 5MHz/clock doubled settings to 10MHz.
Add a new function ahc_qinfifo_requeue_tail() for use by
error recovery actions and auto-request sense operations.
These operations always occur when the sequencer is paused,
so we can avoid the extra expense incurred in the normal
SCB queue method.
Use the BMOV instruction for all single byte moves on
controllers that support it. The bmov instruction is
twice as fast as an AND with an immediate of 0xFF as
is used on older controllers.
Correct a few bugs in ahc_dump_card_state(). If we have
hardware assisted queue registers, use them to get the
sequencer's idea of the head of the queue. When enumerating
the untagged queue, it helps to use the correct index for
the queue.
aic7xxx.h:
Indicate via a feature flag, which controllers can take
on both the target and the initiator role at the same time.
Add the AHC_SEQUENCER_DEBUG flag.
Add the SCB_CDB32_PTR flag used for dealing with cdbs
with lengths between 13 and 32 bytes.
Add new prototypes.
aic7xxx.reg:
Allow the SCSIBUSL register to be written to. This is
required to fix a selection timeout problem on the 7892/99.
Cleanup the sequencer interrupt codes so that all debugging
codes are grouped at the end of the list.
Correct the definition of the ULTRA_ENB and DISC_DSB locations
in scratch ram. This prevented the driver from properly honoring
these settings when no serial eeprom was available.
Remove an unused sequencer flag.
aic7xxx.seq:
Just before a potential select-out, clear the SCSIBUSL
register. Occasionally, during a selection timeout, the
contents of the register may be presented on the bus,
causing much confusion.
Add sequencer diagnostic code to detect software and or
hardware bugs. The code attempts to verify most list
operations so any corruption is caught before it occurs.
We also track information about why a particular reconnection
request was rejected.
Don't clobber the digital REQ/ACK filter setting in SXFRCTL0
when clearing the channel.
Fix a target mode bug that would cause us to return busy
status instead of queue full in respnse to a tagged transaction.
Cleanup the overrun case. It turns out that by simply
butting the chip in bitbucket mode, it will ack any
bytes until the phase changes. This drasticaly simplifies
things.
Prior to leaving the data phase, make sure that the S/G
preload queue is empty.
Remove code to place a request sense request on the waiting
queue. This is all handled by the kernel now.
Change the semantics of "findSCB". In the past, findSCB
ensured that a freshly paged in SCB appeared on the disconnected
list. The problem with this is that there is no guarantee that
the paged in SCB is for a disconnected transation. We now
defer any list manipulation to the caller who usually discards
the SCB via the free list.
Inline some busy target table operations.
Add a critical section to protect adding an SCB to
the disconnected list.
aic7xxx_freebsd.c:
Handle changes in the transfer negotiation setting API
to filter incoming requests. No filtering is necessary
for "goal" requests from the XPT.
Set the SCB_CDB32_PTR flag when queing a transaction with
a large cdb.
In ahc_timeout, only take action if the active SCB is
the timedout SCB. This deals with the case of two
transactions to the same device with different timeout
values.
Use ahc_qinfifo_requeu_tail() instead of home grown
version.
aic7xxx_inline.h:
Honor SCB_CDB32_PTR when queuing a new request.
aic7xxx_pci.c:
Use the maximum data fifo threshold for all chips.
2000-10-31 18:43:29 +00:00
|
|
|
if ((ahc->flags & AHC_TARGETROLE) != 0) {
|
1998-09-15 07:24:17 +00:00
|
|
|
/*
|
|
|
|
|
* Setup addr assuming that A is an index into
|
|
|
|
|
* an array of 32byte objects, SINDEX contains
|
|
|
|
|
* the base address of that array, and DINDEX
|
|
|
|
|
* contains the base address of the location
|
|
|
|
|
* to store the indexed address.
|
|
|
|
|
*/
|
|
|
|
|
set_32byte_addr:
|
|
|
|
|
shr ARG_2, 3, A;
|
|
|
|
|
shl A, 5;
|
|
|
|
|
jmp set_1byte_addr;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Setup addr assuming that A is an index into
|
|
|
|
|
* an array of 64byte objects, SINDEX contains
|
|
|
|
|
* the base address of that array, and DINDEX
|
|
|
|
|
* contains the base address of the location
|
|
|
|
|
* to store the indexed address.
|
|
|
|
|
*/
|
|
|
|
|
set_64byte_addr:
|
|
|
|
|
shr ARG_2, 2, A;
|
|
|
|
|
shl A, 6;
|
|
|
|
|
|
|
|
|
|
/*
|
2000-07-18 20:12:14 +00:00
|
|
|
* Setup addr assuming that A + (ARG_2 * 256) is an
|
1998-09-15 07:24:17 +00:00
|
|
|
* index into an array of 1byte objects, SINDEX contains
|
|
|
|
|
* the base address of that array, and DINDEX contains
|
|
|
|
|
* the base address of the location to store the computed
|
|
|
|
|
* address.
|
|
|
|
|
*/
|
|
|
|
|
set_1byte_addr:
|
|
|
|
|
add DINDIR, A, SINDIR;
|
|
|
|
|
mov A, ARG_2;
|
|
|
|
|
adc DINDIR, A, SINDIR;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
clr A;
|
1998-09-15 07:24:17 +00:00
|
|
|
adc DINDIR, A, SINDIR;
|
|
|
|
|
adc DINDIR, A, SINDIR ret;
|
|
|
|
|
|
|
|
|
|
/*
|
2002-04-24 16:58:51 +00:00
|
|
|
* Either post or fetch an SCB from host memory based on the
|
1998-09-15 07:24:17 +00:00
|
|
|
* DIRECTION bit in DMAPARAMS. The host SCB index is in SINDEX.
|
|
|
|
|
*/
|
|
|
|
|
dma_scb:
|
|
|
|
|
mov A, SINDEX;
|
|
|
|
|
if ((ahc->features & AHC_CMD_CHAN) != 0) {
|
|
|
|
|
mvi DINDEX, CCHADDR;
|
|
|
|
|
mvi HSCB_ADDR call set_64byte_addr;
|
|
|
|
|
mov CCSCBPTR, SCBPTR;
|
|
|
|
|
test DMAPARAMS, DIRECTION jz dma_scb_tohost;
|
2001-01-22 21:03:48 +00:00
|
|
|
if ((ahc->flags & AHC_SCB_BTT) != 0) {
|
2000-09-16 20:02:28 +00:00
|
|
|
mvi CCHCNT, SCB_DOWNLOAD_SIZE_64;
|
|
|
|
|
} else {
|
|
|
|
|
mvi CCHCNT, SCB_DOWNLOAD_SIZE;
|
|
|
|
|
}
|
1998-09-15 07:24:17 +00:00
|
|
|
mvi CCSCBCTL, CCARREN|CCSCBEN|CCSCBDIR|CCSCBRESET;
|
|
|
|
|
cmp CCSCBCTL, CCSCBDONE|ARRDONE|CCARREN|CCSCBEN|CCSCBDIR jne .;
|
|
|
|
|
jmp dma_scb_finish;
|
|
|
|
|
dma_scb_tohost:
|
2000-09-16 20:02:28 +00:00
|
|
|
mvi CCHCNT, SCB_UPLOAD_SIZE;
|
|
|
|
|
if ((ahc->features & AHC_ULTRA2) == 0) {
|
1998-09-15 07:24:17 +00:00
|
|
|
mvi CCSCBCTL, CCSCBRESET;
|
2000-09-16 20:02:28 +00:00
|
|
|
bmov CCSCBRAM, SCB_BASE, SCB_UPLOAD_SIZE;
|
1998-09-15 07:24:17 +00:00
|
|
|
or CCSCBCTL, CCSCBEN|CCSCBRESET;
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
test CCSCBCTL, CCSCBDONE jz .;
|
2000-09-16 20:02:28 +00:00
|
|
|
} else if ((ahc->bugs & AHC_SCBCHAN_UPLOAD_BUG) != 0) {
|
|
|
|
|
mvi CCSCBCTL, CCARREN|CCSCBRESET;
|
|
|
|
|
cmp CCSCBCTL, ARRDONE|CCARREN jne .;
|
|
|
|
|
mvi CCHCNT, SCB_UPLOAD_SIZE;
|
|
|
|
|
mvi CCSCBCTL, CCSCBEN|CCSCBRESET;
|
|
|
|
|
cmp CCSCBCTL, CCSCBDONE|CCSCBEN jne .;
|
1998-09-15 07:24:17 +00:00
|
|
|
} else {
|
|
|
|
|
mvi CCSCBCTL, CCARREN|CCSCBEN|CCSCBRESET;
|
|
|
|
|
cmp CCSCBCTL, CCSCBDONE|ARRDONE|CCARREN|CCSCBEN jne .;
|
|
|
|
|
}
|
|
|
|
|
dma_scb_finish:
|
|
|
|
|
clr CCSCBCTL;
|
|
|
|
|
test CCSCBCTL, CCARREN|CCSCBEN jnz .;
|
|
|
|
|
ret;
|
|
|
|
|
} else {
|
|
|
|
|
mvi DINDEX, HADDR;
|
|
|
|
|
mvi HSCB_ADDR call set_64byte_addr;
|
2000-09-16 20:02:28 +00:00
|
|
|
mvi SCB_DOWNLOAD_SIZE call set_hcnt;
|
1998-09-15 07:24:17 +00:00
|
|
|
mov DFCNTRL, DMAPARAMS;
|
|
|
|
|
test DMAPARAMS, DIRECTION jnz dma_scb_fromhost;
|
|
|
|
|
/* Fill it with the SCB data */
|
1997-03-24 05:02:55 +00:00
|
|
|
copy_scb_tofifo:
|
2000-09-16 20:02:28 +00:00
|
|
|
mvi SINDEX, SCB_BASE;
|
|
|
|
|
add A, SCB_DOWNLOAD_SIZE, SINDEX;
|
1997-03-24 05:02:55 +00:00
|
|
|
copy_scb_tofifo_loop:
|
2000-09-16 20:02:28 +00:00
|
|
|
call copy_to_fifo_8;
|
1998-09-15 07:24:17 +00:00
|
|
|
cmp SINDEX, A jne copy_scb_tofifo_loop;
|
|
|
|
|
or DFCNTRL, HDMAEN|FIFOFLUSH;
|
2000-09-16 20:02:28 +00:00
|
|
|
jmp dma_finish;
|
1996-10-25 06:34:59 +00:00
|
|
|
dma_scb_fromhost:
|
2000-09-16 20:02:28 +00:00
|
|
|
mvi DINDEX, SCB_BASE;
|
|
|
|
|
if ((ahc->bugs & AHC_PCI_2_1_RETRY_BUG) != 0) {
|
|
|
|
|
/*
|
|
|
|
|
* The PCI module will only issue a PCI
|
|
|
|
|
* retry if the data FIFO is empty. If the
|
|
|
|
|
* host disconnects in the middle of a
|
|
|
|
|
* transfer, we must empty the fifo of all
|
|
|
|
|
* available data to force the chip to
|
|
|
|
|
* continue the transfer. This does not
|
|
|
|
|
* happen for SCSI transfers as the SCSI module
|
2002-08-31 06:43:15 +00:00
|
|
|
* will drain the FIFO as data are made available.
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
* When the hang occurs, we know that a multiple
|
2002-08-31 06:43:15 +00:00
|
|
|
* of 8 bytes is in the FIFO because the PCI
|
2000-09-16 20:02:28 +00:00
|
|
|
* module has an 8 byte input latch that only
|
|
|
|
|
* dumps to the FIFO when HCNT == 0 or the
|
|
|
|
|
* latch is full.
|
|
|
|
|
*/
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
clr A;
|
2001-03-20 04:37:19 +00:00
|
|
|
/* Wait for at least 8 bytes of data to arrive. */
|
2000-09-16 20:02:28 +00:00
|
|
|
dma_scb_hang_fifo:
|
2001-03-19 04:40:35 +00:00
|
|
|
test DFSTATUS, FIFOQWDEMP jnz dma_scb_hang_fifo;
|
2000-09-16 20:02:28 +00:00
|
|
|
dma_scb_hang_wait:
|
|
|
|
|
test DFSTATUS, MREQPEND jnz dma_scb_hang_wait;
|
|
|
|
|
test DFSTATUS, HDONE jnz dma_scb_hang_dma_done;
|
|
|
|
|
test DFSTATUS, HDONE jnz dma_scb_hang_dma_done;
|
|
|
|
|
test DFSTATUS, HDONE jnz dma_scb_hang_dma_done;
|
|
|
|
|
/*
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
* The PCI module no longer intends to perform
|
2001-03-20 04:37:19 +00:00
|
|
|
* a PCI transaction. Drain the fifo.
|
2000-09-16 20:02:28 +00:00
|
|
|
*/
|
2001-08-05 22:20:12 +00:00
|
|
|
dma_scb_hang_dma_drain_fifo:
|
|
|
|
|
not A, HCNT;
|
|
|
|
|
add A, SCB_DOWNLOAD_SIZE+SCB_BASE+1;
|
|
|
|
|
and A, ~0x7;
|
|
|
|
|
mov DINDIR,DFDAT;
|
|
|
|
|
cmp DINDEX, A jne . - 1;
|
|
|
|
|
cmp DINDEX, SCB_DOWNLOAD_SIZE+SCB_BASE
|
|
|
|
|
je dma_finish_nowait;
|
|
|
|
|
/* Restore A as the lines left to transfer. */
|
|
|
|
|
add A, -SCB_BASE, DINDEX;
|
|
|
|
|
shr A, 3;
|
2000-09-16 20:02:28 +00:00
|
|
|
jmp dma_scb_hang_fifo;
|
|
|
|
|
dma_scb_hang_dma_done:
|
|
|
|
|
and DFCNTRL, ~HDMAEN;
|
|
|
|
|
test DFCNTRL, HDMAEN jnz .;
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
add SEQADDR0, A;
|
2000-09-16 20:02:28 +00:00
|
|
|
} else {
|
|
|
|
|
call dma_finish;
|
|
|
|
|
}
|
aic7xxx.c:
Style nits.
Make sure that our selection hardware is disabled
as soon as possible after detecting a busfree and
even go so far as to disable the selection hardware
in advance of an event that will cause a busfree
(ABORT or BUS DEVICE RESET message). The concern
is that the selection hardware will select a target
for which, after processing the bus free, there
will be no commands pending. The sequencer idle
loop will re-enable the selection should it still be
necessary.
In ahc_handle_scsiint(), clear SSTAT0 events several
PCI transactions (most notably reads) prior to clearing
SCSIINT. The newer chips seem to take a bit of time to
see the change which can make the clearing of SCSIINT
ineffective.
Don't bother panicing at the end of ahc_handle_scsiint().
Getting to the final else just means we lost the race
with clearing SCSIINT.
In ahc_free(), handle init-level 0. This can happen when we
fail the attach for RAID devices. While I'm here, also kill
the parent dma tag.
In ahc_match_scb(), consider initiator ccbs to be any
that are not from the target mode group. This fixes
a bug where an external target reset CCB was not getting
cleaned up by the reset code.
Don't bother freezing a ccb in any of our "abort" routines
when the status is set to CAM_REQ_CMP. This can happen
for a target reset ccb.
aic7xxx.reg:
Reserve space for a completion queue. This will be used
to enhance performance in the near future.
aic7xxx.seq:
Remove an optimization for the 7890 autoflush bug that
turned out to allow, in rare cases, some data to get
lost.
Implement a simpler, faster, fix for the PCI_2_1 retry
bug that hangs the sequencer on an SCB dma for certain chips.
Test against SAVED_SCSIID rather than SELID during target
reselections. This is how we always did it in the past,
but the code was modified while trying to work around an
issue with the 7895. SAVED_SCSIID takes into account
twin channel adapters such as the 2742T, whereas SELID
does not have the channel bit. This caused invalid
selection warnings and other strangeness on these cards.
aic7xxx_pci.c
Use the correct mask for checking the generic aic7892
entry.
2001-02-10 18:04:27 +00:00
|
|
|
call dfdat_in_8;
|
|
|
|
|
call dfdat_in_8;
|
|
|
|
|
call dfdat_in_8;
|
2000-09-16 20:02:28 +00:00
|
|
|
dfdat_in_8:
|
|
|
|
|
mov DINDIR,DFDAT;
|
1996-10-25 06:34:59 +00:00
|
|
|
dfdat_in_7:
|
1998-09-15 07:24:17 +00:00
|
|
|
mov DINDIR,DFDAT;
|
|
|
|
|
mov DINDIR,DFDAT;
|
|
|
|
|
mov DINDIR,DFDAT;
|
|
|
|
|
mov DINDIR,DFDAT;
|
|
|
|
|
mov DINDIR,DFDAT;
|
2000-09-16 20:02:28 +00:00
|
|
|
dfdat_in_2:
|
1998-09-15 07:24:17 +00:00
|
|
|
mov DINDIR,DFDAT;
|
|
|
|
|
mov DINDIR,DFDAT ret;
|
|
|
|
|
}
|
|
|
|
|
|
2000-09-16 20:02:28 +00:00
|
|
|
copy_to_fifo_8:
|
|
|
|
|
mov DFDAT,SINDIR;
|
|
|
|
|
mov DFDAT,SINDIR;
|
2000-07-18 20:12:14 +00:00
|
|
|
copy_to_fifo_6:
|
|
|
|
|
mov DFDAT,SINDIR;
|
|
|
|
|
copy_to_fifo_5:
|
|
|
|
|
mov DFDAT,SINDIR;
|
|
|
|
|
copy_to_fifo_4:
|
|
|
|
|
mov DFDAT,SINDIR;
|
|
|
|
|
mov DFDAT,SINDIR;
|
|
|
|
|
mov DFDAT,SINDIR;
|
|
|
|
|
mov DFDAT,SINDIR ret;
|
1996-10-25 06:34:59 +00:00
|
|
|
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
1996-10-25 06:34:59 +00:00
|
|
|
* Wait for DMA from host memory to data FIFO to complete, then disable
|
|
|
|
|
* DMA and wait for it to acknowledge that it's off.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
1996-10-25 06:34:59 +00:00
|
|
|
dma_finish:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
test DFSTATUS,HDONE jz dma_finish;
|
2001-03-19 04:40:35 +00:00
|
|
|
dma_finish_nowait:
|
1997-02-03 02:02:04 +00:00
|
|
|
/* Turn off DMA */
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
and DFCNTRL, ~HDMAEN;
|
|
|
|
|
test DFCNTRL, HDMAEN jnz .;
|
|
|
|
|
ret;
|
1995-08-05 17:31:39 +00:00
|
|
|
|
This is an MFC candidate.
ahc_eisa.c:
Change aic7770_map_int to take an additional irq parameter.
Although we can get the irq from the eisa dev under FreeBSD,
we can't do this under linux, so the OSM interface must supply
this.
ahc_pci.c:
Move ahc_power_state_change() to the OSM. This allows us to
use a platform supplied function that does the same thing.
-current will move to the FreeBSD native API in the near
future.
aic7770.c:
Sync up with core changes to support Linux EISA.
We now store a 2 bit primary channel number rather
than a bit flag that only allows b to be the primary
channel. Adjust for this change.
aic7xxx.c:
Namespace and staticization cleanup. All exported symbols
use an "ahc_" prefix to avoid collisions with other modules.
Correct a logic bug that prevented us from dropping
ATN during some exceptional conditions during message
processing.
Take advantage of a new flag managed by the sequencer
that indicates if an SCB fetch is in progress. If so,
the currently selected SCB needs to be returned to the
free list to prevent an SCB leak. This leak is a rarity
and would only occur if a bus reset or timeout resulting
in a bus reset occurred in the middle of an SCB fetch.
Don't attempt to perform ULTRA transfers on ultra capable
adapters missing the external precision resistor required
for ultra speeds. I've never encountered an adapter
configured this way, but better safe than sorry.
Handle the case of 5MHz user sync rate set as "0" instead of 0x1c
in scratch ram.
If we lookup a period of 0 in our table (async), clear the scsi offset.
aic7xxx.h:
Adjust for the primary channel being represented as
a 2 bit integer in the flags member of the ahc softc.
Cleanup the flags definitions so that comment blocks are
not cramped.
Update seeprom definitions to correctly reflect the fact
that the primary channel is represented as a 2 bit integer.
Add AHC_ULTRA_DIASABLED softc flag to denote controllers
missing the external precision resistor.
aic7xxx.reg:
Add DFCACHETH to the definition of DFSTATUS for completness sake.
Add SEQ_FLAGS2 which currently only contains the SCB_DMA
(SCB DMA in progress) flag.
aic7xxx.seq:
Correct a problem when one lun has a disconnected untagged
transaction and another lun has disconnected tagged transactions.
Just because an entry is found in the untagged table doesn't
mean that it will match. If the match on the lun fails, cleanup
the SCB (return it to the disconnected list or free it), and snoop
for a tag message. Before this change, we reported an unsolicited
reselection. This bug was introduced about a month ago during an
overly aggressive optimization pass on the reselection code.
When cleaning up an SCB, we can't just blindly free the SCB. In
the paging case, if the SCB came off of the disconnected list, its
state may never have been updated in host memory. So, check the
disconnected bit in SCB_CONTROL and return the SCB to the disconnected
list if appropriate.
Manage the SCB_DMA flag of SEQ_FLAGS2.
More carefully shutdown the S/G dma engine in all cases by using
a subroutine. Supposedly not doing this can cause an arbiter hang
on some ULTRA2 chips.
Formatting cleanup.
On some chips, at least the aic7856, the transition from
MREQPEND to HDONE can take a full 4 clock cycles. Test
HDONE one more time to avoid this race. We only want our
FIFO hung recovery code to execute when the engine is
really hung.
aic7xxx_93cx6.c:
Sync perforce ids.
aic7xxx_freebsd.c:
Adjust for the primary channel being a 2 bit integer
rather than a flag for 'B' channel being the primary.
Namespace cleanup.
Unpause the sequencer in one error recovery path that
neglected to do so. This could have caused us to perform
a bus reset when a recovery message might have otherwise been
successful.
aic7xxx_freebsd.h:
Use AHC_PCI_CONFIG for controlling compilation of PCI
support consistently throughout the driver.
Move ahc_power_state_change() to OSM.
aic7xxx_inline.h
Namespace cleanup.
Adjust our interrupt handler so it will work in the edge
interrupt case. We must process all interrupt sources
when the interrupt fires or risk not ever getting an
interrupt again. This involves marking the fact
that we are relying on an edge interrupt in ahc->flags
and checking for this condition in addition to the
AHC_ALL_INTERRUPTS flag. This fixes hangs on the
284X and any other aic7770 installation where level
interrupts are not available.
aic7xxx_pci.c:
Move the powerstate manipulation code into the OSM. Several
OSes now provide this functionality natively.
Take another shot at using the data stored in scratch ram
if the SCB2 signature is correct and no SEEPROM data is
available. In the past this failed if external SCB ram
was configured because the memory port was locked. We
now release the memory port prior to testing the values
in SCB2 and re-acquire it prior to doing termination control.
Adjust for new 2 bit primary channel setting.
Trust the STPWLEVEL setting on v 3.X BIOSes too.
Configure any 785X ID in the same fashion and assume
that any device with a rev id of 1 or higher has the
PCI 2.1 retry bug.
2001-03-11 06:34:17 +00:00
|
|
|
/*
|
|
|
|
|
* Restore an SCB that failed to match an incoming reselection
|
|
|
|
|
* to the correct/safe state. If the SCB is for a disconnected
|
|
|
|
|
* transaction, it must be returned to the disconnected list.
|
|
|
|
|
* If it is not in the disconnected state, it must be free.
|
|
|
|
|
*/
|
|
|
|
|
cleanup_scb:
|
|
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
|
|
|
|
test SCB_CONTROL,DISCONNECTED jnz add_scb_to_disc_list;
|
|
|
|
|
}
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
add_scb_to_free_list:
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
2002-04-24 16:58:51 +00:00
|
|
|
BEGIN_CRITICAL;
|
1998-09-15 07:24:17 +00:00
|
|
|
mov SCB_NEXT, FREE_SCBH;
|
2000-02-09 21:25:00 +00:00
|
|
|
mvi SCB_TAG, SCB_LIST_NULL;
|
|
|
|
|
mov FREE_SCBH, SCBPTR ret;
|
2002-04-24 16:58:51 +00:00
|
|
|
END_CRITICAL;
|
2000-02-09 21:25:00 +00:00
|
|
|
} else {
|
|
|
|
|
mvi SCB_TAG, SCB_LIST_NULL ret;
|
1998-09-15 07:24:17 +00:00
|
|
|
}
|
1994-11-17 20:19:10 +00:00
|
|
|
|
2001-07-18 21:39:48 +00:00
|
|
|
if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
|
|
|
|
|
set_hhaddr:
|
|
|
|
|
or DSCOMMAND1, HADDLDSEL0;
|
|
|
|
|
and HADDR, SG_HIGH_ADDR_BITS, SINDEX;
|
|
|
|
|
and DSCOMMAND1, ~HADDLDSEL0 ret;
|
|
|
|
|
}
|
|
|
|
|
|
1998-09-15 07:24:17 +00:00
|
|
|
if ((ahc->flags & AHC_PAGESCBS) != 0) {
|
1996-10-25 06:34:59 +00:00
|
|
|
get_free_or_disc_scb:
|
2002-04-24 16:58:51 +00:00
|
|
|
BEGIN_CRITICAL;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
cmp FREE_SCBH, SCB_LIST_NULL jne dequeue_free_scb;
|
|
|
|
|
cmp DISCONNECTED_SCBH, SCB_LIST_NULL jne dequeue_disc_scb;
|
1996-11-11 05:16:41 +00:00
|
|
|
return_error:
|
2000-11-06 20:05:38 +00:00
|
|
|
mvi NO_FREE_SCB call set_seqint;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mvi SINDEX, SCB_LIST_NULL ret;
|
1996-10-25 06:34:59 +00:00
|
|
|
dequeue_disc_scb:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov SCBPTR, DISCONNECTED_SCBH;
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
mov DISCONNECTED_SCBH, SCB_NEXT;
|
2002-04-24 16:58:51 +00:00
|
|
|
END_CRITICAL;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mvi DMAPARAMS, FIFORESET;
|
Sync Perforce IDs, add tranceiver state change support, and correct
numerous error recovery buglets.
Many thanks to Tor Egge for his assistance in diagnosing problems with
the error recovery code.
aic7xxx.c:
Report missed bus free events using their own sequencer interrupt
code to avoid confusion with other "bad phase" interrupts.
Remove a delay used in debugging. This delay could only be hit
in certain, very extreme, error recovery scenarios.
Handle transceiver state changes correctly. You can now
plug an SE device into a hot-plug LVD bus without hanging
the controller.
When stepping through a critical section, panic if we step
more than a reasonable number of times.
After a bus reset, disable bus reset interupts until we either
our first attempt to (re)select another device, or another device
attemps to select us. This removes the need to busy wait in
kernel for the scsi reset line to fall yet still ensures we
see any reset events that impact the state of either our initiator
or target roles. Before this change, we had the potential of
servicing a "storm" of reset interrupts if the reset line was
held for a significant amount of time.
Indicate the current sequencer address whenever we dump the
card's state.
aic7xxx.reg:
Transceiver state change register definitions.
Add the missed bussfree sequencer interrupt code.
Re-enable the scsi reset interrupt if it has been
disabled before every attempt to (re)select a device
and when we have been selected as a target.
When being (re)selected, check to see if the selection
dissappeared just after we enabled our bus free interrupt.
If the bus has gone free again, go back to the idle loop
and wait for another selection.
Note two locations where we should change our behavior
if ATN is still raised. If ATN is raised during the
presentation of a command complete or disconnect message,
we should ignore the message and expect the target to put
us in msgout phase. We don't currently do this as it
requires some code re-arrangement so that critical sections
can be properly placed around our handling of these two
events. Otherwise, we cannot guarantee that the check of
ATN is atomic relative to our acking of the message in
byte (the kernel could assert ATN).
Only set the IDENTIFY_SEEN flag after we have settled
on the SCB for this transaction. The kernel looks at
this flag before assuming that SCB_TAG is valid. This
avoids confusion during certain types of error recovery.
Add a critical section around findSCB. We cannot allow
the kernel to remove an entry from the disconnected
list while we are traversing it. Ditto for get_free_or_disc_scb.
aic7xxx_freebsd.c:
Only assume that SCB_TAG is accurate if IDENTIFY_SEEN is
set in SEQ_FLAGS.
Fix a typo that caused us to execute some code for the
non-SCB paging case when paging SCBs. This only occurred
during error recovery.
2000-11-10 20:13:41 +00:00
|
|
|
mov SCB_TAG jmp dma_scb;
|
2002-04-24 16:58:51 +00:00
|
|
|
BEGIN_CRITICAL;
|
1996-10-25 06:34:59 +00:00
|
|
|
dequeue_free_scb:
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov SCBPTR, FREE_SCBH;
|
|
|
|
|
mov FREE_SCBH, SCB_NEXT ret;
|
2002-04-24 16:58:51 +00:00
|
|
|
END_CRITICAL;
|
1994-11-17 20:19:10 +00:00
|
|
|
|
1996-10-25 06:34:59 +00:00
|
|
|
add_scb_to_disc_list:
|
1996-01-03 06:25:32 +00:00
|
|
|
/*
|
1996-10-25 06:34:59 +00:00
|
|
|
* Link this SCB into the DISCONNECTED list. This list holds the
|
|
|
|
|
* candidates for paging out an SCB if one is needed for a new command.
|
|
|
|
|
* Modifying the disconnected list is a critical(pause dissabled) section.
|
1996-01-03 06:25:32 +00:00
|
|
|
*/
|
2002-04-24 16:58:51 +00:00
|
|
|
BEGIN_CRITICAL;
|
Makefile gram.y scan.l sequencer.h symbol.c symbol.h aic7xxx_asm.c:
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
1997-03-16 07:08:19 +00:00
|
|
|
mov SCB_NEXT, DISCONNECTED_SCBH;
|
1998-09-15 07:24:17 +00:00
|
|
|
mov DISCONNECTED_SCBH, SCBPTR ret;
|
2002-04-24 16:58:51 +00:00
|
|
|
END_CRITICAL;
|
2000-09-16 20:02:28 +00:00
|
|
|
}
|
2000-11-06 20:05:38 +00:00
|
|
|
set_seqint:
|
|
|
|
|
mov INTSTAT, SINDEX;
|
|
|
|
|
nop;
|
2000-07-18 20:12:14 +00:00
|
|
|
return:
|
|
|
|
|
ret;
|
