2012-03-11 04:14:00 +00:00
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/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* IPD Support.
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*
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* <hr>$Revision: 58943 $<hr>
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*/
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#include <linux/module.h>
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#include <asm/octeon/cvmx.h>
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#include <asm/octeon/cvmx-config.h>
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#include <asm/octeon/cvmx-bootmem.h>
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#include <asm/octeon/cvmx-pip-defs.h>
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#include <asm/octeon/cvmx-dbg-defs.h>
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#include <asm/octeon/cvmx-sso-defs.h>
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#include <asm/octeon/cvmx-fpa.h>
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#include <asm/octeon/cvmx-wqe.h>
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#include <asm/octeon/cvmx-ipd.h>
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#include <asm/octeon/cvmx-clock.h>
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#include <asm/octeon/cvmx-helper-errata.h>
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#include <asm/octeon/cvmx-helper-cfg.h>
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#else
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2012-03-11 06:17:49 +00:00
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#if !defined(__FreeBSD__) || !defined(_KERNEL)
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2012-03-11 04:14:00 +00:00
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#include "executive-config.h"
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2012-03-11 06:17:49 +00:00
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#endif
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2012-03-11 04:14:00 +00:00
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#include "cvmx.h"
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#include "cvmx-sysinfo.h"
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#include "cvmx-bootmem.h"
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#include "cvmx-version.h"
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#include "cvmx-helper-check-defines.h"
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2012-03-11 06:17:49 +00:00
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#if !defined(__FreeBSD__) || !defined(_KERNEL)
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2012-03-11 06:55:17 +00:00
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#include "cvmx-error.h"
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2012-03-11 04:14:00 +00:00
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#include "cvmx-config.h"
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2012-03-11 06:17:49 +00:00
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#endif
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2012-03-11 04:14:00 +00:00
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#include "cvmx-fpa.h"
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#include "cvmx-wqe.h"
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#include "cvmx-ipd.h"
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#include "cvmx-helper-errata.h"
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#include "cvmx-helper-cfg.h"
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#endif
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#ifdef CVMX_ENABLE_PKO_FUNCTIONS
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static void __cvmx_ipd_free_ptr_v1(void)
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{
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/* Only CN38XXp{1,2} cannot read pointer out of the IPD */
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if (!OCTEON_IS_MODEL(OCTEON_CN38XX_PASS2)) {
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int no_wptr = 0;
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cvmx_ipd_ptr_count_t ipd_ptr_count;
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ipd_ptr_count.u64 = cvmx_read_csr(CVMX_IPD_PTR_COUNT);
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/* Handle Work Queue Entry in cn56xx and cn52xx */
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if (octeon_has_feature(OCTEON_FEATURE_NO_WPTR)) {
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cvmx_ipd_ctl_status_t ipd_ctl_status;
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ipd_ctl_status.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS);
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if (ipd_ctl_status.s.no_wptr)
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no_wptr = 1;
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}
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/* Free the prefetched WQE */
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if (ipd_ptr_count.s.wqev_cnt) {
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cvmx_ipd_wqe_ptr_valid_t ipd_wqe_ptr_valid;
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ipd_wqe_ptr_valid.u64 = cvmx_read_csr(CVMX_IPD_WQE_PTR_VALID);
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if (no_wptr)
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_wqe_ptr_valid.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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else
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_wqe_ptr_valid.s.ptr<<7), CVMX_FPA_WQE_POOL, 0);
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}
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/* Free all WQE in the fifo */
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if (ipd_ptr_count.s.wqe_pcnt) {
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int i;
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cvmx_ipd_pwp_ptr_fifo_ctl_t ipd_pwp_ptr_fifo_ctl;
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ipd_pwp_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_PWP_PTR_FIFO_CTL);
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for (i = 0; i < ipd_ptr_count.s.wqe_pcnt; i++) {
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ipd_pwp_ptr_fifo_ctl.s.cena = 0;
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ipd_pwp_ptr_fifo_ctl.s.raddr = ipd_pwp_ptr_fifo_ctl.s.max_cnts + (ipd_pwp_ptr_fifo_ctl.s.wraddr+i) % ipd_pwp_ptr_fifo_ctl.s.max_cnts;
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cvmx_write_csr(CVMX_IPD_PWP_PTR_FIFO_CTL, ipd_pwp_ptr_fifo_ctl.u64);
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ipd_pwp_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_PWP_PTR_FIFO_CTL);
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if (no_wptr)
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_pwp_ptr_fifo_ctl.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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else
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_pwp_ptr_fifo_ctl.s.ptr<<7), CVMX_FPA_WQE_POOL, 0);
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}
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ipd_pwp_ptr_fifo_ctl.s.cena = 1;
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cvmx_write_csr(CVMX_IPD_PWP_PTR_FIFO_CTL, ipd_pwp_ptr_fifo_ctl.u64);
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}
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/* Free the prefetched packet */
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if (ipd_ptr_count.s.pktv_cnt) {
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cvmx_ipd_pkt_ptr_valid_t ipd_pkt_ptr_valid;
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ipd_pkt_ptr_valid.u64 = cvmx_read_csr(CVMX_IPD_PKT_PTR_VALID);
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_pkt_ptr_valid.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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}
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/* Free the per port prefetched packets */
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if (1) {
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int i;
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cvmx_ipd_prc_port_ptr_fifo_ctl_t ipd_prc_port_ptr_fifo_ctl;
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ipd_prc_port_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_PRC_PORT_PTR_FIFO_CTL);
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for (i = 0; i < ipd_prc_port_ptr_fifo_ctl.s.max_pkt; i++) {
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ipd_prc_port_ptr_fifo_ctl.s.cena = 0;
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ipd_prc_port_ptr_fifo_ctl.s.raddr = i % ipd_prc_port_ptr_fifo_ctl.s.max_pkt;
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cvmx_write_csr(CVMX_IPD_PRC_PORT_PTR_FIFO_CTL, ipd_prc_port_ptr_fifo_ctl.u64);
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ipd_prc_port_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_PRC_PORT_PTR_FIFO_CTL);
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_prc_port_ptr_fifo_ctl.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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}
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ipd_prc_port_ptr_fifo_ctl.s.cena = 1;
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cvmx_write_csr(CVMX_IPD_PRC_PORT_PTR_FIFO_CTL, ipd_prc_port_ptr_fifo_ctl.u64);
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}
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/* Free all packets in the holding fifo */
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if (ipd_ptr_count.s.pfif_cnt) {
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int i;
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cvmx_ipd_prc_hold_ptr_fifo_ctl_t ipd_prc_hold_ptr_fifo_ctl;
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ipd_prc_hold_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL);
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for (i = 0; i < ipd_ptr_count.s.pfif_cnt; i++) {
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ipd_prc_hold_ptr_fifo_ctl.s.cena = 0;
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ipd_prc_hold_ptr_fifo_ctl.s.raddr = (ipd_prc_hold_ptr_fifo_ctl.s.praddr + i) % ipd_prc_hold_ptr_fifo_ctl.s.max_pkt;
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cvmx_write_csr(CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL, ipd_prc_hold_ptr_fifo_ctl.u64);
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ipd_prc_hold_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL);
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_prc_hold_ptr_fifo_ctl.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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}
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ipd_prc_hold_ptr_fifo_ctl.s.cena = 1;
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cvmx_write_csr(CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL, ipd_prc_hold_ptr_fifo_ctl.u64);
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}
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/* Free all packets in the fifo */
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if (ipd_ptr_count.s.pkt_pcnt) {
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int i;
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cvmx_ipd_pwp_ptr_fifo_ctl_t ipd_pwp_ptr_fifo_ctl;
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ipd_pwp_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_PWP_PTR_FIFO_CTL);
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for (i = 0; i < ipd_ptr_count.s.pkt_pcnt; i++) {
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ipd_pwp_ptr_fifo_ctl.s.cena = 0;
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ipd_pwp_ptr_fifo_ctl.s.raddr = (ipd_pwp_ptr_fifo_ctl.s.praddr+i) % ipd_pwp_ptr_fifo_ctl.s.max_cnts;
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cvmx_write_csr(CVMX_IPD_PWP_PTR_FIFO_CTL, ipd_pwp_ptr_fifo_ctl.u64);
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ipd_pwp_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_PWP_PTR_FIFO_CTL);
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_pwp_ptr_fifo_ctl.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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}
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ipd_pwp_ptr_fifo_ctl.s.cena = 1;
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cvmx_write_csr(CVMX_IPD_PWP_PTR_FIFO_CTL, ipd_pwp_ptr_fifo_ctl.u64);
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}
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}
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}
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static void __cvmx_ipd_free_ptr_v2(void)
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{
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int no_wptr = 0;
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int i;
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cvmx_ipd_port_ptr_fifo_ctl_t ipd_port_ptr_fifo_ctl;
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cvmx_ipd_ptr_count_t ipd_ptr_count;
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ipd_ptr_count.u64 = cvmx_read_csr(CVMX_IPD_PTR_COUNT);
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/* Handle Work Queue Entry in cn68xx */
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if (octeon_has_feature(OCTEON_FEATURE_NO_WPTR)) {
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cvmx_ipd_ctl_status_t ipd_ctl_status;
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ipd_ctl_status.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS);
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if (ipd_ctl_status.s.no_wptr)
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no_wptr = 1;
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}
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/* Free the prefetched WQE */
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if (ipd_ptr_count.s.wqev_cnt) {
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cvmx_ipd_next_wqe_ptr_t ipd_next_wqe_ptr;
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ipd_next_wqe_ptr.u64 = cvmx_read_csr(CVMX_IPD_NEXT_WQE_PTR);
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if (no_wptr)
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_next_wqe_ptr.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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else
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_next_wqe_ptr.s.ptr<<7), CVMX_FPA_WQE_POOL, 0);
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}
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/* Free all WQE in the fifo */
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if (ipd_ptr_count.s.wqe_pcnt) {
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cvmx_ipd_free_ptr_fifo_ctl_t ipd_free_ptr_fifo_ctl;
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cvmx_ipd_free_ptr_value_t ipd_free_ptr_value;
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ipd_free_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_FREE_PTR_FIFO_CTL);
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for (i = 0; i < ipd_ptr_count.s.wqe_pcnt; i++) {
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ipd_free_ptr_fifo_ctl.s.cena = 0;
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ipd_free_ptr_fifo_ctl.s.raddr = ipd_free_ptr_fifo_ctl.s.max_cnts + (ipd_free_ptr_fifo_ctl.s.wraddr+i) % ipd_free_ptr_fifo_ctl.s.max_cnts;
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cvmx_write_csr(CVMX_IPD_FREE_PTR_FIFO_CTL, ipd_free_ptr_fifo_ctl.u64);
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ipd_free_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_FREE_PTR_FIFO_CTL);
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ipd_free_ptr_value.u64 = cvmx_read_csr(CVMX_IPD_FREE_PTR_VALUE);
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if (no_wptr)
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_free_ptr_value.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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else
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_free_ptr_value.s.ptr<<7), CVMX_FPA_WQE_POOL, 0);
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}
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ipd_free_ptr_fifo_ctl.s.cena = 1;
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cvmx_write_csr(CVMX_IPD_FREE_PTR_FIFO_CTL, ipd_free_ptr_fifo_ctl.u64);
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}
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/* Free the prefetched packet */
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if (ipd_ptr_count.s.pktv_cnt) {
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cvmx_ipd_next_pkt_ptr_t ipd_next_pkt_ptr;
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ipd_next_pkt_ptr.u64 = cvmx_read_csr(CVMX_IPD_NEXT_PKT_PTR);
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_next_pkt_ptr.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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}
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/* Free the per port prefetched packets */
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ipd_port_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_PORT_PTR_FIFO_CTL);
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for (i = 0; i < ipd_port_ptr_fifo_ctl.s.max_pkt; i++) {
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ipd_port_ptr_fifo_ctl.s.cena = 0;
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ipd_port_ptr_fifo_ctl.s.raddr = i % ipd_port_ptr_fifo_ctl.s.max_pkt;
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cvmx_write_csr(CVMX_IPD_PORT_PTR_FIFO_CTL, ipd_port_ptr_fifo_ctl.u64);
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ipd_port_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_PORT_PTR_FIFO_CTL);
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_port_ptr_fifo_ctl.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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}
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ipd_port_ptr_fifo_ctl.s.cena = 1;
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cvmx_write_csr(CVMX_IPD_PORT_PTR_FIFO_CTL, ipd_port_ptr_fifo_ctl.u64);
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/* Free all packets in the holding fifo */
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if (ipd_ptr_count.s.pfif_cnt) {
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cvmx_ipd_hold_ptr_fifo_ctl_t ipd_hold_ptr_fifo_ctl;
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ipd_hold_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_HOLD_PTR_FIFO_CTL);
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for (i = 0; i < ipd_ptr_count.s.pfif_cnt; i++) {
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ipd_hold_ptr_fifo_ctl.s.cena = 0;
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ipd_hold_ptr_fifo_ctl.s.raddr = (ipd_hold_ptr_fifo_ctl.s.praddr + i) % ipd_hold_ptr_fifo_ctl.s.max_pkt;
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cvmx_write_csr(CVMX_IPD_HOLD_PTR_FIFO_CTL, ipd_hold_ptr_fifo_ctl.u64);
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|
ipd_hold_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_HOLD_PTR_FIFO_CTL);
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cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_hold_ptr_fifo_ctl.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
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|
}
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|
|
|
ipd_hold_ptr_fifo_ctl.s.cena = 1;
|
|
|
|
cvmx_write_csr(CVMX_IPD_HOLD_PTR_FIFO_CTL, ipd_hold_ptr_fifo_ctl.u64);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Free all packets in the fifo */
|
|
|
|
if (ipd_ptr_count.s.pkt_pcnt) {
|
|
|
|
cvmx_ipd_free_ptr_fifo_ctl_t ipd_free_ptr_fifo_ctl;
|
|
|
|
cvmx_ipd_free_ptr_value_t ipd_free_ptr_value;
|
|
|
|
ipd_free_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_FREE_PTR_FIFO_CTL);
|
|
|
|
|
|
|
|
for (i = 0; i < ipd_ptr_count.s.pkt_pcnt; i++) {
|
|
|
|
ipd_free_ptr_fifo_ctl.s.cena = 0;
|
|
|
|
ipd_free_ptr_fifo_ctl.s.raddr = (ipd_free_ptr_fifo_ctl.s.praddr+i) % ipd_free_ptr_fifo_ctl.s.max_cnts;
|
|
|
|
cvmx_write_csr(CVMX_IPD_FREE_PTR_FIFO_CTL, ipd_free_ptr_fifo_ctl.u64);
|
|
|
|
ipd_free_ptr_fifo_ctl.u64 = cvmx_read_csr(CVMX_IPD_FREE_PTR_FIFO_CTL);
|
|
|
|
ipd_free_ptr_value.u64 = cvmx_read_csr(CVMX_IPD_FREE_PTR_VALUE);
|
|
|
|
cvmx_fpa_free(cvmx_phys_to_ptr((uint64_t)ipd_free_ptr_value.s.ptr<<7), CVMX_FPA_PACKET_POOL, 0);
|
|
|
|
}
|
|
|
|
ipd_free_ptr_fifo_ctl.s.cena = 1;
|
|
|
|
cvmx_write_csr(CVMX_IPD_FREE_PTR_FIFO_CTL, ipd_free_ptr_fifo_ctl.u64);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @INTERNAL
|
|
|
|
* This function is called by cvmx_helper_shutdown() to extract
|
|
|
|
* all FPA buffers out of the IPD and PIP. After this function
|
|
|
|
* completes, all FPA buffers that were prefetched by IPD and PIP
|
|
|
|
* wil be in the apropriate FPA pool. This functions does not reset
|
|
|
|
* PIP or IPD as FPA pool zero must be empty before the reset can
|
|
|
|
* be performed. WARNING: It is very important that IPD and PIP be
|
|
|
|
* reset soon after a call to this function.
|
|
|
|
*/
|
|
|
|
void __cvmx_ipd_free_ptr(void)
|
|
|
|
{
|
|
|
|
if (octeon_has_feature(OCTEON_FEATURE_PKND))
|
|
|
|
__cvmx_ipd_free_ptr_v2();
|
|
|
|
else
|
|
|
|
__cvmx_ipd_free_ptr_v1();
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|