2008-02-29 21:50:11 +00:00
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/******************************************************************************
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2013-10-09 17:32:52 +00:00
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Copyright (c) 2001-2013, Intel Corporation
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2008-02-29 21:50:11 +00:00
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#ifndef _IGB_H_DEFINED_
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#define _IGB_H_DEFINED_
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/* Tunables */
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/*
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* IGB_TXD: Maximum number of Transmit Descriptors
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*
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* This value is the number of transmit descriptors allocated by the driver.
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* Increasing this value allows the driver to queue more transmits. Each
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* descriptor is 16 bytes.
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* Since TDLEN should be multiple of 128bytes, the number of transmit
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* desscriptors should meet the following condition.
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* (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
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*/
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Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
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#define IGB_MIN_TXD 256
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#define IGB_DEFAULT_TXD 1024
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2008-02-29 21:50:11 +00:00
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#define IGB_MAX_TXD 4096
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/*
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2012-04-25 02:05:14 +00:00
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* IGB_RXD: Maximum number of Receive Descriptors
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2008-02-29 21:50:11 +00:00
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*
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* This value is the number of receive descriptors allocated by the driver.
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* Increasing this value allows the driver to buffer more incoming packets.
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* Each descriptor is 16 bytes. A receive buffer is also allocated for each
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* descriptor. The maximum MTU size is 16110.
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* Since TDLEN should be multiple of 128bytes, the number of transmit
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* desscriptors should meet the following condition.
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* (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
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*/
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Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
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#define IGB_MIN_RXD 256
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#define IGB_DEFAULT_RXD 1024
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2008-02-29 21:50:11 +00:00
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#define IGB_MAX_RXD 4096
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/*
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* IGB_TIDV - Transmit Interrupt Delay Value
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* Valid Range: 0-65535 (0=off)
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* Default Value: 64
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* This value delays the generation of transmit interrupts in units of
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* 1.024 microseconds. Transmit interrupt reduction can improve CPU
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* efficiency if properly tuned for specific network traffic. If the
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* system is reporting dropped transmits, this value may be set too high
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* causing the driver to run out of available transmit descriptors.
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*/
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#define IGB_TIDV 64
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/*
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* IGB_TADV - Transmit Absolute Interrupt Delay Value
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* Valid Range: 0-65535 (0=off)
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* Default Value: 64
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* This value, in units of 1.024 microseconds, limits the delay in which a
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* transmit interrupt is generated. Useful only if IGB_TIDV is non-zero,
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* this value ensures that an interrupt is generated after the initial
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* packet is sent on the wire within the set amount of time. Proper tuning,
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* along with IGB_TIDV, may improve traffic throughput in specific
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* network conditions.
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*/
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#define IGB_TADV 64
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/*
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* IGB_RDTR - Receive Interrupt Delay Timer (Packet Timer)
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* Valid Range: 0-65535 (0=off)
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* Default Value: 0
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* This value delays the generation of receive interrupts in units of 1.024
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* microseconds. Receive interrupt reduction can improve CPU efficiency if
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* properly tuned for specific network traffic. Increasing this value adds
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* extra latency to frame reception and can end up decreasing the throughput
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* of TCP traffic. If the system is reporting dropped receives, this value
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* may be set too high, causing the driver to run out of available receive
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* descriptors.
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*
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* CAUTION: When setting IGB_RDTR to a value other than 0, adapters
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* may hang (stop transmitting) under certain network conditions.
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* If this occurs a WATCHDOG message is logged in the system
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* event log. In addition, the controller is automatically reset,
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* restoring the network connection. To eliminate the potential
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* for the hang ensure that IGB_RDTR is set to 0.
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*/
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#define IGB_RDTR 0
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/*
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* Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
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* Valid Range: 0-65535 (0=off)
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* Default Value: 64
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* This value, in units of 1.024 microseconds, limits the delay in which a
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* receive interrupt is generated. Useful only if IGB_RDTR is non-zero,
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* this value ensures that an interrupt is generated after the initial
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* packet is received within the set amount of time. Proper tuning,
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* along with IGB_RDTR, may improve traffic throughput in specific network
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* conditions.
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*/
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#define IGB_RADV 64
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/*
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* This parameter controls the duration of transmit watchdog timer.
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*/
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2009-12-08 01:07:44 +00:00
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#define IGB_WATCHDOG (10 * hz)
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2008-02-29 21:50:11 +00:00
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/*
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* This parameter controls when the driver calls the routine to reclaim
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2011-04-05 21:55:43 +00:00
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* transmit descriptors. Cleaning earlier seems a win.
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2008-02-29 21:50:11 +00:00
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*/
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2011-04-05 21:55:43 +00:00
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#define IGB_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 2)
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2008-02-29 21:50:11 +00:00
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/*
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* This parameter controls whether or not autonegotation is enabled.
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* 0 - Disable autonegotiation
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* 1 - Enable autonegotiation
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*/
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#define DO_AUTO_NEG 1
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/*
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* This parameter control whether or not the driver will wait for
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* autonegotiation to complete.
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* 1 - Wait for autonegotiation to complete
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* 0 - Don't wait for autonegotiation to complete
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*/
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#define WAIT_FOR_AUTO_NEG_DEFAULT 0
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/* Tunables -- End */
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#define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
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ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
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ADVERTISE_1000_FULL)
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#define AUTO_ALL_MODES 0
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/* PHY master/slave setting */
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#define IGB_MASTER_SLAVE e1000_ms_hw_default
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2013-10-09 17:32:52 +00:00
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/* Support AutoMediaDetect for Marvell M88 PHY in i354 */
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#define IGB_MEDIA_RESET (1 << 0)
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2008-02-29 21:50:11 +00:00
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/*
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* Micellaneous constants
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*/
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#define IGB_VENDOR_ID 0x8086
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#define IGB_JUMBO_PBA 0x00000028
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#define IGB_DEFAULT_PBA 0x00000030
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#define IGB_SMARTSPEED_DOWNSHIFT 3
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#define IGB_SMARTSPEED_MAX 15
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2009-04-10 00:05:46 +00:00
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#define IGB_MAX_LOOP 10
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2010-01-26 22:32:22 +00:00
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2013-10-09 17:32:52 +00:00
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#define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \
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((hw->mac.type <= e1000_82576) ? 16 : 8))
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2008-02-29 21:50:11 +00:00
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#define IGB_RX_HTHRESH 8
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2013-10-09 17:32:52 +00:00
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#define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \
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adapter->msix_mem) ? 1 : 4)
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2008-02-29 21:50:11 +00:00
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2013-10-09 17:32:52 +00:00
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#define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8)
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2010-01-26 22:32:22 +00:00
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#define IGB_TX_HTHRESH 1
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Add support for the new I350 family of 1G interfaces.
- this also includes virtualization support on these devices
Correct some vlan issues we were seeing in test, jumbo frames on vlans
did not work correctly, this was all due to confused logic around HW
filters, the new code should now work for all uses.
Important fix: when mbuf resources are depeleted, it was possible to
completely empty the RX ring, and then the RX engine would stall
forever. This is fixed by a flag being set whenever the refresh code
fails due to an mbuf shortage, also the local timer now makes sure
that all queues get an interrupt when it runs, the interrupt code
will then always call rxeof, and in that routine the first thing done
is now to check the refresh flag and call refresh_mbufs. This has been
verified to fix this type 'hang'. Similar code will follow in the other
drivers.
Finally, sync up shared code for the I350 support.
Thanks to everyone that has been reporting issues, and helping in the
debug/test process!!
2011-02-11 01:00:26 +00:00
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#define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \
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2010-01-26 22:32:22 +00:00
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adapter->msix_mem) ? 1 : 16)
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2008-02-29 21:50:11 +00:00
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#define MAX_NUM_MULTICAST_ADDRESSES 128
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#define PCI_ANY_ID (~0U)
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#define ETHER_ALIGN 2
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#define IGB_TX_BUFFER_SIZE ((uint32_t) 1514)
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#define IGB_FC_PAUSE_TIME 0x0680
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#define IGB_EEPROM_APME 0x400;
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2011-12-10 07:08:52 +00:00
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/* Queue minimum free for use */
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#define IGB_QUEUE_THRESHOLD (adapter->num_tx_desc / 8)
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2008-02-29 21:50:11 +00:00
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/*
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* TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be
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* multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will
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* also optimize cache line size effect. H/W supports up to cache line size 128.
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*/
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#define IGB_DBA_ALIGN 128
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#define SPEED_MODE_BIT (1<<21) /* On PCI-E MACs only */
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/* PCI Config defines */
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#define IGB_MSIX_BAR 3
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This delta has a few important items:
PR 122839 is fixed in both em and in igb
Second, the issue on building modules since the static kernel
build changes is now resolved. I was not able to get the fancier
directory hierarchy working, but this works, both em and igb
build as modules now.
Third, there is now support in em for two new NICs, Hartwell
(or 82574) is a low cost PCIE dual port adapter that has MSIX,
for this release it uses 3 vectors only, RX, TX, and LINK. In
the next release I will add a second TX and RX queue. Also, there
is support here for ICH10, the followon to ICH9. Both of these are
early releases, general availability will follow soon.
Fourth: On Hartwell and ICH10 we now have IEEE 1588 PTP support,
I have implemented this in a provisional way so that early adopters
may try and comment on the functionality. The IOCTL structure may
change. This feature is off by default, you need to edit the Makefile
and add the EM_TIMESYNC define to get the code.
Enjoy all!!
2008-04-25 21:19:41 +00:00
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2008-02-29 21:50:11 +00:00
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/* Defines for printing debug information */
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#define DEBUG_INIT 0
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#define DEBUG_IOCTL 0
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#define DEBUG_HW 0
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#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
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#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
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#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
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#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
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#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
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#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
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#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
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#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
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#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
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#define IGB_MAX_SCATTER 64
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2009-06-24 17:41:29 +00:00
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#define IGB_VFTA_SIZE 128
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#define IGB_BR_SIZE 4096 /* ring buf size */
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2008-02-29 21:50:11 +00:00
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#define IGB_TSO_SIZE (65535 + sizeof(struct ether_vlan_header))
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#define IGB_TSO_SEG_SIZE 4096 /* Max dma segment size */
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2013-10-09 17:32:52 +00:00
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#define IGB_TXPBSIZE 20408
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2009-04-10 00:05:46 +00:00
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#define IGB_HDR_BUF 128
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2009-12-08 01:07:44 +00:00
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#define IGB_PKTTYPE_MASK 0x0000FFF0
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2013-10-09 17:32:52 +00:00
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#define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */
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2008-02-29 21:50:11 +00:00
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#define ETH_ZLEN 60
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#define ETH_ADDR_LEN 6
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2009-04-10 00:05:46 +00:00
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/* Offload bits in mbuf flag */
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#if __FreeBSD_version >= 800000
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#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
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#else
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#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP)
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#endif
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2010-01-26 22:32:22 +00:00
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/* Define the starting Interrupt rate per Queue */
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#define IGB_INTS_PER_SEC 8000
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- New 82580 devices supported
- Fixes from John Baldwin: vlan shadow tables made per/interface,
make vlan hw setup only happen when capability enabled, and
finally, make a tuneable interrupt rate. Thanks John!
- Tweaked watchdog handling to avoid any false positives, now
detection is in the TX clean path, with only the final check
and init happening in the local timer.
- limit queues to 8 for all devices, with 82576 or 82580 on
larger machines it can get greater than this, and it seems
mostly a resource waste to do so. Even 8 might be high but
it can be manually reduced.
- use 2k, 4k and now 9k clusters based on the MTU size.
- rework the igb_refresh_mbuf() code, its important to
make sure the descriptor is rewritten even when reusing
mbufs since writeback clobbers things.
MFC: in a few days, this delta needs to get to 8.2
2010-11-23 22:12:02 +00:00
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#define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2)
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2010-01-26 22:32:22 +00:00
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2008-08-28 22:28:28 +00:00
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#define IGB_LINK_ITR 2000
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2013-10-09 17:32:52 +00:00
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#define I210_LINK_DELAY 1000
|
2008-08-28 22:28:28 +00:00
|
|
|
|
2008-07-30 21:56:53 +00:00
|
|
|
/* Precision Time Sync (IEEE 1588) defines */
|
|
|
|
#define ETHERTYPE_IEEE1588 0x88F7
|
|
|
|
#define PICOSECS_PER_TICK 20833
|
|
|
|
#define TSYNC_PORT 319 /* UDP port for the protocol */
|
|
|
|
|
2008-02-29 21:50:11 +00:00
|
|
|
/*
|
|
|
|
* Bus dma allocation structure used by
|
|
|
|
* e1000_dma_malloc and e1000_dma_free.
|
|
|
|
*/
|
|
|
|
struct igb_dma_alloc {
|
|
|
|
bus_addr_t dma_paddr;
|
|
|
|
caddr_t dma_vaddr;
|
|
|
|
bus_dma_tag_t dma_tag;
|
|
|
|
bus_dmamap_t dma_map;
|
|
|
|
bus_dma_segment_t dma_seg;
|
|
|
|
int dma_nseg;
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
2010-01-26 22:32:22 +00:00
|
|
|
** Driver queue struct: this is the interrupt container
|
|
|
|
** for the associated tx and rx ring.
|
|
|
|
*/
|
|
|
|
struct igb_queue {
|
|
|
|
struct adapter *adapter;
|
|
|
|
u32 msix; /* This queue's MSIX vector */
|
|
|
|
u32 eims; /* This queue's EIMS bit */
|
|
|
|
u32 eitr_setting;
|
|
|
|
struct resource *res;
|
|
|
|
void *tag;
|
|
|
|
struct tx_ring *txr;
|
|
|
|
struct rx_ring *rxr;
|
|
|
|
struct task que_task;
|
|
|
|
struct taskqueue *tq;
|
|
|
|
u64 irqs;
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
2013-10-09 17:32:52 +00:00
|
|
|
* The transmit ring, one per queue
|
2008-02-29 21:50:11 +00:00
|
|
|
*/
|
|
|
|
struct tx_ring {
|
2013-10-09 17:32:52 +00:00
|
|
|
struct adapter *adapter;
|
2008-02-29 21:50:11 +00:00
|
|
|
struct mtx tx_mtx;
|
2013-10-09 17:32:52 +00:00
|
|
|
u32 me;
|
|
|
|
int watchdog_time;
|
|
|
|
union e1000_adv_tx_desc *tx_base;
|
|
|
|
struct igb_tx_buf *tx_buffers;
|
2010-01-26 22:32:22 +00:00
|
|
|
struct igb_dma_alloc txdma;
|
2008-02-29 21:50:11 +00:00
|
|
|
volatile u16 tx_avail;
|
2013-10-09 17:32:52 +00:00
|
|
|
u16 next_avail_desc;
|
|
|
|
u16 next_to_clean;
|
|
|
|
u16 process_limit;
|
|
|
|
u16 num_desc;
|
|
|
|
enum {
|
|
|
|
IGB_QUEUE_IDLE = 1,
|
|
|
|
IGB_QUEUE_WORKING = 2,
|
|
|
|
IGB_QUEUE_HUNG = 4,
|
|
|
|
IGB_QUEUE_DEPLETED = 8,
|
|
|
|
} queue_status;
|
|
|
|
u32 txd_cmd;
|
|
|
|
bus_dma_tag_t txtag;
|
|
|
|
char mtx_name[16];
|
2013-03-29 18:46:13 +00:00
|
|
|
#ifndef IGB_LEGACY_TX
|
2009-06-24 17:41:29 +00:00
|
|
|
struct buf_ring *br;
|
2012-09-26 18:11:43 +00:00
|
|
|
struct task txq_task;
|
2009-06-24 17:41:29 +00:00
|
|
|
#endif
|
2013-10-09 17:32:52 +00:00
|
|
|
u32 bytes; /* used for AIM */
|
2010-01-26 22:32:22 +00:00
|
|
|
u32 packets;
|
2013-10-09 17:32:52 +00:00
|
|
|
/* Soft Stats */
|
|
|
|
unsigned long tso_tx;
|
|
|
|
unsigned long no_tx_map_avail;
|
|
|
|
unsigned long no_tx_dma_setup;
|
2008-02-29 21:50:11 +00:00
|
|
|
u64 no_desc_avail;
|
2013-10-09 17:32:52 +00:00
|
|
|
u64 total_packets;
|
2008-02-29 21:50:11 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
2010-01-26 22:32:22 +00:00
|
|
|
* Receive ring: one per queue
|
2008-02-29 21:50:11 +00:00
|
|
|
*/
|
|
|
|
struct rx_ring {
|
|
|
|
struct adapter *adapter;
|
|
|
|
u32 me;
|
2010-01-26 22:32:22 +00:00
|
|
|
struct igb_dma_alloc rxdma;
|
2008-02-29 21:50:11 +00:00
|
|
|
union e1000_adv_rx_desc *rx_base;
|
2008-07-30 21:56:53 +00:00
|
|
|
struct lro_ctrl lro;
|
2009-06-24 17:41:29 +00:00
|
|
|
bool lro_enabled;
|
|
|
|
bool hdr_split;
|
2010-01-26 22:32:22 +00:00
|
|
|
bool discard;
|
2008-02-29 21:50:11 +00:00
|
|
|
struct mtx rx_mtx;
|
2008-08-28 22:28:28 +00:00
|
|
|
char mtx_name[16];
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
u32 next_to_refresh;
|
2008-02-29 21:50:11 +00:00
|
|
|
u32 next_to_check;
|
2009-12-08 01:07:44 +00:00
|
|
|
struct igb_rx_buf *rx_buffers;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
bus_dma_tag_t htag; /* dma tag for rx head */
|
|
|
|
bus_dma_tag_t ptag; /* dma tag for rx packet */
|
2008-02-29 21:50:11 +00:00
|
|
|
/*
|
|
|
|
* First/last mbuf pointers, for
|
|
|
|
* collecting multisegment RX packets.
|
|
|
|
*/
|
|
|
|
struct mbuf *fmp;
|
|
|
|
struct mbuf *lmp;
|
2008-08-28 22:28:28 +00:00
|
|
|
|
|
|
|
u32 bytes;
|
2010-01-26 22:32:22 +00:00
|
|
|
u32 packets;
|
2010-06-30 21:05:51 +00:00
|
|
|
int rdt;
|
|
|
|
int rdh;
|
2009-06-24 17:41:29 +00:00
|
|
|
|
2008-02-29 21:50:11 +00:00
|
|
|
/* Soft stats */
|
2009-04-10 00:05:46 +00:00
|
|
|
u64 rx_split_packets;
|
2010-01-26 22:32:22 +00:00
|
|
|
u64 rx_discarded;
|
2008-02-29 21:50:11 +00:00
|
|
|
u64 rx_packets;
|
|
|
|
u64 rx_bytes;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct adapter {
|
2013-10-09 17:32:52 +00:00
|
|
|
struct ifnet *ifp;
|
|
|
|
struct e1000_hw hw;
|
|
|
|
|
|
|
|
struct e1000_osdep osdep;
|
|
|
|
struct device *dev;
|
|
|
|
struct cdev *led_dev;
|
|
|
|
|
|
|
|
struct resource *pci_mem;
|
|
|
|
struct resource *msix_mem;
|
|
|
|
int memrid;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Interrupt resources: this set is
|
|
|
|
* either used for legacy, or for Link
|
|
|
|
* when doing MSIX
|
|
|
|
*/
|
|
|
|
void *tag;
|
|
|
|
struct resource *res;
|
|
|
|
|
|
|
|
struct ifmedia media;
|
|
|
|
struct callout timer;
|
|
|
|
int msix;
|
|
|
|
int if_flags;
|
|
|
|
int pause_frames;
|
|
|
|
|
|
|
|
struct mtx core_mtx;
|
|
|
|
|
|
|
|
eventhandler_tag vlan_attach;
|
|
|
|
eventhandler_tag vlan_detach;
|
|
|
|
|
|
|
|
u16 num_vlans;
|
|
|
|
u16 num_queues;
|
2008-02-29 21:50:11 +00:00
|
|
|
|
- New 82580 devices supported
- Fixes from John Baldwin: vlan shadow tables made per/interface,
make vlan hw setup only happen when capability enabled, and
finally, make a tuneable interrupt rate. Thanks John!
- Tweaked watchdog handling to avoid any false positives, now
detection is in the TX clean path, with only the final check
and init happening in the local timer.
- limit queues to 8 for all devices, with 82576 or 82580 on
larger machines it can get greater than this, and it seems
mostly a resource waste to do so. Even 8 might be high but
it can be manually reduced.
- use 2k, 4k and now 9k clusters based on the MTU size.
- rework the igb_refresh_mbuf() code, its important to
make sure the descriptor is rewritten even when reusing
mbufs since writeback clobbers things.
MFC: in a few days, this delta needs to get to 8.2
2010-11-23 22:12:02 +00:00
|
|
|
/*
|
|
|
|
** Shadow VFTA table, this is needed because
|
|
|
|
** the real vlan filter table gets cleared during
|
|
|
|
** a soft reset and the driver needs to be able
|
|
|
|
** to repopulate it.
|
|
|
|
*/
|
2013-10-09 17:32:52 +00:00
|
|
|
u32 shadow_vfta[IGB_VFTA_SIZE];
|
- New 82580 devices supported
- Fixes from John Baldwin: vlan shadow tables made per/interface,
make vlan hw setup only happen when capability enabled, and
finally, make a tuneable interrupt rate. Thanks John!
- Tweaked watchdog handling to avoid any false positives, now
detection is in the TX clean path, with only the final check
and init happening in the local timer.
- limit queues to 8 for all devices, with 82576 or 82580 on
larger machines it can get greater than this, and it seems
mostly a resource waste to do so. Even 8 might be high but
it can be manually reduced.
- use 2k, 4k and now 9k clusters based on the MTU size.
- rework the igb_refresh_mbuf() code, its important to
make sure the descriptor is rewritten even when reusing
mbufs since writeback clobbers things.
MFC: in a few days, this delta needs to get to 8.2
2010-11-23 22:12:02 +00:00
|
|
|
|
|
|
|
/* Info about the interface */
|
2013-10-09 17:32:52 +00:00
|
|
|
u32 optics;
|
|
|
|
u32 fc; /* local flow ctrl setting */
|
|
|
|
int advertise; /* link speeds */
|
|
|
|
bool link_active;
|
|
|
|
u16 max_frame_size;
|
|
|
|
u16 num_segs;
|
|
|
|
u16 link_speed;
|
|
|
|
bool link_up;
|
|
|
|
u32 linkvec;
|
|
|
|
u16 link_duplex;
|
|
|
|
u32 dmac;
|
|
|
|
int link_mask;
|
|
|
|
|
|
|
|
/* Flags */
|
|
|
|
u32 flags;
|
|
|
|
|
|
|
|
/* Mbuf cluster size */
|
|
|
|
u32 rx_mbuf_sz;
|
|
|
|
|
|
|
|
/* Support for pluggable optics */
|
|
|
|
bool sfp_probe;
|
|
|
|
struct task link_task; /* Link tasklet */
|
|
|
|
struct task mod_task; /* SFP tasklet */
|
|
|
|
struct task msf_task; /* Multispeed Fiber */
|
|
|
|
struct taskqueue *tq;
|
|
|
|
|
|
|
|
/*
|
|
|
|
** Queues:
|
|
|
|
** This is the irq holder, it has
|
|
|
|
** and RX/TX pair or rings associated
|
|
|
|
** with it.
|
|
|
|
*/
|
2010-01-26 22:32:22 +00:00
|
|
|
struct igb_queue *queues;
|
|
|
|
|
2008-02-29 21:50:11 +00:00
|
|
|
/*
|
2013-10-09 17:32:52 +00:00
|
|
|
* Transmit rings:
|
|
|
|
* Allocated at run time, an array of rings.
|
2008-02-29 21:50:11 +00:00
|
|
|
*/
|
|
|
|
struct tx_ring *tx_rings;
|
2013-10-09 17:32:52 +00:00
|
|
|
u32 num_tx_desc;
|
2010-09-28 00:13:15 +00:00
|
|
|
|
2013-10-09 17:32:52 +00:00
|
|
|
/*
|
|
|
|
* Receive rings:
|
|
|
|
* Allocated at run time, an array of rings.
|
2008-02-29 21:50:11 +00:00
|
|
|
*/
|
|
|
|
struct rx_ring *rx_rings;
|
2013-10-09 17:32:52 +00:00
|
|
|
u64 que_mask;
|
|
|
|
u32 num_rx_desc;
|
|
|
|
|
|
|
|
/* Multicast array memory */
|
|
|
|
u8 *mta;
|
2008-02-29 21:50:11 +00:00
|
|
|
|
|
|
|
/* Misc stats maintained by the driver */
|
2013-10-09 17:32:52 +00:00
|
|
|
unsigned long dropped_pkts;
|
|
|
|
unsigned long mbuf_defrag_failed;
|
|
|
|
unsigned long mbuf_header_failed;
|
|
|
|
unsigned long mbuf_packet_failed;
|
|
|
|
unsigned long no_tx_dma_setup;
|
|
|
|
unsigned long watchdog_events;
|
|
|
|
unsigned long link_irq;
|
|
|
|
unsigned long rx_overruns;
|
|
|
|
unsigned long device_control;
|
|
|
|
unsigned long rx_control;
|
|
|
|
unsigned long int_mask;
|
|
|
|
unsigned long eint_mask;
|
|
|
|
unsigned long packet_buf_alloc_rx;
|
|
|
|
unsigned long packet_buf_alloc_tx;
|
|
|
|
/* Used in pf and vf */
|
|
|
|
void *stats;
|
|
|
|
|
|
|
|
int enable_aim;
|
|
|
|
int has_manage;
|
|
|
|
int wol;
|
|
|
|
int rx_process_limit;
|
|
|
|
u16 vf_ifp; /* a VF interface */
|
|
|
|
bool in_detach; /* Used only in igb_ioctl */
|
2008-02-29 21:50:11 +00:00
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
/* ******************************************************************************
|
|
|
|
* vendor_info_array
|
|
|
|
*
|
|
|
|
* This array contains the list of Subvendor/Subdevice IDs on which the driver
|
|
|
|
* should load.
|
|
|
|
*
|
|
|
|
* ******************************************************************************/
|
|
|
|
typedef struct _igb_vendor_info_t {
|
|
|
|
unsigned int vendor_id;
|
|
|
|
unsigned int device_id;
|
|
|
|
unsigned int subvendor_id;
|
|
|
|
unsigned int subdevice_id;
|
|
|
|
unsigned int index;
|
|
|
|
} igb_vendor_info_t;
|
|
|
|
|
2013-10-09 17:32:52 +00:00
|
|
|
struct igb_tx_buf {
|
|
|
|
union e1000_adv_tx_desc *eop;
|
|
|
|
struct mbuf *m_head;
|
|
|
|
bus_dmamap_t map;
|
2008-02-29 21:50:11 +00:00
|
|
|
};
|
|
|
|
|
2009-12-08 01:07:44 +00:00
|
|
|
struct igb_rx_buf {
|
2009-04-10 00:05:46 +00:00
|
|
|
struct mbuf *m_head;
|
|
|
|
struct mbuf *m_pack;
|
Update to igb and em:
em revision 7.0.0:
- Using driver devclass, seperate legacy (pre-pcie) code
into a seperate source file. This will at least help
protect against regression issues. It compiles along
with em, and is transparent to end use, devices in each
appear to be 'emX'. When using em in a modular form this
also allows the legacy stuff to be defined out.
- Add tx and rx rings as in igb, in the 82574 this becomes
actual multiqueue for the first time (2 queues) while in
other PCIE adapters its just make code cleaner.
- Add RX mbuf handling logic that matches igb, this will
eliminate packet drops due to temporary mbuf shortage.
igb revision 1.9.3:
- Following the ixgbe code, use a new approach in what
was called 'get_buf', the routine now has been made
independent of rxeof, it now does the update to the
engine TDT register, this design allows temporary
mbuf resources to become non-critical, not requiring
a packet to be discarded, instead it just returns and
does not increment the tail pointer.
- With the above change it was also unnecessary to keep
'spare' maps around, since we do not have the discard
issue.
- Performance tweaks and improvements to the code also.
MFC in a week
2010-03-29 23:36:34 +00:00
|
|
|
bus_dmamap_t hmap; /* bus_dma map for header */
|
|
|
|
bus_dmamap_t pmap; /* bus_dma map for packet */
|
2009-04-10 00:05:46 +00:00
|
|
|
};
|
|
|
|
|
2011-04-05 21:55:43 +00:00
|
|
|
/*
|
|
|
|
** Find the number of unrefreshed RX descriptors
|
|
|
|
*/
|
|
|
|
static inline u16
|
|
|
|
igb_rx_unrefreshed(struct rx_ring *rxr)
|
|
|
|
{
|
|
|
|
struct adapter *adapter = rxr->adapter;
|
|
|
|
|
|
|
|
if (rxr->next_to_check > rxr->next_to_refresh)
|
|
|
|
return (rxr->next_to_check - rxr->next_to_refresh - 1);
|
|
|
|
else
|
|
|
|
return ((adapter->num_rx_desc + rxr->next_to_check) -
|
|
|
|
rxr->next_to_refresh - 1);
|
|
|
|
}
|
|
|
|
|
2008-02-29 21:50:11 +00:00
|
|
|
#define IGB_CORE_LOCK_INIT(_sc, _name) \
|
|
|
|
mtx_init(&(_sc)->core_mtx, _name, "IGB Core Lock", MTX_DEF)
|
|
|
|
#define IGB_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx)
|
|
|
|
#define IGB_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx)
|
2010-01-26 22:32:22 +00:00
|
|
|
#define IGB_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx)
|
|
|
|
#define IGB_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED)
|
|
|
|
|
|
|
|
#define IGB_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx)
|
2009-12-08 01:07:44 +00:00
|
|
|
#define IGB_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx)
|
2010-01-26 22:32:22 +00:00
|
|
|
#define IGB_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx)
|
2009-12-08 01:07:44 +00:00
|
|
|
#define IGB_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx)
|
2010-01-26 22:32:22 +00:00
|
|
|
#define IGB_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
|
|
|
|
|
|
|
|
#define IGB_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx)
|
2009-12-08 01:07:44 +00:00
|
|
|
#define IGB_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx)
|
2008-02-29 21:50:11 +00:00
|
|
|
#define IGB_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx)
|
2010-06-30 17:26:47 +00:00
|
|
|
#define IGB_RX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->rx_mtx, MA_OWNED)
|
|
|
|
|
|
|
|
#define UPDATE_VF_REG(reg, last, cur) \
|
|
|
|
{ \
|
|
|
|
u32 new = E1000_READ_REG(hw, reg); \
|
|
|
|
if (new < last) \
|
|
|
|
cur += 0x100000000LL; \
|
|
|
|
last = new; \
|
|
|
|
cur &= 0xFFFFFFFF00000000LL; \
|
|
|
|
cur |= new; \
|
|
|
|
}
|
2008-02-29 21:50:11 +00:00
|
|
|
|
2011-04-28 22:21:53 +00:00
|
|
|
#if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
|
2010-06-30 21:05:51 +00:00
|
|
|
static __inline int
|
|
|
|
drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
|
|
|
|
{
|
|
|
|
#ifdef ALTQ
|
|
|
|
if (ALTQ_IS_ENABLED(&ifp->if_snd))
|
|
|
|
return (1);
|
|
|
|
#endif
|
|
|
|
return (!buf_ring_empty(br));
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2008-02-29 21:50:11 +00:00
|
|
|
#endif /* _IGB_H_DEFINED_ */
|
|
|
|
|
|
|
|
|