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freebsd-skq/sys/mips/beri/std.beri

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Add preliminary support for the SRI International / University of Cambridge Bluespec Extensible RISC Implementation (BERI) processor. BERI is a 64-bit MIPS ISA soft CPU core that can be synthesised to Altera and Xilinx FPGAs, and is being used for CPU and OS research at several institutions. Sponsored by: DARPA, AFRL
2012-08-25 08:31:21 +00:00
# $FreeBSD$
files "../beri/files.beri"
cpu CPU_MIPS4KC
MFP4: Change 228019 by bz@bz_zenith on 2013/04/23 13:55:30 Add kernel side support for large TLB on BERI/CHERI. Modelled similar to NLM MFC after: 3 days Sponsored by: DAPRA/AFRL
2013-10-22 21:08:25 +00:00
options BERI_LARGE_TLB
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