2014-04-05 16:08:13 +00:00
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/*-
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* Copyright 2008-2012 - Symmetricom, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* FTDI USB serial converter chip ioctl commands.
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*/
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#ifndef _USB_UFTDIIO_H_
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#define _USB_UFTDIIO_H_
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#include <sys/ioccom.h>
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enum uftdi_bitmodes
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{
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UFTDI_BITMODE_ASYNC = 0,
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UFTDI_BITMODE_MPSSE = 1,
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UFTDI_BITMODE_SYNC = 2,
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UFTDI_BITMODE_CPU_EMUL = 3,
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UFTDI_BITMODE_FAST_SERIAL = 4,
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UFTDI_BITMODE_CBUS = 5,
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2015-08-06 19:47:04 +00:00
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UFTDI_BITMODE_NONE = 0xff, /* aka UART mode. */
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2014-04-05 16:08:13 +00:00
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};
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/*
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* For UFTDIIOC_SET_BITMODE:
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* mode = One of the uftdi_bitmodes enum values.
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* iomask = Mask of bits enabled for bitbang output.
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*
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* For UFTDIIOC_GET_BITMODE:
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2015-08-06 19:47:04 +00:00
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* mode = Mode most recently set using UFTDIIOC_SET_BITMODE.
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* iomask = Returned snapshot of DBUS0..DBUS7 pin states at time of call.
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* Pin states can be read in any mode, not just bitbang modes.
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2014-04-05 16:08:13 +00:00
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*/
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struct uftdi_bitmode
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{
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uint8_t mode;
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uint8_t iomask;
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};
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2015-08-06 19:29:26 +00:00
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/*
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* For UFTDIIOC_READ_EEPROM, UFTDIIOC_WRITE_EEPROM:
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*
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* IO is done in 16-bit words at the chip level; offset and length are in bytes,
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* but must each be evenly divisible by two.
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*
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* It is not necessary to erase before writing. For the FT232R device (only)
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* you must set the latency timer to 0x77 before doing a series of eeprom writes
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* (and restore it to the prior value when done).
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*/
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struct uftdi_eeio
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{
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uint16_t offset;
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uint16_t length;
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uint16_t data[64];
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};
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/* Pass this value to confirm that eeprom erase request is not accidental. */
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#define UFTDI_CONFIRM_ERASE 0x26139108
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2014-04-05 16:08:13 +00:00
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#define UFTDIIOC_RESET_IO _IO('c', 0) /* Reset config, flush fifos.*/
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#define UFTDIIOC_RESET_RX _IO('c', 1) /* Flush input fifo. */
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#define UFTDIIOC_RESET_TX _IO('c', 2) /* Flush output fifo. */
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#define UFTDIIOC_SET_BITMODE _IOW('c', 3, struct uftdi_bitmode)
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#define UFTDIIOC_GET_BITMODE _IOR('c', 4, struct uftdi_bitmode)
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#define UFTDIIOC_SET_ERROR_CHAR _IOW('c', 5, int) /* -1 to disable */
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#define UFTDIIOC_SET_EVENT_CHAR _IOW('c', 6, int) /* -1 to disable */
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#define UFTDIIOC_SET_LATENCY _IOW('c', 7, int) /* 1-255 ms */
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#define UFTDIIOC_GET_LATENCY _IOR('c', 8, int)
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#define UFTDIIOC_GET_HWREV _IOR('c', 9, int)
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2015-08-06 19:29:26 +00:00
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#define UFTDIIOC_READ_EEPROM _IOWR('c', 10, struct uftdi_eeio)
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#define UFTDIIOC_WRITE_EEPROM _IOW('c', 11, struct uftdi_eeio)
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#define UFTDIIOC_ERASE_EEPROM _IOW('c', 12, int)
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2014-04-05 16:08:13 +00:00
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#endif
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