1997-12-02 21:26:41 +00:00
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/*
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2001-05-25 18:03:07 +00:00
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* Copyright (c) 2001 M. Warner Losh. All Rights Reserved.
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* Copyright (c) 1997 Ted Faber All rights reserved.
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1997-12-02 21:26:41 +00:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Absolutely no warranty of function or purpose is made by the author
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* Ted Faber.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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1998-02-07 20:41:20 +00:00
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*
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1999-08-28 01:08:13 +00:00
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* $FreeBSD$
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1997-12-02 21:26:41 +00:00
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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2000-02-02 16:49:21 +00:00
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#include <sys/bus.h>
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1997-12-02 21:26:41 +00:00
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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2001-05-13 01:52:55 +00:00
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#include <pccard/pcic_pci.h>
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1998-01-20 21:11:03 +00:00
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#include <pccard/i82365.h>
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1997-12-02 22:27:58 +00:00
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#include <vm/vm.h>
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#include <vm/pmap.h>
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1997-12-02 21:26:41 +00:00
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2000-03-25 20:29:55 +00:00
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#define PRVERB(x) if (bootverbose) device_printf x
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2001-05-25 19:22:36 +00:00
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struct pcic_pci_table
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{
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u_int32_t devid;
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const char *descr;
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int type;
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u_int32_t flags;
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int revision;
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} pcic_pci_devs[] = {
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{ PCI_DEVICE_ID_PCIC_CLPD6729,
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"Cirrus Logic PD6729/6730 PC-Card Controller" },
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{ PCI_DEVICE_ID_PCIC_CLPD6832,
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"Cirrus Logic PD6832 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_CLPD6833,
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"Cirrus Logic PD6833 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_OZ6729,
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"O2micro OZ6729 PC-Card Bridge" },
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{ PCI_DEVICE_ID_PCIC_OZ6730,
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"O2micro OZ6730 PC-Card Bridge" },
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{ PCI_DEVICE_ID_PCIC_OZ6832,
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"O2micro 6832/6833 PCI-Cardbus Bridge" },
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{ PCI_DEVICE_ID_PCIC_OZ6860,
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"O2micro 6860/6836 PCI-Cardbus Bridge" },
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{ PCI_DEVICE_ID_PCIC_OZ6872,
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"O2micro 6812/6872 PCI-Cardbus Bridge" },
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{ PCI_DEVICE_ID_RICOH_RL5C465,
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"Ricoh RL5C465 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_RICOH_RL5C475,
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"Ricoh RL5C475 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_RICOH_RL5C476,
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"Ricoh RL5C476 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_RICOH_RL5C477,
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"Ricoh RL5C477 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_RICOH_RL5C478,
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"Ricoh RL5C478 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1031,
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"TI PCI-1031 PCI-PCMCIA Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1130,
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"TI PCI-1130 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1131,
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"TI PCI-1131 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1211,
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"TI PCI-1211 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1220,
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"TI PCI-1220 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1221,
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"TI PCI-1221 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1225,
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"TI PCI-1225 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1250,
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"TI PCI-1250 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1251,
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"TI PCI-1251 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1251B,
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"TI PCI-1251B PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1410,
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"TI PCI-1410 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1420,
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"TI PCI-1420 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1450,
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"TI PCI-1450 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI1451,
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"TI PCI-1451 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_PCIC_TI4451,
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"TI PCI-4451 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_TOSHIBA_TOPIC95,
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"Toshiba ToPIC95 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_TOSHIBA_TOPIC97,
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"Toshiba ToPIC97 PCI-CardBus Bridge" },
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{ PCI_DEVICE_ID_TOSHIBA_TOPIC100,
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"Toshiba ToPIC100 PCI-CardBus Bridge" },
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{ 0, NULL, 0, 0 }
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};
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/*
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* lookup inside the table
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*/
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static struct pcic_pci_table *
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pcic_pci_lookup(u_int32_t devid, struct pcic_pci_table *tbl)
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{
|
2001-05-25 19:24:58 +00:00
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while (tbl->devid) {
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2001-05-25 19:22:36 +00:00
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if (tbl->devid == devid)
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return (tbl);
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tbl++;
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}
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return (NULL);
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}
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2000-02-02 16:49:21 +00:00
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/*
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* Set up the CL-PD6832 to look like a ISA based PCMCIA chip (a
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* PD672X). This routine is called once per PCMCIA socket.
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*/
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static void
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2000-03-25 20:29:55 +00:00
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pd6832_legacy_init(device_t dev)
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2000-02-02 16:49:21 +00:00
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{
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u_long bcr; /* to set interrupts */
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u_short io_port; /* the io_port to map this slot on */
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static int num6832; /* The number of 6832s initialized */
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int unit;
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1997-12-02 22:13:59 +00:00
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2000-02-02 16:49:21 +00:00
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num6832 = 0;
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2000-03-25 20:29:55 +00:00
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unit = device_get_unit(dev);
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2000-02-02 16:49:21 +00:00
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/*
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* Some BIOS leave the legacy address uninitialized. This
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* insures that the PD6832 puts itself where the driver will
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* look. We assume that multiple 6832's should be laid out
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* sequentially. We only initialize the first socket's legacy port,
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* the other is a dummy.
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*/
|
2001-05-24 06:54:48 +00:00
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io_port = PCIC_PORT_0 + num6832 * CLPD6832_NUM_REGS;
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2000-02-02 16:49:21 +00:00
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if (unit == 0)
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2000-03-25 20:29:55 +00:00
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pci_write_config(dev, CLPD6832_LEGACY_16BIT_IOADDR,
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2000-05-28 16:31:35 +00:00
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io_port & ~CLPD6832_LEGACY_16BIT_IOENABLE, 4);
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1997-12-02 22:13:59 +00:00
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2000-02-02 16:49:21 +00:00
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/*
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* I think this should be a call to pci_map_port, but that
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* routine won't map regiaters above 0x28, and the register we
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* need to map is 0x44.
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*/
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2000-03-25 20:29:55 +00:00
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io_port = pci_read_config(dev, CLPD6832_LEGACY_16BIT_IOADDR, 4) &
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2000-05-28 16:31:35 +00:00
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~CLPD6832_LEGACY_16BIT_IOENABLE;
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1997-12-02 21:26:41 +00:00
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2000-02-02 16:49:21 +00:00
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/*
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* Configure the first I/O window to contain CLPD6832_NUM_REGS
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* words and deactivate the second by setting the limit lower
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* than the base.
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*/
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2000-03-25 20:29:55 +00:00
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pci_write_config(dev, CLPD6832_IO_BASE0, io_port | 1, 4);
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pci_write_config(dev, CLPD6832_IO_LIMIT0,
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(io_port + CLPD6832_NUM_REGS) | 1, 4);
|
1997-12-02 21:26:41 +00:00
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2000-03-25 20:29:55 +00:00
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pci_write_config(dev, CLPD6832_IO_BASE1, (io_port + 0x20) | 1, 4);
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pci_write_config(dev, CLPD6832_IO_LIMIT1, io_port | 1, 4);
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2000-02-02 16:49:21 +00:00
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/*
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* Set default operating mode (I/O port space) and allocate
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* this socket to the current unit.
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*/
|
2000-05-28 16:31:35 +00:00
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pci_write_config(dev, PCIR_COMMAND, CLPD6832_COMMAND_DEFAULTS, 4);
|
2000-03-25 20:29:55 +00:00
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pci_write_config(dev, CLPD6832_SOCKET, unit, 4);
|
2000-02-02 16:49:21 +00:00
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/*
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* Set up the card inserted/card removed interrupts to come
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* through the isa IRQ.
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*/
|
2000-03-25 20:29:55 +00:00
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bcr = pci_read_config(dev, CLPD6832_BRIDGE_CONTROL, 4);
|
2000-02-02 16:49:21 +00:00
|
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bcr |= (CLPD6832_BCR_ISA_IRQ|CLPD6832_BCR_MGMT_IRQ_ENA);
|
2000-03-25 20:29:55 +00:00
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pci_write_config(dev, CLPD6832_BRIDGE_CONTROL, bcr, 4);
|
2000-02-02 16:49:21 +00:00
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/* After initializing 2 sockets, the chip is fully configured */
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if (unit == 1)
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num6832++;
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|
2000-03-25 20:29:55 +00:00
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PRVERB((dev, "CardBus: Legacy PC-card 16bit I/O address [0x%x]\n",
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io_port));
|
2000-02-02 16:49:21 +00:00
|
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}
|
1997-12-02 21:26:41 +00:00
|
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|
2000-03-25 20:29:55 +00:00
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/*
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|
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* TI1XXX PCI-CardBus Host Adapter specific function code.
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* This function is separated from pcic_pci_attach().
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* Support Device: TI1130,TI1131,TI1250,TI1220.
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* Test Device: TI1221.
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* Takeshi Shibagaki(shiba@jp.freebsd.org).
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|
|
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*/
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static void
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ti1xxx_pci_init(device_t dev)
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|
|
|
{
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|
|
u_long syscntl,devcntl,cardcntl;
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|
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u_int32_t device_id = pci_get_devid(dev);
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|
|
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char buf[128];
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int ti113x = (device_id == PCI_DEVICE_ID_PCIC_TI1130)
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|| (device_id == PCI_DEVICE_ID_PCIC_TI1131);
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|
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syscntl = pci_read_config(dev, TI113X_PCI_SYSTEM_CONTROL, 4);
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|
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devcntl = pci_read_config(dev, TI113X_PCI_DEVICE_CONTROL, 1);
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cardcntl = pci_read_config(dev, TI113X_PCI_CARD_CONTROL, 1);
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|
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switch(ti113x){
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|
|
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case 0 :
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strcpy(buf, "TI12XX PCI Config Reg: ");
|
|
|
|
break;
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|
|
|
case 1 :
|
|
|
|
strcpy(buf, "TI113X PCI Config Reg: ");
|
|
|
|
/*
|
2000-09-29 21:14:05 +00:00
|
|
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* Default card control register setting is
|
2000-03-25 20:29:55 +00:00
|
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|
* PCI interrupt. The method of this code
|
|
|
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* switches PCI INT and ISA IRQ by bit 7 of
|
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|
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* Bridge Control Register(Offset:0x3e,0x13e).
|
|
|
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* Takeshi Shibagaki(shiba@jp.freebsd.org)
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|
|
|
*/
|
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|
|
cardcntl |= TI113X_CARDCNTL_PCI_IREQ;
|
|
|
|
cardcntl |= TI113X_CARDCNTL_PCI_CSC;
|
2001-04-17 23:56:12 +00:00
|
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|
pci_write_config(dev, TI113X_PCI_CARD_CONTROL, cardcntl, 1);
|
|
|
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cardcntl = pci_read_config(dev, TI113X_PCI_CARD_CONTROL, 1);
|
2000-03-25 20:29:55 +00:00
|
|
|
if (syscntl & TI113X_SYSCNTL_CLKRUN_ENA){
|
|
|
|
if (syscntl & TI113X_SYSCNTL_CLKRUN_SEL)
|
|
|
|
strcat(buf, "[clkrun irq 12]");
|
|
|
|
else
|
|
|
|
strcat(buf, "[clkrun irq 10]");
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (cardcntl & TI113X_CARDCNTL_RING_ENA)
|
|
|
|
strcat(buf, "[ring enable]");
|
|
|
|
if (cardcntl & TI113X_CARDCNTL_SPKR_ENA)
|
|
|
|
strcat(buf, "[speaker enable]");
|
|
|
|
if (syscntl & TI113X_SYSCNTL_PWRSAVINGS)
|
|
|
|
strcat(buf, "[pwr save]");
|
|
|
|
switch(devcntl & TI113X_DEVCNTL_INTR_MASK){
|
|
|
|
case TI113X_DEVCNTL_INTR_ISA :
|
|
|
|
strcat(buf, "[CSC parallel isa irq]");
|
|
|
|
break;
|
|
|
|
case TI113X_DEVCNTL_INTR_SERIAL :
|
|
|
|
strcat(buf, "[CSC serial isa irq]");
|
|
|
|
break;
|
|
|
|
case TI113X_DEVCNTL_INTR_NONE :
|
|
|
|
strcat(buf, "[pci only]");
|
|
|
|
break;
|
|
|
|
case TI12XX_DEVCNTL_INTR_ALLSERIAL :
|
|
|
|
strcat(buf, "[FUNC pci int + CSC serial isa irq]");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
device_printf(dev, "%s\n",buf);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
generic_cardbus_attach(device_t dev)
|
|
|
|
{
|
|
|
|
u_int16_t brgcntl;
|
|
|
|
u_int32_t iobase;
|
|
|
|
int unit;
|
|
|
|
|
|
|
|
unit = device_get_unit(dev);
|
|
|
|
|
|
|
|
/* Output ISA IRQ indicated in ExCA register(0x03). */
|
|
|
|
brgcntl = pci_read_config(dev, CB_PCI_BRIDGE_CTRL, 2);
|
|
|
|
brgcntl |= CB_BCR_INT_EXCA;
|
|
|
|
pci_write_config(dev, CB_PCI_BRIDGE_CTRL, brgcntl, 2);
|
|
|
|
|
|
|
|
/* 16bit Legacy Mode Base Address */
|
|
|
|
if (unit != 0)
|
|
|
|
return;
|
|
|
|
|
2000-05-28 16:31:35 +00:00
|
|
|
iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2) &
|
|
|
|
~CB_PCI_LEGACY16_IOENABLE;
|
2000-03-25 20:29:55 +00:00
|
|
|
if (!iobase) {
|
2000-05-28 16:31:35 +00:00
|
|
|
iobase = 0x3e0 | CB_PCI_LEGACY16_IOENABLE;
|
2000-03-25 20:29:55 +00:00
|
|
|
pci_write_config(dev, CB_PCI_LEGACY16_IOADDR, iobase, 2);
|
|
|
|
iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
|
2000-05-28 16:31:35 +00:00
|
|
|
& ~CB_PCI_LEGACY16_IOENABLE;
|
2000-03-25 20:29:55 +00:00
|
|
|
}
|
|
|
|
PRVERB((dev, "Legacy address set to %#x\n", iobase));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
1997-12-02 21:26:41 +00:00
|
|
|
/*
|
1997-12-02 22:13:59 +00:00
|
|
|
* Return the ID string for the controller if the vendor/product id
|
|
|
|
* matches, NULL otherwise.
|
1997-12-02 21:26:41 +00:00
|
|
|
*/
|
2000-02-02 16:49:21 +00:00
|
|
|
static int
|
2000-03-25 20:29:55 +00:00
|
|
|
pcic_pci_probe(device_t dev)
|
1997-12-02 21:26:41 +00:00
|
|
|
{
|
2000-02-02 16:49:21 +00:00
|
|
|
u_int32_t device_id;
|
2001-05-24 04:24:22 +00:00
|
|
|
u_int8_t subclass;
|
|
|
|
u_int8_t progif;
|
2001-05-25 19:22:36 +00:00
|
|
|
struct pcic_pci_table *itm;
|
|
|
|
const char *desc;
|
2000-02-02 16:49:21 +00:00
|
|
|
|
2000-03-25 20:29:55 +00:00
|
|
|
device_id = pci_get_devid(dev);
|
2000-02-02 16:49:21 +00:00
|
|
|
desc = NULL;
|
|
|
|
|
2001-05-25 19:22:36 +00:00
|
|
|
itm = pcic_pci_lookup(device_id, &pcic_pci_devs[0]);
|
|
|
|
if (itm != NULL)
|
|
|
|
desc = itm->descr;
|
|
|
|
if (desc == NULL) {
|
2001-05-24 04:24:22 +00:00
|
|
|
if (pci_get_class(dev) == PCIC_BRIDGE) {
|
|
|
|
subclass = pci_get_subclass(dev);
|
|
|
|
progif = pci_get_progif(dev);
|
|
|
|
if (subclass == PCIS_BRIDGE_PCMCIA && progif == 0)
|
|
|
|
desc = "Generic PCI-PCMCIA Bridge";
|
|
|
|
if (subclass == PCIS_BRIDGE_CARDBUS && progif == 0)
|
|
|
|
desc = "YENTA PCI-CARDBUS Bridge";
|
|
|
|
}
|
1997-12-02 22:13:59 +00:00
|
|
|
}
|
2000-02-02 16:49:21 +00:00
|
|
|
if (desc == NULL)
|
|
|
|
return (ENXIO);
|
2000-03-25 20:29:55 +00:00
|
|
|
device_set_desc(dev, desc);
|
2001-05-25 19:22:36 +00:00
|
|
|
return (0);
|
1997-12-02 22:13:59 +00:00
|
|
|
}
|
|
|
|
|
2001-04-17 23:15:00 +00:00
|
|
|
static void
|
|
|
|
ricoh_init(device_t dev)
|
|
|
|
{
|
|
|
|
u_int16_t brgcntl;
|
|
|
|
/*
|
|
|
|
* Ricoh chips have a legacy bridge enable different than most
|
|
|
|
* Code cribbed from NEWBUS's bridge code since I can't find a
|
|
|
|
* datasheet for them that has register definitions.
|
|
|
|
*/
|
|
|
|
brgcntl = pci_read_config(dev, CB_PCI_BRIDGE_CTRL, 2);
|
|
|
|
brgcntl |= CB_BCR_RL_3E0_EN;
|
|
|
|
brgcntl &= ~CB_BCR_RL_3E2_EN;
|
|
|
|
pci_write_config(dev, CLPD6832_BRIDGE_CONTROL, brgcntl, 4);
|
|
|
|
}
|
|
|
|
|
1997-12-02 22:13:59 +00:00
|
|
|
/*
|
|
|
|
* General PCI based card dispatch routine. Right now
|
2001-04-17 23:15:00 +00:00
|
|
|
* it only understands the Ricoh, CL-PD6832 and TI parts. It does
|
2001-01-02 21:42:48 +00:00
|
|
|
* try to do generic things with other parts.
|
1997-12-02 22:13:59 +00:00
|
|
|
*/
|
2000-02-02 16:49:21 +00:00
|
|
|
static int
|
2000-03-25 20:29:55 +00:00
|
|
|
pcic_pci_attach(device_t dev)
|
1997-12-02 22:13:59 +00:00
|
|
|
{
|
2000-03-25 20:29:55 +00:00
|
|
|
u_int32_t device_id = pci_get_devid(dev);
|
|
|
|
u_long command;
|
|
|
|
|
|
|
|
/* Init. CardBus/PC-card controllers as 16-bit PC-card controllers */
|
|
|
|
|
|
|
|
/* Place any per "slot" initialization here */
|
|
|
|
|
|
|
|
/*
|
2000-05-28 16:31:35 +00:00
|
|
|
* In sys/pci/pcireg.h, PCIR_COMMAND must be separated
|
2000-03-25 20:29:55 +00:00
|
|
|
* PCI_COMMAND_REG(0x04) and PCI_STATUS_REG(0x06).
|
|
|
|
* Takeshi Shibagaki(shiba@jp.freebsd.org).
|
|
|
|
*/
|
2000-05-28 16:31:35 +00:00
|
|
|
command = pci_read_config(dev, PCIR_COMMAND, 4);
|
|
|
|
command |= PCIM_CMD_PORTEN | PCIM_CMD_MEMEN;
|
|
|
|
pci_write_config(dev, PCIR_COMMAND, command, 4);
|
1997-12-02 22:13:59 +00:00
|
|
|
|
2000-02-02 16:49:21 +00:00
|
|
|
switch (device_id) {
|
2001-04-17 23:15:00 +00:00
|
|
|
case PCI_DEVICE_ID_RICOH_RL5C465:
|
|
|
|
case PCI_DEVICE_ID_RICOH_RL5C466:
|
|
|
|
ricoh_init(dev);
|
|
|
|
generic_cardbus_attach(dev);
|
|
|
|
break;
|
2000-03-25 20:29:55 +00:00
|
|
|
case PCI_DEVICE_ID_PCIC_TI1130:
|
|
|
|
case PCI_DEVICE_ID_PCIC_TI1131:
|
2000-04-20 03:16:49 +00:00
|
|
|
case PCI_DEVICE_ID_PCIC_TI1211:
|
2000-03-25 20:29:55 +00:00
|
|
|
case PCI_DEVICE_ID_PCIC_TI1220:
|
|
|
|
case PCI_DEVICE_ID_PCIC_TI1221:
|
2000-04-20 03:16:49 +00:00
|
|
|
case PCI_DEVICE_ID_PCIC_TI1225:
|
2000-03-25 20:29:55 +00:00
|
|
|
case PCI_DEVICE_ID_PCIC_TI1250:
|
|
|
|
case PCI_DEVICE_ID_PCIC_TI1251:
|
|
|
|
case PCI_DEVICE_ID_PCIC_TI1251B:
|
|
|
|
case PCI_DEVICE_ID_PCIC_TI1410:
|
|
|
|
case PCI_DEVICE_ID_PCIC_TI1420:
|
|
|
|
case PCI_DEVICE_ID_PCIC_TI1450:
|
|
|
|
case PCI_DEVICE_ID_PCIC_TI1451:
|
|
|
|
ti1xxx_pci_init(dev);
|
|
|
|
/* FALLTHROUGH */
|
|
|
|
default:
|
|
|
|
generic_cardbus_attach(dev);
|
|
|
|
break;
|
1997-12-02 22:13:59 +00:00
|
|
|
case PCI_DEVICE_ID_PCIC_CLPD6832:
|
2001-04-17 23:50:24 +00:00
|
|
|
case PCI_DEVICE_ID_PCIC_TI1031: /* 1031 is like 6832 */
|
2001-04-17 23:15:00 +00:00
|
|
|
pd6832_legacy_init(dev);
|
2000-08-29 04:40:17 +00:00
|
|
|
break;
|
1997-12-02 22:13:59 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (bootverbose) {
|
|
|
|
int i, j;
|
|
|
|
u_char *p;
|
|
|
|
u_long *pl;
|
|
|
|
|
|
|
|
printf("PCI Config space:\n");
|
|
|
|
for (j = 0; j < 0x98; j += 16) {
|
|
|
|
printf("%02x: ", j);
|
|
|
|
for (i = 0; i < 16; i += 4)
|
2000-03-25 20:29:55 +00:00
|
|
|
printf(" %08x", pci_read_config(dev, i+j, 4));
|
1997-12-02 22:13:59 +00:00
|
|
|
printf("\n");
|
|
|
|
}
|
2000-03-25 20:29:55 +00:00
|
|
|
p = (u_char *)pmap_mapdev(pci_read_config(dev, 0x10, 4),
|
1997-12-02 22:27:58 +00:00
|
|
|
0x1000);
|
1997-12-02 22:13:59 +00:00
|
|
|
pl = (u_long *)p;
|
|
|
|
printf("Cardbus Socket registers:\n");
|
|
|
|
printf("00: ");
|
|
|
|
for (i = 0; i < 4; i += 1)
|
1998-08-18 00:32:50 +00:00
|
|
|
printf(" %08lx:", pl[i]);
|
1997-12-02 22:13:59 +00:00
|
|
|
printf("\n10: ");
|
|
|
|
for (i = 4; i < 8; i += 1)
|
1998-08-18 00:32:50 +00:00
|
|
|
printf(" %08lx:", pl[i]);
|
1997-12-02 22:13:59 +00:00
|
|
|
printf("\nExCa registers:\n");
|
|
|
|
for (i = 0; i < 0x40; i += 16)
|
|
|
|
printf("%02x: %16D\n", i, p + 0x800 + i, " ");
|
1997-12-02 21:26:41 +00:00
|
|
|
}
|
1998-01-20 21:11:03 +00:00
|
|
|
|
2001-05-14 06:15:24 +00:00
|
|
|
return (0);
|
2000-02-02 16:49:21 +00:00
|
|
|
}
|
1997-12-02 22:13:59 +00:00
|
|
|
|
2000-08-30 06:57:38 +00:00
|
|
|
static int
|
|
|
|
pcic_pci_detach(device_t dev)
|
|
|
|
{
|
2001-05-14 06:15:24 +00:00
|
|
|
return (0);
|
2000-08-30 06:57:38 +00:00
|
|
|
}
|
|
|
|
|
2000-02-02 16:49:21 +00:00
|
|
|
static device_method_t pcic_pci_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, pcic_pci_probe),
|
|
|
|
DEVMETHOD(device_attach, pcic_pci_attach),
|
2000-08-30 06:57:38 +00:00
|
|
|
DEVMETHOD(device_detach, pcic_pci_detach),
|
2000-02-02 16:49:21 +00:00
|
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
|
|
DEVMETHOD(device_resume, bus_generic_resume),
|
|
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
1997-12-02 22:13:59 +00:00
|
|
|
|
2000-02-02 16:49:21 +00:00
|
|
|
{0, 0}
|
|
|
|
};
|
1997-12-02 22:13:59 +00:00
|
|
|
|
2000-02-02 16:49:21 +00:00
|
|
|
static driver_t pcic_pci_driver = {
|
|
|
|
"pcic-pci",
|
|
|
|
pcic_pci_methods,
|
|
|
|
0 /* no softc */
|
|
|
|
};
|
1997-12-02 21:26:41 +00:00
|
|
|
|
2000-02-02 16:49:21 +00:00
|
|
|
static devclass_t pcic_pci_devclass;
|
1998-01-20 21:11:03 +00:00
|
|
|
|
2000-02-02 16:49:21 +00:00
|
|
|
DRIVER_MODULE(pcic_pci, pci, pcic_pci_driver, pcic_pci_devclass, 0, 0);
|