2014-05-19 01:21:02 +00:00
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/******************************************************************************
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2016-05-12 18:18:55 +00:00
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Copyright (c) 2013-2015, Intel Corporation
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2014-05-19 01:21:02 +00:00
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#ifndef _I40E_LAN_HMC_H_
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#define _I40E_LAN_HMC_H_
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/* forward-declare the HW struct for the compiler */
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struct i40e_hw;
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/* HMC element context information */
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2014-07-28 21:57:09 +00:00
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/* Rx queue context data
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*
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* The sizes of the variables may be larger than needed due to crossing byte
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* boundaries. If we do not have the width of the variable set to the correct
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* size then we could end up shifting bits off the top of the variable when the
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* variable is at the top of a byte and crosses over into the next byte.
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*/
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2014-05-19 01:21:02 +00:00
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struct i40e_hmc_obj_rxq {
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u16 head;
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2014-07-28 21:57:09 +00:00
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u16 cpuid; /* bigger than needed, see above for reason */
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2014-05-19 01:21:02 +00:00
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u64 base;
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u16 qlen;
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#define I40E_RXQ_CTX_DBUFF_SHIFT 7
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u16 dbuff; /* bigger than needed, see above for reason */
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2014-05-19 01:21:02 +00:00
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#define I40E_RXQ_CTX_HBUFF_SHIFT 6
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2014-07-28 21:57:09 +00:00
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u16 hbuff; /* bigger than needed, see above for reason */
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2014-05-19 01:21:02 +00:00
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u8 dtype;
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u8 dsize;
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u8 crcstrip;
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u8 fc_ena;
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u8 l2tsel;
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u8 hsplit_0;
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u8 hsplit_1;
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u8 showiv;
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2014-07-28 21:57:09 +00:00
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u32 rxmax; /* bigger than needed, see above for reason */
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u8 tphrdesc_ena;
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u8 tphwdesc_ena;
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u8 tphdata_ena;
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u8 tphhead_ena;
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2014-07-28 21:57:09 +00:00
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u16 lrxqthresh; /* bigger than needed, see above for reason */
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2014-05-19 01:21:02 +00:00
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u8 prefena; /* NOTE: normally must be set to 1 at init */
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};
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2014-07-28 21:57:09 +00:00
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/* Tx queue context data
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*
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* The sizes of the variables may be larger than needed due to crossing byte
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* boundaries. If we do not have the width of the variable set to the correct
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* size then we could end up shifting bits off the top of the variable when the
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* variable is at the top of a byte and crosses over into the next byte.
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*/
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2014-05-19 01:21:02 +00:00
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struct i40e_hmc_obj_txq {
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u16 head;
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u8 new_context;
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u64 base;
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u8 fc_ena;
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u8 timesync_ena;
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u8 fd_ena;
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u8 alt_vlan_ena;
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u16 thead_wb;
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2014-07-28 21:57:09 +00:00
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u8 cpuid;
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2014-05-19 01:21:02 +00:00
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u8 head_wb_ena;
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u16 qlen;
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u8 tphrdesc_ena;
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u8 tphrpacket_ena;
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u8 tphwdesc_ena;
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u64 head_wb_addr;
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u32 crc;
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u16 rdylist;
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u8 rdylist_act;
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};
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/* for hsplit_0 field of Rx HMC context */
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enum i40e_hmc_obj_rx_hsplit_0 {
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I40E_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT = 0,
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I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2 = 1,
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I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP = 2,
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I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4,
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I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP = 8,
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};
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/* fcoe_cntx and fcoe_filt are for debugging purpose only */
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struct i40e_hmc_obj_fcoe_cntx {
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u32 rsv[32];
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};
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struct i40e_hmc_obj_fcoe_filt {
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u32 rsv[8];
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};
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/* Context sizes for LAN objects */
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enum i40e_hmc_lan_object_size {
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I40E_HMC_LAN_OBJ_SZ_8 = 0x3,
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I40E_HMC_LAN_OBJ_SZ_16 = 0x4,
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I40E_HMC_LAN_OBJ_SZ_32 = 0x5,
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I40E_HMC_LAN_OBJ_SZ_64 = 0x6,
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I40E_HMC_LAN_OBJ_SZ_128 = 0x7,
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I40E_HMC_LAN_OBJ_SZ_256 = 0x8,
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I40E_HMC_LAN_OBJ_SZ_512 = 0x9,
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};
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#define I40E_HMC_L2OBJ_BASE_ALIGNMENT 512
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#define I40E_HMC_OBJ_SIZE_TXQ 128
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#define I40E_HMC_OBJ_SIZE_RXQ 32
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#define I40E_HMC_OBJ_SIZE_FCOE_CNTX 64
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#define I40E_HMC_OBJ_SIZE_FCOE_FILT 64
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enum i40e_hmc_lan_rsrc_type {
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I40E_HMC_LAN_FULL = 0,
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I40E_HMC_LAN_TX = 1,
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I40E_HMC_LAN_RX = 2,
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I40E_HMC_FCOE_CTX = 3,
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I40E_HMC_FCOE_FILT = 4,
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I40E_HMC_LAN_MAX = 5
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};
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enum i40e_hmc_model {
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I40E_HMC_MODEL_DIRECT_PREFERRED = 0,
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I40E_HMC_MODEL_DIRECT_ONLY = 1,
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I40E_HMC_MODEL_PAGED_ONLY = 2,
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I40E_HMC_MODEL_UNKNOWN,
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};
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struct i40e_hmc_lan_create_obj_info {
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struct i40e_hmc_info *hmc_info;
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u32 rsrc_type;
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u32 start_idx;
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u32 count;
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enum i40e_sd_entry_type entry_type;
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u64 direct_mode_sz;
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};
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struct i40e_hmc_lan_delete_obj_info {
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struct i40e_hmc_info *hmc_info;
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u32 rsrc_type;
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u32 start_idx;
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u32 count;
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};
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enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
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u32 rxq_num, u32 fcoe_cntx_num,
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u32 fcoe_filt_num);
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enum i40e_status_code i40e_configure_lan_hmc(struct i40e_hw *hw,
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enum i40e_hmc_model model);
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enum i40e_status_code i40e_shutdown_lan_hmc(struct i40e_hw *hw);
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u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,
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u32 fcoe_cntx_num, u32 fcoe_filt_num);
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enum i40e_status_code i40e_get_lan_tx_queue_context(struct i40e_hw *hw,
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u16 queue,
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struct i40e_hmc_obj_txq *s);
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enum i40e_status_code i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,
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u16 queue);
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enum i40e_status_code i40e_set_lan_tx_queue_context(struct i40e_hw *hw,
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u16 queue,
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struct i40e_hmc_obj_txq *s);
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enum i40e_status_code i40e_get_lan_rx_queue_context(struct i40e_hw *hw,
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u16 queue,
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struct i40e_hmc_obj_rxq *s);
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enum i40e_status_code i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,
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u16 queue);
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enum i40e_status_code i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
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u16 queue,
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struct i40e_hmc_obj_rxq *s);
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enum i40e_status_code i40e_create_lan_hmc_object(struct i40e_hw *hw,
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struct i40e_hmc_lan_create_obj_info *info);
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enum i40e_status_code i40e_delete_lan_hmc_object(struct i40e_hw *hw,
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struct i40e_hmc_lan_delete_obj_info *info);
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#endif /* _I40E_LAN_HMC_H_ */
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