i386: Merge PAE and non-PAE pmaps into same kernel.
Effectively all i386 kernels now have two pmaps compiled in: one
managing PAE pagetables, and another non-PAE. The implementation is
selected at cold time depending on the CPU features. The vm_paddr_t is
always 64bit now. As result, nx bit can be used on all capable CPUs.
Option PAE only affects the bus_addr_t: it is still 32bit for non-PAE
configs, for drivers compatibility. Kernel layout, esp. max kernel
address, low memory PDEs and max user address (same as trampoline
start) are now same for PAE and for non-PAE regardless of the type of
page tables used.
Non-PAE kernel (when using PAE pagetables) can handle physical memory
up to 24G now, larger memory requires re-tuning the KVA consumers and
instead the code caps the maximum at 24G. Unfortunately, a lot of
drivers do not use busdma(9) properly so by default even 4G barrier is
not easy. There are two tunables added: hw.above4g_allow and
hw.above24g_allow, the first one is kept enabled for now to evaluate
the status on HEAD, second is only for dev use.
i386 now creates three freelists if there is any memory above 4G, to
allow proper bounce pages allocation. Also, VM_KMEM_SIZE_SCALE changed
from 3 to 1.
The PAE_TABLES kernel config option is retired.
In collaboarion with: pho
Discussed with: emaste
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D18894
2019-01-30 02:07:13 +00:00
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2018 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Konstantin Belousov <kib@FreeBSD.org>
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* under sponsorship from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_PMAP_BASE_H_
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#define _MACHINE_PMAP_BASE_H_
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2019-08-03 01:36:05 +00:00
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/* Internal flags for pmap_mapdev_attr(). */
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#define MAPDEV_SETATTR 0x0000001 /* Modify existing attrs. */
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i386: Merge PAE and non-PAE pmaps into same kernel.
Effectively all i386 kernels now have two pmaps compiled in: one
managing PAE pagetables, and another non-PAE. The implementation is
selected at cold time depending on the CPU features. The vm_paddr_t is
always 64bit now. As result, nx bit can be used on all capable CPUs.
Option PAE only affects the bus_addr_t: it is still 32bit for non-PAE
configs, for drivers compatibility. Kernel layout, esp. max kernel
address, low memory PDEs and max user address (same as trampoline
start) are now same for PAE and for non-PAE regardless of the type of
page tables used.
Non-PAE kernel (when using PAE pagetables) can handle physical memory
up to 24G now, larger memory requires re-tuning the KVA consumers and
instead the code caps the maximum at 24G. Unfortunately, a lot of
drivers do not use busdma(9) properly so by default even 4G barrier is
not easy. There are two tunables added: hw.above4g_allow and
hw.above24g_allow, the first one is kept enabled for now to evaluate
the status on HEAD, second is only for dev use.
i386 now creates three freelists if there is any memory above 4G, to
allow proper bounce pages allocation. Also, VM_KMEM_SIZE_SCALE changed
from 3 to 1.
The PAE_TABLES kernel config option is retired.
In collaboarion with: pho
Discussed with: emaste
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D18894
2019-01-30 02:07:13 +00:00
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struct pmap_methods {
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void (*pm_ksetrw)(vm_offset_t);
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void (*pm_remap_lower)(bool);
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void (*pm_remap_lowptdi)(bool);
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void (*pm_align_superpage)(vm_object_t object, vm_ooffset_t offset,
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vm_offset_t *addr, vm_size_t size);
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vm_offset_t (*pm_quick_enter_page)(vm_page_t m);
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void (*pm_quick_remove_page)(vm_offset_t addr);
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void *(*pm_trm_alloc)(size_t size, int flags);
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void (*pm_trm_free)(void *addr, size_t size);
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vm_offset_t (*pm_get_map_low)(void);
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vm_offset_t (*pm_get_vm_maxuser_address)(void);
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vm_paddr_t (*pm_kextract)(vm_offset_t va);
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vm_paddr_t (*pm_pg_frame)(vm_paddr_t pa);
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void (*pm_sf_buf_map)(struct sf_buf *sf);
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void (*pm_cp_slow0_map)(vm_offset_t kaddr, int plen, vm_page_t *ma);
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u_int (*pm_get_kcr3)(void);
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u_int (*pm_get_cr3)(pmap_t);
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caddr_t (*pm_cmap3)(vm_paddr_t pa, u_int pte_flags);
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void (*pm_basemem_setup)(u_int basemem);
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void (*pm_set_nx)(void);
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void *(*pm_bios16_enter)(void);
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void (*pm_bios16_leave)(void *handle);
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void (*pm_bootstrap)(vm_paddr_t firstaddr);
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boolean_t (*pm_is_valid_memattr)(pmap_t, vm_memattr_t);
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int (*pm_cache_bits)(pmap_t, int, boolean_t);
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bool (*pm_ps_enabled)(pmap_t);
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void (*pm_pinit0)(pmap_t);
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int (*pm_pinit)(pmap_t);
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void (*pm_activate)(struct thread *);
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void (*pm_activate_boot)(pmap_t);
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void (*pm_advise)(pmap_t, vm_offset_t, vm_offset_t, int);
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void (*pm_clear_modify)(vm_page_t);
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int (*pm_change_attr)(vm_offset_t, vm_size_t, int);
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int (*pm_mincore)(pmap_t, vm_offset_t, vm_paddr_t *);
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void (*pm_copy)(pmap_t, pmap_t, vm_offset_t, vm_size_t, vm_offset_t);
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void (*pm_copy_page)(vm_page_t, vm_page_t);
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void (*pm_copy_pages)(vm_page_t [], vm_offset_t, vm_page_t [],
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vm_offset_t, int);
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void (*pm_zero_page)(vm_page_t);
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void (*pm_zero_page_area)(vm_page_t, int, int);
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int (*pm_enter)(pmap_t, vm_offset_t, vm_page_t, vm_prot_t, u_int,
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int8_t);
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void (*pm_enter_object)(pmap_t, vm_offset_t, vm_offset_t,
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vm_page_t, vm_prot_t);
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void (*pm_enter_quick)(pmap_t, vm_offset_t, vm_page_t, vm_prot_t);
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void *(*pm_kenter_temporary)(vm_paddr_t pa, int);
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void (*pm_object_init_pt)(pmap_t, vm_offset_t, vm_object_t,
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vm_pindex_t, vm_size_t);
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void (*pm_unwire)(pmap_t, vm_offset_t, vm_offset_t);
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boolean_t (*pm_page_exists_quick)(pmap_t, vm_page_t);
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int (*pm_page_wired_mappings)(vm_page_t);
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boolean_t (*pm_page_is_mapped)(vm_page_t);
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void (*pm_remove_pages)(pmap_t);
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boolean_t (*pm_is_modified)(vm_page_t);
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boolean_t (*pm_is_prefaultable)(pmap_t, vm_offset_t);
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boolean_t (*pm_is_referenced)(vm_page_t);
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void (*pm_remove_write)(vm_page_t);
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int (*pm_ts_referenced)(vm_page_t);
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2019-08-03 01:36:05 +00:00
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void *(*pm_mapdev_attr)(vm_paddr_t, vm_size_t, int, int);
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i386: Merge PAE and non-PAE pmaps into same kernel.
Effectively all i386 kernels now have two pmaps compiled in: one
managing PAE pagetables, and another non-PAE. The implementation is
selected at cold time depending on the CPU features. The vm_paddr_t is
always 64bit now. As result, nx bit can be used on all capable CPUs.
Option PAE only affects the bus_addr_t: it is still 32bit for non-PAE
configs, for drivers compatibility. Kernel layout, esp. max kernel
address, low memory PDEs and max user address (same as trampoline
start) are now same for PAE and for non-PAE regardless of the type of
page tables used.
Non-PAE kernel (when using PAE pagetables) can handle physical memory
up to 24G now, larger memory requires re-tuning the KVA consumers and
instead the code caps the maximum at 24G. Unfortunately, a lot of
drivers do not use busdma(9) properly so by default even 4G barrier is
not easy. There are two tunables added: hw.above4g_allow and
hw.above24g_allow, the first one is kept enabled for now to evaluate
the status on HEAD, second is only for dev use.
i386 now creates three freelists if there is any memory above 4G, to
allow proper bounce pages allocation. Also, VM_KMEM_SIZE_SCALE changed
from 3 to 1.
The PAE_TABLES kernel config option is retired.
In collaboarion with: pho
Discussed with: emaste
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D18894
2019-01-30 02:07:13 +00:00
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void (*pm_unmapdev)(vm_offset_t, vm_size_t);
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void (*pm_page_set_memattr)(vm_page_t, vm_memattr_t);
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vm_paddr_t (*pm_extract)(pmap_t, vm_offset_t);
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vm_page_t (*pm_extract_and_hold)(pmap_t, vm_offset_t, vm_prot_t);
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vm_offset_t (*pm_map)(vm_offset_t *, vm_paddr_t, vm_paddr_t, int);
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void (*pm_qenter)(vm_offset_t sva, vm_page_t *, int);
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void (*pm_qremove)(vm_offset_t, int);
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void (*pm_release)(pmap_t);
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void (*pm_protect)(pmap_t, vm_offset_t, vm_offset_t, vm_prot_t);
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void (*pm_remove)(pmap_t, vm_offset_t, vm_offset_t);
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void (*pm_remove_all)(vm_page_t);
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void (*pm_init)(void);
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void (*pm_init_pat)(void);
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void (*pm_growkernel)(vm_offset_t);
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void (*pm_invalidate_page)(pmap_t, vm_offset_t);
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void (*pm_invalidate_range)(pmap_t, vm_offset_t, vm_offset_t);
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void (*pm_invalidate_all)(pmap_t);
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void (*pm_invalidate_cache)(void);
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void (*pm_flush_page)(vm_page_t);
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void (*pm_kenter)(vm_offset_t, vm_paddr_t);
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void (*pm_kremove)(vm_offset_t);
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2019-09-22 19:23:00 +00:00
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int (*pm_sysctl_kmaps)(SYSCTL_HANDLER_ARGS);
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i386: Merge PAE and non-PAE pmaps into same kernel.
Effectively all i386 kernels now have two pmaps compiled in: one
managing PAE pagetables, and another non-PAE. The implementation is
selected at cold time depending on the CPU features. The vm_paddr_t is
always 64bit now. As result, nx bit can be used on all capable CPUs.
Option PAE only affects the bus_addr_t: it is still 32bit for non-PAE
configs, for drivers compatibility. Kernel layout, esp. max kernel
address, low memory PDEs and max user address (same as trampoline
start) are now same for PAE and for non-PAE regardless of the type of
page tables used.
Non-PAE kernel (when using PAE pagetables) can handle physical memory
up to 24G now, larger memory requires re-tuning the KVA consumers and
instead the code caps the maximum at 24G. Unfortunately, a lot of
drivers do not use busdma(9) properly so by default even 4G barrier is
not easy. There are two tunables added: hw.above4g_allow and
hw.above24g_allow, the first one is kept enabled for now to evaluate
the status on HEAD, second is only for dev use.
i386 now creates three freelists if there is any memory above 4G, to
allow proper bounce pages allocation. Also, VM_KMEM_SIZE_SCALE changed
from 3 to 1.
The PAE_TABLES kernel config option is retired.
In collaboarion with: pho
Discussed with: emaste
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential revision: https://reviews.freebsd.org/D18894
2019-01-30 02:07:13 +00:00
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};
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void pmap_cold(void);
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void pmap_pae_cold(void);
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void pmap_nopae_cold(void);
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#endif
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