1997-09-14 21:42:12 +00:00
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/*
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* file: mss.h
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*
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* (C) 1997 Luigi Rizzo (luigi@iet.unipi.it)
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*
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* This file contains information and macro definitions for
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* AD1848-compatible devices, used in the MSS/WSS compatible boards.
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*
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*/
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/*
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*
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The codec part of the board is seen as a set of 4 registers mapped
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at the base address for the board (default 0x534). Note that some
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(early) boards implemented 4 additional registers 4 location before
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(usually 0x530) to store configuration information. This is a source
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of confusion in that one never knows what address to specify. The
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(current) convention is to use the old address (0x530) in the kernel
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configuration file and consider MSS registers start four location
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ahead.
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*
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*/
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/*
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* The four visible registers of the MSS :
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*
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*/
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#define io_Index_Addr(d) ((d)->io_base + 4)
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#define IA_BUSY 0x80 /* readonly, set when busy */
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#define IA_MCE 0x40 /* the MCE bit. */
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/*
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* the MCE bit must be set whenever the current mode of the
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* codec is changed; this in particular is true for the
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* Data Format (I8, I28) and Interface Config(I9) registers.
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* Only exception are CEN and PEN which can be changed on the fly.
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* The DAC output is muted when MCE is set.
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*/
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#define IA_TRD 0x20 /* Transfer request disable */
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/*
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* When TRD is set, DMA transfers cease when the INT bit in
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* the MSS status reg is set. Must be cleared for automode
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* DMA, set otherwise.
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*/
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#define IA_AMASK 0x1f /* mask for indirect address */
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#define io_Indexed_Data(d) ((d)->io_base+1+4)
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/*
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* data to be transferred to the indirect register addressed
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* by index addr. During init and sw. powerdown, cannot be
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* written to, and is always read as 0x80 (consistent with the
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* busy flag).
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*/
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#define io_Status(d) ((d)->io_base+2+4)
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#define IS_CUL 0x80 /* capture upper/lower */
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#define IS_CLR 0x40 /* capture left/right */
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#define IS_CRDY 0x20 /* capture ready for programmed i/o */
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#define IS_SER 0x10 /* sample error (overrun/underrun) */
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#define IS_PUL 0x08 /* playback upper/lower */
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#define IS_PLR 0x04 /* playback left/right */
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#define IS_PRDY 0x02 /* playback ready for programmed i/o */
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#define IS_INT 0x01 /* int status (1 = active) */
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/*
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* IS_INT is clreared by any write to the status register.
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*/
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#define io_Polled_IO(d) ((d)->io_base+3+4)
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/*
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* this register is used in case of polled i/o
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*/
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/*
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* The MSS has a set of 16 (or 32 depending on the model) indirect
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* registers accessible through the data port by specifying the
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* appropriate address in the address register.
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*
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* The 16 low registers are uniformly handled in AD1848/CS4248 compatible
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* mode (often called MODE1). For the upper 16 registers there are
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* some differences among different products, mainly Crystal uses them
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* differently from OPTi.
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*
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*/
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/*
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* volume registers
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*/
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#define I6_MUTE 0x80
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/*
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* register I9 -- interface configuration.
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*/
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#define I9_PEN 0x01 /* playback enable */
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#define I9_CEN 0x02 /* capture enable */
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/*
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* values used in bd_flags
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*/
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#define BD_F_MCE_BIT 0x0001
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#define BD_F_IRQ_OK 0x0002
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#define BD_F_TMR_RUN 0x0004
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1999-01-04 10:40:14 +00:00
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/* AD1816 register macros */
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#define ad1816_ale(d) ((d)->io_base+0) /* indirect reg access */
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#define ad1816_int(d) ((d)->io_base+1) /* interupt status */
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#define ad1816_low(d) ((d)->io_base+2) /* indirect low byte */
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#define ad1816_high(d) ((d)->io_base+3) /* indirect high byte */
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/* unused */
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#define ad1816_pioD(d) ((d)->io_base+4) /* PIO debug */
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#define ad1816_pios(d) ((d)->io_base+5) /* PIO status */
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#define ad1816_piod(d) ((d)->io_base+6) /* PIO data */
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/* end of unused */
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/* values for playback/capture config:
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bits: 0 enable/disable
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1 pio/dma
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2 stereo/mono
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3 companded/linearPCM
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4-5 format : 00 8bit linear (uncomp)
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00 8bit mulaw (comp)
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01 16bit le (uncomp)
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01 8bit alaw (comp)
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11 16bit be (uncomp)
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*/
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#define ad1816_play(d) ((d)->io_base+8) /* playback config */
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#define ad1816_capt(d) ((d)->io_base+9) /* capture config */
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#define AD1816_BUSY 0x80 /* chip is busy */
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#define AD1816_ALEMASK 0x3F /* mask for indirect adr. */
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/* unusud */
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#define AD1816_INTRSI 0x01 /* sb intr */
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#define AD1816_INTRGI 0x02 /* game intr */
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#define AD1816_INTRRI 0x04 /* ring intr */
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#define AD1816_INTRDI 0x08 /* dsp intr */
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#define AD1816_INTRVI 0x10 /* vol intr */
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#define AD1816_INTRTI 0x20 /* timer intr */
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/* used again */
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#define AD1816_INTRCI 0x40 /* capture intr */
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#define AD1816_INTRPI 0x80 /* playback intr */
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/* PIO stuff is not supplied here */
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/* playback / capture config */
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#define AD1816_ENABLE 0x01 /* enable pl/cp */
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#define AD1816_PIO 0x02 /* use pio */
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#define AD1816_STEREO 0x04
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#define AD1816_COMP 0x08 /* data is companded */
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#define AD1816_U8 0x00 /* 8 bit linear pcm */
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#define AD1816_MULAW 0x08 /* 8 bit mulaw */
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#define AD1816_ALAW 0x18 /* 8 bit alaw */
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#define AD1816_S16LE 0x10 /* 16 bit linear little endian */
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#define AD1816_S16BE 0x30 /* 16 bit linear big endian */
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#define AD1816_FORMASK 0x38 /* format mask */
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1997-09-14 21:42:12 +00:00
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/*
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* sound/ad1848_mixer.h
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*
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* Definitions for the mixer of AD1848 and compatible codecs.
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*
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* Copyright by Hannu Savolainen 1994
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer. 2.
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* The AD1848 codec has generic input lines called Line, Aux1 and Aux2.
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* Soundcard manufacturers have connected actual inputs (CD, synth, line,
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* etc) to these inputs in different order. Therefore it's difficult
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* to assign mixer channels to to these inputs correctly. The following
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* contains two alternative mappings. The first one is for GUS MAX and
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* the second is just a generic one (line1, line2 and line3).
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* (Actually this is not a mapping but rather some kind of interleaving
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* solution).
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*/
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1997-10-31 12:24:28 +00:00
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#define MSS_REC_DEVICES \
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(SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD|SOUND_MASK_IMIX)
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1997-09-14 21:42:12 +00:00
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/*
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1997-10-31 12:24:28 +00:00
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* Table of mixer registers. There is a default table for the
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1998-10-02 17:26:37 +00:00
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* AD1848/CS423x clones, and one for the OPTI931. As more MSS
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1997-10-31 12:24:28 +00:00
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* clones come out, there ought to be more tables.
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*
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* Fields in the table are : polarity, register, offset, bits
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1997-09-14 21:42:12 +00:00
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*
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* The channel numbering used by individual soundcards is not fixed.
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* Some cards have assigned different meanings for the AUX1, AUX2
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* and LINE inputs. Some have different features...
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1997-10-31 12:24:28 +00:00
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*
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* Following there is a macro ...MIXER_DEVICES which is a bitmap
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* of all non-zero fields in the table.
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* MODE1_MIXER_DEVICES is the basic mixer of the 1848 in mode 1
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* registers I0..I15)
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1997-09-14 21:42:12 +00:00
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*
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*/
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1997-10-31 12:24:28 +00:00
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mixer_ent mix_devices[32][2] = {
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MIX_NONE(SOUND_MIXER_VOLUME),
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MIX_NONE(SOUND_MIXER_BASS),
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MIX_NONE(SOUND_MIXER_TREBLE),
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MIX_ENT(SOUND_MIXER_SYNTH, 2, 1, 0, 5, 3, 1, 0, 5),
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1997-09-14 21:42:12 +00:00
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MIX_ENT(SOUND_MIXER_PCM, 6, 1, 0, 6, 7, 1, 0, 6),
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MIX_ENT(SOUND_MIXER_SPEAKER, 26, 1, 0, 4, 0, 0, 0, 0),
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MIX_ENT(SOUND_MIXER_LINE, 18, 1, 0, 5, 19, 1, 0, 5),
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MIX_ENT(SOUND_MIXER_MIC, 0, 0, 5, 1, 1, 0, 5, 1),
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1997-10-31 12:24:28 +00:00
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MIX_ENT(SOUND_MIXER_CD, 4, 1, 0, 5, 5, 1, 0, 5),
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1997-09-14 21:42:12 +00:00
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MIX_ENT(SOUND_MIXER_IMIX, 13, 1, 2, 6, 0, 0, 0, 0),
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1997-10-31 12:24:28 +00:00
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MIX_NONE(SOUND_MIXER_ALTPCM),
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MIX_NONE(SOUND_MIXER_RECLEV),
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1997-09-14 21:42:12 +00:00
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MIX_ENT(SOUND_MIXER_IGAIN, 0, 0, 0, 4, 1, 0, 0, 4),
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1997-10-31 12:24:28 +00:00
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MIX_NONE(SOUND_MIXER_OGAIN),
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MIX_NONE(SOUND_MIXER_LINE1),
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MIX_NONE(SOUND_MIXER_LINE2),
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MIX_NONE(SOUND_MIXER_LINE3),
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1997-09-14 21:42:12 +00:00
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};
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1997-10-31 12:24:28 +00:00
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#define MODE2_MIXER_DEVICES \
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(SOUND_MASK_SYNTH | SOUND_MASK_PCM | SOUND_MASK_SPEAKER | \
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SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | \
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SOUND_MASK_IMIX | SOUND_MASK_IGAIN )
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#define MODE1_MIXER_DEVICES \
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(SOUND_MASK_SYNTH | SOUND_MASK_PCM | SOUND_MASK_MIC | \
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SOUND_MASK_CD | SOUND_MASK_IMIX | SOUND_MASK_IGAIN )
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/*
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* entries for the opti931...
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*/
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1997-09-14 21:42:12 +00:00
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mixer_ent opti931_devices[32][2] = { /* for the opti931 */
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MIX_ENT(SOUND_MIXER_VOLUME, 22, 1, 1, 5, 23, 1, 1, 5),
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1997-10-31 12:24:28 +00:00
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MIX_NONE(SOUND_MIXER_BASS),
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MIX_NONE(SOUND_MIXER_TREBLE),
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1997-09-14 21:42:12 +00:00
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MIX_ENT(SOUND_MIXER_SYNTH, 4, 1, 1, 4, 5, 1, 1, 4),
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MIX_ENT(SOUND_MIXER_PCM, 6, 1, 0, 5, 7, 1, 0, 5),
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1997-10-31 12:24:28 +00:00
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MIX_NONE(SOUND_MIXER_SPEAKER),
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1997-09-14 21:42:12 +00:00
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MIX_ENT(SOUND_MIXER_LINE, 18, 1, 1, 4, 19, 1, 1, 4),
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MIX_ENT(SOUND_MIXER_MIC, 0, 0, 5, 1, 1, 0, 5, 1),
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MIX_ENT(SOUND_MIXER_CD, 2, 1, 1, 4, 3, 1, 1, 4),
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1997-10-31 12:24:28 +00:00
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MIX_NONE(SOUND_MIXER_IMIX),
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MIX_NONE(SOUND_MIXER_ALTPCM),
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MIX_NONE(SOUND_MIXER_RECLEV),
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1997-09-14 21:42:12 +00:00
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MIX_ENT(SOUND_MIXER_IGAIN, 0, 0, 0, 4, 1, 0, 0, 4),
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1997-10-31 12:24:28 +00:00
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MIX_NONE(SOUND_MIXER_OGAIN),
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MIX_ENT(SOUND_MIXER_LINE1, 16, 1, 1, 4, 17, 1, 1, 4),
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MIX_NONE(SOUND_MIXER_LINE2),
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MIX_NONE(SOUND_MIXER_LINE3),
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1997-09-14 21:42:12 +00:00
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};
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1997-10-31 12:24:28 +00:00
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#define OPTI931_MIXER_DEVICES \
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(SOUND_MASK_VOLUME | SOUND_MASK_SYNTH | SOUND_MASK_PCM | \
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SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | \
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SOUND_MASK_IGAIN | SOUND_MASK_LINE1 )
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1999-01-04 10:40:14 +00:00
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#define AD1816_REC_DEVICES \
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(SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD)
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#define AD1816_MIXER_DEVICES \
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(SOUND_MASK_VOLUME | SOUND_MASK_PCM | SOUND_MASK_SYNTH | \
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SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_IGAIN)
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1997-10-31 12:24:28 +00:00
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1997-09-14 21:42:12 +00:00
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static u_short default_mixer_levels[SOUND_MIXER_NRDEVICES] = {
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0x5a5a, /* Master Volume */
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0x3232, /* Bass */
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0x3232, /* Treble */
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0x4b4b, /* FM */
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0x4040, /* PCM */
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0x4b4b, /* PC Speaker */
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0x2020, /* Ext Line */
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0x4040, /* Mic */
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0x4b4b, /* CD */
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0x0000, /* Recording monitor */
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0x4b4b, /* SB PCM */
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0x4b4b, /* Recording level */
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0x2525, /* Input gain */
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0x0000, /* Output gain */
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/* 0x4040, Line1 */
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0x0000, /* Line1 */
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0x0000, /* Line2 */
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0x1515 /* Line3 (usually line in)*/
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};
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