1995-07-05 12:15:52 +00:00
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/*-
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* Copyright (c) 1995 Bruce Evans.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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1998-08-13 13:54:10 +00:00
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* $Id: cyreg.h,v 1.3 1996/10/13 01:09:17 davidg Exp $
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1995-07-05 12:15:52 +00:00
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*/
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/*
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* Definitions for Cyclades Cyclom-Y serial boards.
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*/
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#define CY8_SVCACKR 0x100
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#define CY8_SVCACKT 0x200
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#define CY8_SVCACKM 0x300
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1996-10-13 01:09:24 +00:00
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#define CY16_RESET 0x0a00
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#define CY_CLEAR_INTR 0x0c00 /* intr ack address */
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1995-07-05 12:15:52 +00:00
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1996-10-04 10:33:13 +00:00
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#define CY_MAX_CD1400s 8 /* for Cyclom-32Y */
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1995-07-05 12:15:52 +00:00
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1998-08-13 13:54:10 +00:00
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#define CD1400_REV_G 0x46
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#define CD1400_REV_J 0x48
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#define CY_CLOCK_25 25000000 /* baud rate clock */
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#define CY_CLOCK_60 60000000 /* baud rate clock */
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#define CY_CLOCK_25_1MS 0x31
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#define CY_CLOCK_60_1MS 0x75
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1995-07-05 12:15:52 +00:00
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#ifdef CyDebug
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1996-10-13 01:09:24 +00:00
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#define cd_inb(iobase, reg, cy_align) (++cd_inbs, *((iobase) + ((reg)*2 << (cy_align))))
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1995-07-05 12:15:52 +00:00
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#define cy_inb(iobase, reg) (++cy_inbs, *((iobase) + (reg)))
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1996-10-13 01:09:24 +00:00
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#define cd_outb(iobase, reg, cy_align, val) (++cd_outbs, (void)(*((iobase) + ((reg)*2 << (cy_align))) = (val)))
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1995-07-05 12:15:52 +00:00
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#define cy_outb(iobase, reg, val) (++cy_outbs, (void)(*((iobase) + (reg)) = (val)))
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#else
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1996-10-13 01:09:24 +00:00
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#define cd_inb(iobase, reg, cy_align) (*((iobase) + ((reg)*2 << (cy_align))))
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1995-07-05 12:15:52 +00:00
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#define cy_inb(iobase, reg) (*((iobase) + (reg)))
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1996-10-13 01:09:24 +00:00
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#define cd_outb(iobase, reg, cy_align, val) ((void)(*((iobase) + ((reg)*2 << (cy_align))) = (val)))
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1995-07-05 12:15:52 +00:00
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#define cy_outb(iobase, reg, val) ((void)(*((iobase) + (reg)) = (val)))
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#endif
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