Give the WREG() macro the same lifetime as the REG() macro.
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310756939c
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0003a3f074
@ -442,6 +442,7 @@ static void
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pci_read_extcap(device_t pcib, pcicfgregs *cfg)
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{
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#define REG(n, w) PCIB_READ_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, w)
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#define WREG(n, v, w) PCIB_WRITE_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, v, w)
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uint32_t val;
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int ptr, nextptr, ptrptr;
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@ -511,7 +512,7 @@ pci_read_extcap(device_t pcib, pcicfgregs *cfg)
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break;
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}
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}
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/* REG use carry through to next functions */
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/* REG and WREG use carry through to next functions */
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}
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/*
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@ -520,7 +521,6 @@ pci_read_extcap(device_t pcib, pcicfgregs *cfg)
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static uint32_t
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pci_read_vpd_reg(device_t pcib, pcicfgregs *cfg, int reg)
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{
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#define WREG(n, v, w) PCIB_WRITE_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, v, w)
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KASSERT((reg & 3) == 0, ("VPD register must by 4 byte aligned"));
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@ -545,7 +545,6 @@ pci_write_vpd_reg(device_t pcib, pcicfgregs *cfg, int reg, uint32_t data)
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return;
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}
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#endif
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#undef WREG
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struct vpd_readstate {
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device_t pcib;
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@ -807,6 +806,7 @@ pci_read_vpd(device_t pcib, pcicfgregs *cfg)
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cfg->vpd.vpd_ros = NULL;
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}
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#undef REG
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#undef WREG
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}
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int
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