Remove spurious 8bit chars, turning files into plain ASCII.
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9a14aa017b
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004a39cd57
@ -200,7 +200,7 @@ cpu_initclocks(void)
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hz = 32768 / rel_value;
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tick = 1000000 / hz;
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}
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/* Disable all interrupts. */
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/* Disable all interrupts. */
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WR4(ST_IDR, 0xffffffff);
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/* The system timer shares the system irq (1) */
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irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 1, 1, 1,
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@ -251,7 +251,7 @@ cpu_initclocks()
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stathz = STATHZ;
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profhz = stathz;
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#if 0
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mtx_init(&clock_lock, "SA1110 Clock locké", NULL, MTX_SPIN);
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mtx_init(&clock_lock, "SA1110 Clock locked", NULL, MTX_SPIN);
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#endif
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saost_sc->sc_statclock_step = TIMER_FREQUENCY / stathz;
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struct resource *irq1, *irq2;
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@ -282,7 +282,7 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */
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* 4 times 16 bits for all 4 lanes. In case external PHY is present
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* (not direct mode), those values will not take effect on the 4 XGXS
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* lanes. For some external PHYs (such as 8706 and 8726) the values
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* will be used to configure the external PHY – in those cases, not
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* will be used to configure the external PHY -- in those cases, not
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* all 4 values are needed.
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*/
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uint16_t xgxs_config_rx[4]; /* 0x198 */
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@ -154,7 +154,7 @@ Revision History:
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/kernel text=0x24f1db data=0x3007ec+0x2062c -
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Hit [Enter] to boot immediagely, or any other key for command prompt.
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Booting [kernel] in 9 seconds¡
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Booting [kernel] in 9 seconds
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<-- press SPACE key here
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Type '?' for a list of commands, 'help' for more detailed help.
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@ -184,7 +184,7 @@ Revision History:
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/kernel text=0x24f1db data=0x3007ec+0x2062c -
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Hit [Enter] to boot immediagely, or any other key for command prompt.
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Booting [kernel] in 9 seconds¡
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Booting [kernel] in 9 seconds
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<-- press SPACE key here
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Type '?' for a list of commands, 'help' for more detailed help.
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@ -139,7 +139,7 @@ typedef enum xge_hal_channel_reopen_e {
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* Channel callback gets called by HAL if, and only if, there is at least
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* one new completion on a given ring or fifo channel. Upon processing the
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* first @dtrh ULD is _supposed_ to continue consuming completions
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* usingáone of the following HAL APIs:
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* using one of the following HAL APIs:
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* - xge_hal_fifo_dtr_next_completed()
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* or
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* - xge_hal_ring_dtr_next_completed().
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@ -794,7 +794,7 @@ xge_hal_fifo_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtr)
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* in fifo descriptor.
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* @channelh: Channel handle.
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* @dtrh: Descriptor handle.
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* @frag_idx: Index of the data buffer in the caller's scatter-gather listá
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* @frag_idx: Index of the data buffer in the caller's scatter-gather list
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* (of buffers).
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* @vaddr: Virtual address of the data buffer.
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* @dma_pointer: DMA address of the data buffer referenced by @frag_idx.
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@ -1015,7 +1015,7 @@ xge_hal_fifo_dtr_buffer_finalize(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
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* descriptor.
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* @channelh: Channel handle.
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* @dtrh: Descriptor handle.
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* @frag_idx: Index of the data buffer in the caller's scatter-gather listá
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* @frag_idx: Index of the data buffer in the caller's scatter-gather list
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* (of buffers).
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* @dma_pointer: DMA address of the data buffer referenced by @frag_idx.
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* @size: Size of the data buffer (in bytes).
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@ -822,9 +822,9 @@ static u_int32_t CntrlInst[] = {
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1999/06/21
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Buf441 slot is Enabled.
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--------------------------------------------
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04/09 creat
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04/09 @creat
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04/12 stop nise fix
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06/21 WorkingOff timming
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06/21 @WorkingOff timming
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*/
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static u_int32_t CntrlInst1E[] = {
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