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Add Braswell PCI IDs for Intel Cherryview

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Submitted by:	Johannes Lundberg <yohanesu75 at gmail.com>
Reviewed by:	jhb
Differential Revision:	https://reviews.freebsd.org/D8861
This commit is contained in:
Conrad Meyer 2016-12-20 22:08:36 +00:00
parent 171e4b68b3
commit 00eb880d20
2 changed files with 26 additions and 0 deletions
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24
sys/dev/ichiic/ig4_pci.c
View File

@ -68,6 +68,12 @@ static int ig4iic_pci_detach(device_t dev);
#define PCI_CHIP_LYNXPT_LP_I2C_1 0x9c618086
#define PCI_CHIP_LYNXPT_LP_I2C_2 0x9c628086
#define PCI_CHIP_BRASWELL_I2C_1 0x22c18086
#define PCI_CHIP_BRASWELL_I2C_2 0x22c28086
#define PCI_CHIP_BRASWELL_I2C_3 0x22c38086
#define PCI_CHIP_BRASWELL_I2C_5 0x22c58086
#define PCI_CHIP_BRASWELL_I2C_6 0x22c68086
#define PCI_CHIP_BRASWELL_I2C_7 0x22c78086
static int
ig4iic_pci_probe(device_t dev)
@ -79,6 +85,24 @@ ig4iic_pci_probe(device_t dev)
case PCI_CHIP_LYNXPT_LP_I2C_2:
device_set_desc(dev, "Intel Lynx Point-LP I2C Controller-2");
break;
case PCI_CHIP_BRASWELL_I2C_1:
device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 1");
break;
case PCI_CHIP_BRASWELL_I2C_2:
device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 2");
break;
case PCI_CHIP_BRASWELL_I2C_3:
device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 3");
break;
case PCI_CHIP_BRASWELL_I2C_5:
device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 5");
break;
case PCI_CHIP_BRASWELL_I2C_6:
device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 6");
break;
case PCI_CHIP_BRASWELL_I2C_7:
device_set_desc(dev, "Intel Braswell Serial I/O I2C Port 7");
break;
default:
return (ENXIO);
}

2
sys/dev/sdhci/sdhci_pci.c
View File

@ -107,6 +107,8 @@ static const struct sdhci_device {
SDHCI_QUIRK_RESET_AFTER_REQUEST },
{ 0x16bc14e4, 0xffff, "Broadcom BCM577xx SDXC/MMC Card Reader",
SDHCI_QUIRK_BCM577XX_400KHZ_CLKSRC },
{ 0x22948086, 0xffff, "Braswell Storage Cluster Control MMC Port",
0 },
{ 0, 0xffff, NULL,
0 }
};